Patents by Inventor Xuebin Yao
Xuebin Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230107063Abstract: A display panel and a display device are provided. The display panel includes an array substrate including a plurality of scan lines, a plurality of data lines, and a first common electrode, wherein the plurality of scan lines and the plurality of data lines are intersected to form a plurality of sub-pixel regions. The first common electrode includes a corner portion positioned within its corresponding sub-pixel region. The display panel includes a light-shielding portion that covers the corner portion, and the corner portion is shielded by providing the light-shielding portion.Type: ApplicationFiled: July 13, 2020Publication date: April 6, 2023Applicant: SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.Inventors: Xuebin Yao, Bangyin Peng, Ilgon Kim
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Publication number: 20230099831Abstract: Provided are systems, methods, and apparatuses for computational offload to storage systems. The method can include a first processing element issuing a first request to the storage device; a storage device, responsive to the first request, obtaining first data on the storage device and providing the first data to the first memory for storage; the second processing element reading the first data from the first memory and performing at least one of an operation or a computation on the first data to generate second data; and the second processing element providing the second data to the first processing element.Type: ApplicationFiled: January 4, 2022Publication date: March 30, 2023Inventors: Mohammadreza SOLTANIYEH, Veronica LAGRANGE MOUTINHO DOS REIS, Matthew BRYSON, Xuebin YAO
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Patent number: 11593240Abstract: A storage device configured for hardware verification is disclosed. The storage device comprises a first hardware component comprising a connector and a first verification logic. The first validation logic is configured to detect a criterion and generate a first signal via the connector in response to detecting the criterion. The storage device also comprises a second hardware component coupled to the first hardware component via the connector. The second hardware component comprises a second validation logic, where the second validation logic is configured to monitor and receive the first signal via the connector. In response to receiving the first signal, the second validation logic is configured to compare the received first signal to an expected signal and generate a result. The storage device is configured to take an action in response to the result.Type: GrantFiled: April 1, 2020Date of Patent: February 28, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Sompong Paul Olarig, Xuebin Yao
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Publication number: 20230052433Abstract: An device is disclosed. A first buffer to store a query data point, and a second buffer to store a matrix of candidate data points. A processing element may process the query data point and the matrix of candidate data points to identify candidate data points in the matrix of candidate data points that are nearest to the query data point.Type: ApplicationFiled: January 7, 2022Publication date: February 16, 2023Inventors: Erfan BANK TAVAKOLI, Xuebin YAO, Amir BEYGI
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Publication number: 20230051553Abstract: A multi-function device is disclosed. A first port may be used to communicate with a host processor. A second port may be used to communicate with a storage device. A third port may be used to communicate with a computational storage unit. Circuit may be used to route a message from the host processor to at least one of the storage device or the computational storage unit.Type: ApplicationFiled: February 10, 2022Publication date: February 16, 2023Inventors: Ramdas P. KACHARE, Hingkwan HUEN, Jimmy LAU, Howard R. BUTLER, Xuebin YAO
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Patent number: 11575505Abstract: A device includes a communications circuit configured to communicate with a storage device controller and a host device. The device further includes a processing device configured to receive a request from the storage device controller through the communications circuit. The request requests encrypted data be written to a memory address of the host device. The processing device is further configured to identify a key associated with the write request based on the memory address. The processing device is further configured to generate a decrypted version of the data based on the key. The processing device is further configured to initiate transfer, through the communications circuit, of the decrypted version of the data to the host device.Type: GrantFiled: January 25, 2021Date of Patent: February 7, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Ramdas P. Kachare, Xuebin Yao, Jimmy K. Lau
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Publication number: 20230016328Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.Type: ApplicationFiled: September 26, 2022Publication date: January 19, 2023Inventors: Ramdas Kachare, Fred Worley, Xuebin Yao
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Patent number: 11487696Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.Type: GrantFiled: July 14, 2020Date of Patent: November 1, 2022Inventors: Ramdas Kachare, Fred Worley, Xuebin Yao
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Patent number: 11455270Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.Type: GrantFiled: July 14, 2020Date of Patent: September 27, 2022Inventors: Ramdas Kachare, Fred Worley, Xuebin Yao
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Publication number: 20220029793Abstract: A device includes a communications circuit configured to communicate with a storage device controller and a host device. The device further includes a processing device configured to receive a request from the storage device controller through the communications circuit. The request requests encrypted data be written to a memory address of the host device. The processing device is further configured to identify a key associated with the write request based on the memory address. The processing device is further configured to generate a decrypted version of the data based on the key. The processing device is further configured to initiate transfer, through the communications circuit, of the decrypted version of the data to the host device.Type: ApplicationFiled: January 25, 2021Publication date: January 27, 2022Inventors: Ramdas P. Kachare, Xuebin Yao, Jimmy K. Lau
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Publication number: 20210294761Abstract: According to one general aspect, a device may include a host interface circuit configured to communicate with a host device via a data protocol that employs data messages. The device may include a storage element configured to store data in response to a data message. The host interface circuit may be configured to detect when a tunneling command is embedded within the data message; extract a tunneled message address information from the data message; retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host device; and route the tunneled message to an on-board processor and/or data processing logic. The on-board processor and/or data processing logic may be configured to execute one or more instructions in response to the tunneled message.Type: ApplicationFiled: June 3, 2021Publication date: September 23, 2021Inventors: Ramdas P. KACHARE, Zvi GUZ, Son T. PHAM, Anahita SHAYESTEH, Xuebin YAO, Oscar Prem PINTO
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Publication number: 20210248049Abstract: A storage device configured for hardware verification is disclosed. The storage device comprises a first hardware component comprising a connector and a first verification logic. The first validation logic is configured to detect a criterion and generate a first signal via the connector in response to detecting the criterion. The storage device also comprises a second hardware component coupled to the first hardware component via the connector. The second hardware component comprises a second validation logic, where the second validation logic is configured to monitor and receive the first signal via the connector. In response to receiving the first signal, the second validation logic is configured to compare the received first signal to an expected signal and generate a result. The storage device is configured to take an action in response to the result.Type: ApplicationFiled: April 1, 2020Publication date: August 12, 2021Inventors: Sompong Paul Olarig, Xuebin Yao
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Patent number: 11030129Abstract: According to one general aspect, a device may include a host interface circuit configured to communicate with a host device via a data protocol that employs data messages. The device may include a storage element configured to store data in response to a data message. The host interface circuit may be configured to detect when a tunneling command is embedded within the data message; extract a tunneled message address information from the data message; retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host device; and route the tunneled message to an on-board processor and/or data processing logic. The on-board processor and/or data processing logic may be configured to execute one or more instructions in response to the tunneled message.Type: GrantFiled: February 18, 2020Date of Patent: June 8, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ramdas P. Kachare, Zvi Guz, Son T. Pham, Anahita Shayesteh, Xuebin Yao, Oscar Prem Pinto
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Publication number: 20210089477Abstract: According to one general aspect, a device may include a host interface circuit configured to communicate with a host device via a data protocol that employs data messages. The device may include a storage element configured to store data in response to a data message. The host interface circuit may be configured to detect when a tunneling command is embedded within the data message; extract a tunneled message address information from the data message; retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host device; and route the tunneled message to an on-board processor and/or data processing logic. The on-board processor and/or data processing logic may be configured to execute one or more instructions in response to the tunneled message.Type: ApplicationFiled: February 18, 2020Publication date: March 25, 2021Inventors: Ramdas P. KACHARE, Zvi GUZ, Son T. PHAM, Anahita SHAYESTEH, Xuebin YAO, Oscar Prem PINTO
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Patent number: 10846155Abstract: A host machine is disclosed. The host machine may include a host processor, a memory, an operating system running on the host processor, and an application running under the operating system on the host processor. The host machine may also include a Peripheral Component Interconnect Express (PCIe) tunnel to a Non-Volatile Memory Express (NVMe) Solid State Drive (SSD) and an RPC capture module which may capture the RPC from the application and deliver a result of the RPC to the application as though from the host processor, where the NVMe SSD may execute the RPC to generate the result.Type: GrantFiled: March 22, 2019Date of Patent: November 24, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ramdas P. Kachare, Zvi Guz, Son T. Pham, Anahita Shayesteh, Xuebin Yao, Oscar Prem Pinto
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Publication number: 20200341933Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.Type: ApplicationFiled: July 14, 2020Publication date: October 29, 2020Inventors: Ramdas Kachare, Fred Worley, Xuebin YAO
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Patent number: 10761775Abstract: According to some example embodiments, a method includes receiving, a first command from a host device; determining, if the first command is part of an association group of commands by determining a first value of a first parameter of the first command in an association context table entry is greater than zero, the first parameter including a total number of commands in the association group of commands; determining, a first value of a second parameter of the first command, the second parameter including a tag value identifying the association group of commands; decrementing, the first value of the first parameter of the first command in the association context table entry; determining, if the first value of the first parameter in the association context table entry is zero; and executing, an action indicated in a third parameter of the first command.Type: GrantFiled: August 21, 2018Date of Patent: September 1, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Ramdas P. Kachare, Oscar P. Pinto, Xuebin Yao, Wentao Wu, Stephen G. Fischer, Fred Worley
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Patent number: 10719474Abstract: A data storage device includes: a data storage medium; a processor comprising a plurality of processor cores; a plurality of application acceleration black-box (AABB) slots including reconfigurable logic blocks, interconnects, and memories; a host interface that receives a host command from a remote application running on a remote host computer, wherein the host command includes an image file including a register-transfer level (RTL) bitstream and a firmware driver; and a configuration controller that downloads the RTL bitstream to an AABB slot of the plurality of AABB slots and reconfigure the AABB slot, and load the firmware driver to a processor core of the processor. The processor core loaded with the firmware driver runs a data acceleration process of the remote application to access and process data stored in the data storage medium using the RTL bitstream downloaded in the AABB slot.Type: GrantFiled: March 14, 2018Date of Patent: July 21, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ramdas Kachare, Fred Worley, Xuebin Yao
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Publication number: 20200117525Abstract: A host machine is disclosed. The host machine may include a host processor, a memory, an operating system running on the host processor, and an application running under the operating system on the host processor. The host machine may also include a Peripheral Component Interconnect Express (PCIe) tunnel to a Non-Volatile Memory Express (NVMe) Solid State Drive (SSD) and an RPC capture module which may capture the RPC from the application and deliver a result of the RPC to the application as though from the host processor, where the NVMe SSD may execute the RPC to generate the result.Type: ApplicationFiled: March 22, 2019Publication date: April 16, 2020Inventors: Ramdas P. KACHARE, Zvi GUZ, Son T. PHAM, Anahita SHAYESTEH, Xuebin YAO, Oscar Prem PINTO
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Publication number: 20190250855Abstract: According to some example embodiments, a method includes receiving, a first command from a host device; determining, if the first command is part of an association group of commands by determining a first value of a first parameter of the first command in an association context table entry is greater than zero, the first parameter including a total number of commands in the association group of commands; determining, a first value of a second parameter of the first command, the second parameter including a tag value identifying the association group of commands; decrementing, the first value of the first parameter of the first command in the association context table entry; determining, if the first value of the first parameter in the association context table entry is zero; and executing, an action indicated in a third parameter of the first command.Type: ApplicationFiled: August 21, 2018Publication date: August 15, 2019Inventors: Ramdas P. Kachare, Oscar P. Pinto, Xuebin Yao, Wentao Wu, Stephen G. Fischer, Fred Worley