Patents by Inventor Xuebing JIANG

Xuebing JIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11761801
    Abstract: The present disclosure provides a multi-layer open channel portable flow measuring device based on a water impulse principle and a flow measuring method; an instantaneous water head height of a water-carrying section, namely, a water level H is measured through a pressure sensor at a bottom of a U-shaped hollow tube; at the same time, layered multi-point velocity measuring components in equidistant layout include a series of position “current meters” composed of tension sensors, hollow punching lightweight steel balls and lightweight elastic steel ropes to measure velocities V1-n of different points, n depends on the layer decided to be arranged according to a channel depth, an instantaneous flow value of the whole water-carrying section is further acquired through multi-layer flow accumulation, and with a simple structure, intelligent control, easy operation and convenient carrying, the present disclosure may further improve the flow measuring precision.
    Type: Grant
    Filed: December 28, 2022
    Date of Patent: September 19, 2023
    Assignee: Soil and Water Conservation Monitoring Center of Pearl River Basin, Pearl River Water Resources Commission of the Ministry of Water Resources
    Inventors: Hao Li, Le Li, Bin Liu, Pingwei Jin, Jun Huang, Xuebing Jiang, Xinyue Kou, Liping Lin, Zhou Xu, Guangyan Wu, Bin Yin, Xiaolin Liu
  • Publication number: 20230258485
    Abstract: The present disclosure provides a multi-layer open channel portable flow measuring device based on a water impulse principle and a flow measuring method; an instantaneous water head height of a water-carrying section, namely, a water level H is measured through a pressure sensor at a bottom of a U-shaped hollow tube; at the same time, layered multi-point velocity measuring components in equidistant layout include a series of position “current meters” composed of tension sensors, hollow punching lightweight steel balls and lightweight elastic steel ropes to measure velocities V1-n of different points, n depends on the layer decided to be arranged according to a channel depth, an instantaneous flow value of the whole water-carrying section is further acquired through multi-layer flow accumulation, and with a simple structure, intelligent control, easy operation and convenient carrying, the present disclosure may further improve the flow measuring precision.
    Type: Application
    Filed: December 28, 2022
    Publication date: August 17, 2023
    Inventors: Hao Li, Le Li, Bin Liu, Pingwei Jin, Jun Huang, Xuebing Jiang, Xinyue Kou, Liping Lin, Zhou Xu, Guangyan Wu, Bin Yin, Xiaolin Liu
  • Patent number: 11233070
    Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and a display panel are provided. The thin film transistor includes: a base substrate; and a gate electrode, a gate insulating layer, an active layer and a source/drain electrode layer which are on the base substrate. The source/drain electrode layer includes a source electrode and a drain electrode. The thin film transistor further includes a light blocking layer surrounding the active layer.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: January 25, 2022
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jilei Gao, Xuebing Jiang, Songmei Sun, Peng Wu, Jian Zhao, Yang Zhang, Mo Chen
  • Publication number: 20210165294
    Abstract: The embodiments of the present disclosure provide an array substrate, a driving method of an array substrate, a manufacturing method of an array substrate, and a display apparatus. The array substrate comprises a plurality of pixel units, each of which comprises a thin film transistor and a pixel electrode, wherein the thin film transistor comprises a gate line, a source connected to the pixel electrode, and a drain, wherein the gate line has a first overlapped region with the source in an orthogonal projection direction perpendicular to the array substrate, and each pixel unit further comprises an additional signal line provided to have a second overlapped region with the source in the orthogonal projection direction.
    Type: Application
    Filed: August 24, 2017
    Publication date: June 3, 2021
    Inventors: Xuebing Jiang, Jilei Gao
  • Patent number: 10983375
    Abstract: A display panel, a method for testing a cell gap thereof, and a display device are disclosed. The display panel includes a first substrate and a second substrate arranged opposite to each other, wherein a light shielding layer is provided on a side of the first substrate close to the second substrate, a portion of the light shielding layer located in a peripheral region includes a plurality of opening areas arranged at intervals, each opening area being provided with a light transmissive layer; and wherein the second substrate has a light transmissive area, an orthographic projection of the light transmissive layer on the second substrate at least partly overlaps with the light transmissive area on the second substrate.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: April 20, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Xuebing Jiang
  • Patent number: 10971104
    Abstract: A shift register includes an output sub-circuit and a compensation sub-circuit. The output sub-circuit is coupled to a pull-up node, a clock signal terminal and a signal output terminal. The compensation sub-circuit is coupled to the pull-up node, the clock signal terminal and the signal output terminal. The output sub-circuit is configured to transmit a voltage of the clock signal terminal to the signal output terminal under control of a voltage of the pull-up node, The compensation sub-circuit is configured to transmit a voltage of the signal output terminal to the pull-up node under control of the voltage of the pull-up node and the voltage of the clock signal terminal.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: April 6, 2021
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chengying Cao, Xingyi Liu, Xuebing Jiang, Guangying Mou, Peng Wu
  • Patent number: 10943551
    Abstract: A display substrate, a display device and a method for driving the same are provided. The display substrate includes a plurality of sub-regions. At least one subpixel unit, a common electrode voltage input line, a common electrode voltage control line and at least one control TFT are arranged at each sub-region. At each sub-region, a gate electrode of the control TFT is coupled to the common electrode voltage control line, a source electrode of the control TFT is coupled to the common electrode voltage input line, and a drain electrode of the control TFT is coupled to a common electrode of the subpixel unit.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: March 9, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jilei Gao, Xuebing Jiang, Qingpu Wang, Jun Li, Mo Chen, Jian Zhao, Yang Zhang
  • Publication number: 20210035516
    Abstract: A shift register includes an output sub-circuit and a compensation sub-circuit. The output sub-circuit is coupled to a pull-up node, a clock signal terminal and a signal output terminal. The compensation sub-circuit is coupled to the pull-up node, the clock signal terminal and the signal output terminal. The output sub-circuit is configured to transmit a voltage of the clock signal terminal to the signal output terminal under control of a voltage of the pull-up node, The compensation sub-circuit is configured to transmit a voltage of the signal output terminal to the pull-up node under control of the voltage of the pull-up node and the voltage of the clock signal terminal.
    Type: Application
    Filed: March 20, 2020
    Publication date: February 4, 2021
    Inventors: Chengying CAO, Xingyi LIU, Xuebing JIANG, Guangying MOU, Peng WU
  • Patent number: 10885858
    Abstract: An array substrate, a display panel, a display device and a method for designing the display panel are provided. The array substrate includes a plurality of pixel units, wherein each of the pixel units includes a plurality of sub-pixels, each of the sub-pixels includes a pixel electrode, and the pixel electrode includes a plurality of strip-shaped sub-pixel electrodes arranged in a comb-teeth form, and the sub-pixels of one of the pixel units include at least two sub-pixels. A width of the strip-shaped sub-pixel electrode of any one of the at least two sub-pixels is different from a width of the strip-shaped sub-pixel electrode of any other one of the at least two sub-pixels, and/or an interval between the strip-shaped sub-pixel electrodes of any one of the at least two sub-pixels is different from an interval between the strip-shaped sub-pixel electrodes of any other one of the at least two sub-pixels.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: January 5, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jilei Gao, Jinliang Liu, Yang Zhang, Xuebing Jiang, Songmei Sun
  • Publication number: 20200251499
    Abstract: A display panel and a method for manufacturing the same are disclosed. The display panel includes a first substrate and a second substrate which are cell-assembled; a metal layer, a black matrix and a spacer layer are disposed between the first substrate and the second substrate, and the spacer layer includes a plurality of spacers. Orthographic projections of any two of the spacer, the black matrix and the metal layer on the first substrate are at least partially overlapped with each other; the sum of the thicknesses of the spacer, the metal layer and the black matrix in a direction perpendicular to the first substrate is same at any position corresponding to the spacers.
    Type: Application
    Filed: September 27, 2017
    Publication date: August 6, 2020
    Applicants: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Peng Wu, Xuebing Jiang, Jilei Gao
  • Publication number: 20200219901
    Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and a display panel are provided. The thin film transistor includes: a base substrate; and a gate electrode, a gate insulating layer, an active layer and a source/drain electrode layer which are on the base substrate. The source/drain electrode layer includes a source electrode and a drain electrode. The thin film transistor further includes a light blocking layer surrounding the active layer.
    Type: Application
    Filed: March 23, 2020
    Publication date: July 9, 2020
    Inventors: Jilei GAO, Xuebing JIANG, Songmei SUN, Peng WU, Jian ZHAO, Yang ZHANG, Mo CHEN
  • Publication number: 20200219456
    Abstract: An array substrate, a display panel, a display device and a method for designing the display panel are provided. The array substrate includes a plurality of pixel units, wherein each of the pixel units includes a plurality of sub-pixels, each of the sub-pixels includes a pixel electrode, and the pixel electrode includes a plurality of strip-shaped sub-pixel electrodes arranged in a comb-teeth form, and the sub-pixels of one of the pixel units include at least two sub-pixels. A width of the strip-shaped sub-pixel electrode of any one of the at least two sub-pixels is different from a width of the strip-shaped sub-pixel electrode of any other one of the at least two sub-pixels, and/or an interval between the strip-shaped sub-pixel electrodes of any one of the at least two sub-pixels is different from an interval between the strip-shaped sub-pixel electrodes of any other one of the at least two sub-pixels.
    Type: Application
    Filed: July 13, 2017
    Publication date: July 9, 2020
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jilei GAO, Jinliang LIU, Yang ZHANG, Xuebing JIANG, Songmei SUN
  • Publication number: 20200175936
    Abstract: A display substrate, a display device and a method for driving the same are provided. The display substrate includes a plurality of sub-regions. At least one subpixel unit, a common electrode voltage input line, a common electrode voltage control line and at least one control TFT are arranged at each sub-region. At each sub-region, a gate electrode of the control TFT is coupled to the common electrode voltage control line, a source electrode of the control TFT is coupled to the common electrode voltage input line, and a drain electrode of the control TFT is coupled to a common electrode of the subpixel unit.
    Type: Application
    Filed: August 10, 2017
    Publication date: June 4, 2020
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jilei Gao, Xuebing Jiang, Qingpu Wang, Jun Li, Mo Chen, Jian Zhao, Yang Zhang
  • Patent number: 10636816
    Abstract: A thin film transistor, a manufacturing method thereof, an array substrate and a display panel are provided. The thin film transistor includes: a base substrate; and a gate electrode, a gate insulating layer, an active layer and a source/drain electrode layer which are on the base substrate. The source/drain electrode layer includes a source electrode and a drain electrode. The thin film transistor further includes a light blocking layer surrounding the active layer.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: April 28, 2020
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Jilei Gao, Xuebing Jiang, Songmei Sun, Peng Wu, Jian Zhao, Yang Zhang, Mo Chen
  • Patent number: 10509281
    Abstract: A display panel and a display device are disclosed, the display panel includes an opposed substrate and an array substrate opposite to each other, and a flexible printed circuit. The opposed substrate includes a conductive layer, which is configured for electrostatic prevention, the flexible printed circuit includes a first conductive structure connected to the conductive layer, and the conductive layer is grounded through the first conductive structure.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: December 17, 2019
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Yi Wang, Xuebing Jiang
  • Patent number: 10473992
    Abstract: The present application discloses a display panel including an array substrate and an opposing substrate facing the array substrate; a data line layer having a plurality of data lines on the array substrate; a passivation layer on a side of the data line layer proximal to the opposing substrate; a sealant layer on a side of the passivation layer distal to the data line layer, sealing the array substrate and the opposing substrate together; the display panel having a first area enclosed by the sealant layer and a second area outside of the first area and the sealant layer; the plurality of data lines extending from the first area into the second area; and a common electrode layer on a side of the sealant layer distal to the passivation layer.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: November 12, 2019
    Assignees: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Xuebing Jiang, Jilei Gao
  • Patent number: 10393511
    Abstract: A measuring device and method for a substrate warping amount includes a first substrate and a second substrate disposed oppositely. The measuring device includes a light source, a measuring eyepiece and a processor. The light source is configured to emit a monochromatic light to a region to be measured of the display motherboard, and form a Newton ring interference pattern. The measuring eyepiece is configured to acquire the Newton ring interference pattern and measure a diameter and a corresponding order number of each interference fringe in the Newton ring interference pattern. The processor is connected to the measuring eyepiece and configured to obtain a thickness of an air layer at each interference fringe according to the diameter and the corresponding order number of each interference fringe and a wavelength of the monochromatic light, to obtain a warping amount of the region to be measured of the display motherboard.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: August 27, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Xuebing Jiang
  • Patent number: 10325934
    Abstract: The present disclosure provides a display substrate, a fabricating method thereof, and a display apparatus including the display substrate. The display substrate includes a plurality of data lines and a plurality of common electrode lines. Each data line extends substantially along a first direction, and each common electrode line is along the first direction, and is configured such that a common electrode signal along the each common electrode line is substantially uniform. Each common electrode line can be substantially parallel to one data line to thereby substantially avoid a pulling effect on the common electrode signal along the each common electrode line caused by coupling between the each common electrode line and the one data line.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: June 18, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Xuebing Jiang
  • Patent number: 10319742
    Abstract: The disclosure relates to an array substrate, a display panel, a display device, and methods of manufacturing them. The array substrate includes: a base substrate, a first electrode, a first insulating layer, and a second electrode, the second electrode having a plurality of second electrode portions spaced apart from one another, the first electrode having overlapped portions that overlap the plurality of second electrode portions, the first electrode is one of a common electrode and a pixel electrode and the second electrode is the other; at least one of the second electrode and the overlapped portions has a recess recessing towards the base substrate and an area of an opening of the recess is larger than an area of a bottom of the recess.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: June 11, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD
    Inventors: Xuebing Jiang, Hui Wang, Jing Sun
  • Patent number: 10254594
    Abstract: Embodiments of the present disclosure relates to a liquid crystal drop filling system comprising a liquid crystal drop filling device performing a liquid crystal drop filling process to obtain a liquid crystal panel; an image acquisition device acquiring an image of the liquid crystal panel; an image processor processing the acquired image and determining a defect of the liquid crystal panel based on the processed image; and a communication module communicating an information about the defect determined by the image processor to the liquid crystal drop filling device, so that the liquid crystal drop filling device can adjust parameters of the liquid crystal drop filling process according to the information. In addition, the present disclosure further discloses a control method of a liquid crystal drop filling system.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: April 9, 2019
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xuebing Jiang, Ran Zhang, Jian Zhao