Abstract: A spin injection device and spin transistor including a spin injection device. A spin injection device includes different semiconductor materials and a spin-polarizing ferromagnetic material there between. The semiconductor materials may have different crystalline structures, e.g., a first material can be polycrystalline or amorphous silicon, and a second material can be single crystalline silicon. Charge carriers are spin-polarized when the traverse the spin-polarizing ferromagnetic material and injected into the second semiconductor material. A Schottky barrier height between the first semiconductor and ferromagnetic materials is larger than a second Schottky barrier height between the ferromagnetic and second semiconductor materials. A spin injection device may be a source of a spin field effect transistor.

Abstract: A spin injector for use in a microelectronic device such as a field effect transistor (FET) is disclosed. The spin injector includes an array of ferromagnetic elements disposed within a semiconductor. The ferromagnetic elements within the array are arranged and spaced with respect to one another in a close arrangement such that electrons or holes are spin-polarized when passing through. The spin injector may be located above or at least partially within a source region of the FET. A spin injector structure may also be located above or at least partially within the drain region of the FET. The spin injector includes a semiconductor material containing an array of ferromagnetic elements disposed in the semiconductor material, wherein adjacent ferromagnetic elements within the array are separated by a distance within the range between about 1 nm and 100 nm.

Abstract: A modulator for an optical transceiver is disclosed. The modulator has two quarter-wave stack mirrors composed of alternating dielectric layers with an optically absorbing layer sandwiched in between to form the vertical resonant cavity. The optically absorbing layer is made of semiconductor nanocrystals embedded in a dialectic material. The device is configured to operate near the saturation point of the absorption layer. By adjusting the biasing voltage across the absorption layer, the saturation threshold of the semiconductor nanocrystals is altered, resulting in the overall reflectivity of the resonant cavity to vary. The modulator is configured to be fabricated as the extension of the backend process of Si CMOS.

Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent and depositing a strained silicon germanium layer on the substrate. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.

Abstract: An integrated circuit laminate with a metal substrate for use with high performance mixed signal integrated circuit applications. The metal substrate provides substantially improved crosstalk isolation, enhanced heat sinking and an easy access to a true low impedance ground. In one embodiment, the metal layer has regions with insulation filled channels or voids and a layer of insulator such as unoxidized porous silicon disposed between the metal substrate and a silicon integrated circuit layer. The laminate also has a plurality of metal walls or trenches mounted to the metal substrate and transacting the silicon and insulation layers thereby isolating noise sensitive elements from noise producing elements on the chip. In another embodiment, the laminate is mounted to a flexible base to limit the flexion of the chip.

Abstract: An article of manufacture includes a substrate, a relaxed buffer layer disposed on the substrate, and a plurality of isolation regions formed in the relaxed buffer layer. The isolation regions include threading dislocations while the remainder of the relaxed buffer layer is substantially free of threading dislocations. The relaxed buffer layer may be formed from silicon germanium while the substrate may be formed from silicon. A capping layer may be disposed over the relaxed buffer layer.

Abstract: An integrated circuit laminate with a metal substrate for use with high performance mixed signal integrated circuit applications. The metal substrate provides substantially improved crosstalk isolation, enhanced heat sinking and an easy access to a true low impedance ground. In one embodiment, the metal layer has regions with insulation filled channels or voids and a layer of insulator such as unoxidized porous silicon disposed between the metal substrate and a silicon integrated circuit layer. The laminate also has a plurality of metal walls or trenches mounted to the metal substrate and transacting the silicon and insulation layers thereby isolating noise sensitive elements from noise producing elements on the chip. In another embodiment, the laminate is mounted to a flexible base to limit the flexion of the chip.

Abstract: A modulator for an optical transceiver is disclosed. The modulator has two quarter-wave stack mirrors composed of alternating dielectric layers with an optically absorbing layer sandwiched in between to form the vertical resonant cavity. The optically absorbing layer is made of semiconductor nanocrystals embedded in a dialectic material. The device is configured to operate near the saturation point of the absorption layer. By adjusting the biasing voltage across the absorption layer, the saturation threshold of the semiconductor nanocrystals is altered, resulting in the overall reflectivity of the resonant cavity to vary. The modulator is configured to be fabricated as the extension of the backend process of Si CMOS.

Abstract: A device having an optically active region includes a silicon substrate and a SiGe cladding layer epitaxially grown on the silicon substrate. The SiGe cladding layer includes a plurality of arrays of quantum dots separated by at least one SiGe spacing layer, the quantum dots being formed from a compound semiconductor material.

Abstract: A method of depositing conformal film into high aspect ratio spaces includes the step of forming a gradient of precursor gas inside the space(s) prior to deposition. The gradient may be formed, for example, by reducing the pressure within the deposition chamber or by partial evacuation of the deposition chamber. The temperature of the substrate is then briefly increased to preferentially deposit precursor material within the closed or “deep” portion of the high aspect ratio space. The process may be repeated for a number of cycles to completely fill the space(s). The process permits the filling of high aspect ratio spaces without any voids or keyholes that may adversely impact the performance of the resulting device.

Abstract: A method for forming dislocation-free strained silicon thin film includes the step of providing two curved silicon substrates. One substrate is curved by the presence of silicon dioxide on a back surface. The other substrate is curved by the presence of a silicon nitride layer. One of the substrates is subject to hydrogen implantation and the two substrates are bonded to one another in an annealing process. The two substrates are separated, thereby leaving a layer of strained silicon on a front side of one of the substrates. A back side layer of silicon dioxide or silicon nitride is then removed to restore the substrate to a substantially planar state. The method may be employed to form dislocation-free strained silicon thin films. The films may be under tensile or compressive strain.

Abstract: A method for forming dislocation-free strained silicon thin film includes the step of providing two curved silicon substrates. One substrate is curved by the presence of silicon dioxide on a back surface. The other substrate is curved by the presence of a silicon nitride layer. One of the substrates is subject to hydrogen implantation and the two substrates are bonded to one another in an annealing process. The two substrates are separated, thereby leaving a layer of strained silicon on a front side of one of the substrates. A back side layer of silicon dioxide or silicon nitride is then removed to restore the substrate to a substantially planar state. The method may be employed to form dislocation-free strained silicon thin films. The films may be under tensile or compressive strain.

Abstract: A method for forming dislocation-free strained silicon thin film includes the step of providing two curved silicon substrates. One substrate is curved by the presence of silicon dioxide on a back surface. The other substrate is curved by the presence of a silicon nitride layer. One of the substrates is subject to hydrogen implantation and the two substrates are bonded to one another in an annealing process. The two substrates are separated, thereby leaving a layer of strained silicon on a front side of one of the substrates. A back side layer of silicon dioxide or silicon nitride is then removed to restore the substrate to a substantially planar state. The method may be employed to form dislocation-free strained silicon thin films. The films may be under tensile or compressive strain.

Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent and depositing a strained silicon germanium layer on the substrate. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.

Abstract: Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications are used to fabricate two structures: (1) a first structure includes porous Si (silicon) regions extending throughout the thickness of an Si substrate that allows for the subsequent formation of metallized posts and metallized moats in the porous regions; and (2) a second structure includes staggered deep V-grooves or trenches etched into an Si substrate, or some other semiconductor substrate, from the front and/or the back of the substrate, wherein these V-grooves and trenches are filled or coated with metal to form the metallized moats.

Abstract: A method of forming a stressed thin film on a substrate includes the steps of depositing a thin film of silicon on a first substrate and transforming the first substrate into a porous substrate. The porous substrate containing the thin film of silicon is then transformed into a stressed state such that at least a portion of the stress is transferred to the thin film. The thin film may be under compressive stress or tensile stress. For example, volumetric expansion of the porous substrate imparts tensile stress to the thin film while volumetric contraction of the porous substrate imparts compressive stress to the thin film. The porous substrate containing the stressed thin film of silicon is then bonded to a second substrate. The porous substrate is removed so as to deposit the stressed thin film of silicon to the second substrate.

Abstract: A method of forming a self-assembled film on a substrate includes the steps of providing film precursors on the substrate, wherein the film precursors are maintained in an amorphous state. A dispensing member containing a pH adjusting medium is provided and the pH adjusting medium is dispensed onto the substrate wherein the pH adjusting medium promotes crystallization of the film precursor into a self-assembled film. The pH adjusting medium may either increase or decrease the pH of the film precursors so as to initiate the self-assembly of the film precursors into a crystalline film.

Abstract: A phase change random access memory (PRAM) element is provided that is driven by a MOSFET. The MOSFET includes, for example, a source region, a drain region, and a gate electrode disposed between the source region and the drain region. An insulator layer (e.g., oxide layer) separates the gate electrode from contact with the region of the substrate between the source and drain regions. A first electrode contact is coupled to the drain region of the MOSFET at one end and terminates at a surface. The surface of the first electrode contact is coated with a phase change material. A second electrode contact is provided having a surface coated with a layer of phase change material. The PRAM element includes at least one columnar member formed from a phase change material interposed between the phase change material layer of the first electrode and phase change material layer of the second electrode.

Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes depositing a strained silicon germanium layer on the substrate and irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.

Abstract: Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications are used to fabricate two structures: (1) a first structure includes porous Si (silicon) regions extending throughout the thickness of an Si substrate that allows for the subsequent formation of metallized posts and metallized moats in the porous regions; and (2) a second structure includes staggered deep V-grooves or trenches etched into an Si substrate, or some other semiconductor substrate, from the front and/or the back of the substrate, wherein these V-grooves and trenches are filled or coated with metal to form the metallized moats.