Patents by Inventor Ya-Ling Hsu

Ya-Ling Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147405
    Abstract: A controlling method for a wireless communication device is provided. The controlling method for the wireless communication device includes: attaching a first Universal Subscriber Identity Module (USIM) to a Long-Term Evolution (LTE) network; determining whether a second USIM is camped on the LTE network; detecting whether a paging collision is happened, if the second USIM is camped on the LTE network; generating a requested International Mobile Subscriber Identity (IMSI) offset for the second USIM, if the paging collision is happened, wherein the requested IMSI offset is 1 or min(T, nB)?1, T is a default paging period and nB is a number of paging occurrences within the default paging period; transmitting an attach request with the requested IMSI offset to the LTE network for the second USIM; receiving a negotiated IMSI offset from the LTE network; and attaching the second USIM to the LTE network with the negotiated IMSI offset.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 2, 2024
    Inventors: Kuan-Yu LIN, Ya-ling Hsu, Wan-Ting Huang, Yi-Han CHUNG, Yi-Cheng CHEN
  • Patent number: 11930663
    Abstract: A display panel includes a first substrate, pixel structures, a first common pad, a second substrate, a second common electrode, a display medium and a conductive particle. The pixel structures are disposed on an active area of the first substrate. The first common pad is disposed on a peripheral area of the first substrate, and is electrically connected to first common electrodes of the pixel structures. The second common electrode is disposed on the second substrate. The conductive particle is disposed on the first common pad, and is electrically connected to the first common pad and the second common electrode. The conductive particle includes a core and a conductive film disposed on a surface of the core, where the conductive film has a main portion and raised portions, and a film thickness of each of the raised portions is greater than a film thickness of the main portion.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: March 12, 2024
    Assignee: Au Optronics Corporation
    Inventors: Bo-Chen Chen, Yun-Ru Cheng, Ya-Ling Hsu, Chia-Hsuan Pai, Cheng-Wei Huang, Wei-Shan Chao
  • Publication number: 20240047435
    Abstract: A luminous panel includes a circuit board, a plurality of connecting pads, a chip and two alignment structures. The connecting pads are located on the circuit board. The chip is located on the circuit board and at least partially covers the connecting pads. The two alignment structures are located on the circuit board. The two alignment structures and the connecting pads are at the same level. The two alignment structures are located at two diagonal corners of the chip. At least one part of the two alignment structures protrudes from the outline of the chip.
    Type: Application
    Filed: December 27, 2022
    Publication date: February 8, 2024
    Inventors: Tzu-Chun LIN, Sheng-Yen CHENG, Jia-Hong WANG, Yueh-Hung CHUNG, Ya-Ling HSU, Chen-Hsien LIAO
  • Patent number: 11876103
    Abstract: A display panel includes a plurality of sub-pixel structures and a plurality of transfer elements. The sub-pixel structures include a plurality of first sub-pixel structures. A data line of each of the first sub-pixel structures is disposed adjacent to a corresponding transfer element, and a scan line of each of the first sub-pixel structures is electrically connected to the corresponding transfer element. The first sub-pixel structures include a plurality of first-type sub-pixel structures and a plurality of second-type sub-pixel structures. When the display panel displays a grayscale picture, each of the first-type sub-pixel structures has first brightness, each of the second-type sub-pixel structures has second brightness. The first brightness is less than the second brightness. A total number of the first sub-pixel structures of the display panel is A, a number of the first-type sub-pixel structures in the first sub-pixel structures is a, and 50%<(a/A)<100%.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: January 16, 2024
    Assignee: AUO Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11810923
    Abstract: A pixel array substrate includes data lines, first gate lines, pixel structures, first common lines, and conductive line sets. The conductive line sets are arranged in a first direction. Each of the conductive line sets includes first conductive line groups and a second conductive line group sequentially arranged in the first direction. Each of the first conductive line groups includes second gate lines and a second common line. The second conductive line group includes first auxiliary lines and a second common line. An arrangement order of the second gate lines and the second common line of each of the first conductive line groups in the first direction are the same as an arrangement order of the first auxiliary lines and the second common line of the second conductive line group in the first direction, respectively.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: November 7, 2023
    Assignee: AUO Corporation
    Inventors: Ping-Wen Chen, Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Yueh-Chi Wu, Shu-Wen Liao, Ti-Kuei Yu, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11776444
    Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: October 3, 2023
    Assignee: Au Optronics Corporation
    Inventors: Yang-Chun Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Min-Tse Lee, Kuang-Hsiang Liao, Shiang-Lin Lian, Yan-Kai Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Publication number: 20230267874
    Abstract: A display device comprising a plurality of ordinary pixels, an auxiliary pixel, a frame and a driving chip is provided. The auxiliary pixel includes a plurality of first color sub-pixels. The frame is configured to define an active area in a non-rectangular shape. The plurality of ordinary pixels and the auxiliary pixel are arranged in the active area. The driving chip is configured to receive display data, wherein the display data includes a first color grayscale value configured to assign first target luminance of first color light of the auxiliary pixel. The driving chip is configured to generate one or more processed first color grayscale values configured to assign the luminance of the plurality of first color sub-pixels, according to the first color grayscale value, and the sum of the luminance of the plurality of first color sub-pixels is substantially equal to the first target luminance.
    Type: Application
    Filed: November 16, 2022
    Publication date: August 24, 2023
    Inventors: Ya-Ling HSU, Peng-Bo XI
  • Patent number: 11705462
    Abstract: An electronic device includes a substrate, multiple transversal signal lines, a first vertical signal line, a second vertical signal line, a shielding wire, and multiple pixel structures. The first vertical signal line is intersected with the transversal signal lines. The second vertical signal line is intersected with the transversal signal lines and connected to one of the transversal signal lines. An orthogonal projection of the shielding wire on the substrate is located between an orthogonal projection of the first vertical signal line and an orthogonal projection of the second vertical signal line on the substrate. One of the pixel structures is surrounded by a corresponding one of the transversal signal lines and the second vertical signal line and includes an active device. A gate and a source of the active device is electrically connected to the corresponding one transversal signal line and the first vertical signal line respectively.
    Type: Grant
    Filed: August 17, 2020
    Date of Patent: July 18, 2023
    Assignee: Au Optronics Corporation
    Inventors: Ya-Ling Hsu, Min-Tse Lee, Ti-Kuei Yu, Yueh-Chi Wu, Shu-Wen Liao, Hung-Chia Liao, Yueh-Hung Chung, Jia-Hong Wang, Ping-Wen Chen, Sheng-Yen Cheng, Chen-Hsien Liao
  • Publication number: 20230197736
    Abstract: A pixel array substrate includes data lines, first gate lines, pixel structures, first common lines, and conductive line sets. The conductive line sets are arranged in a first direction. Each of the conductive line sets includes first conductive line groups and a second conductive line group sequentially arranged in the first direction. Each of the first conductive line groups includes second gate lines and a second common line. The second conductive line group includes first auxiliary lines and a second common line. An arrangement order of the second gate lines and the second common line of each of the first conductive line groups in the first direction are the same as an arrangement order of the first auxiliary lines and the second common line of the second conductive line group in the first direction, respectively.
    Type: Application
    Filed: February 22, 2023
    Publication date: June 22, 2023
    Applicant: AUO Corporation
    Inventors: Ping-Wen Chen, Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Yueh-Chi Wu, Shu-Wen Liao, Ti-Kuei Yu, Ya-Ling Hsu, Chen-Hsien Liao
  • Publication number: 20230197737
    Abstract: A display panel includes a plurality of sub-pixel structures and a plurality of transfer elements. The sub-pixel structures include a plurality of first sub-pixel structures. A data line of each of the first sub-pixel structures is disposed adjacent to a corresponding transfer element, and a scan line of each of the first sub-pixel structures is electrically connected to the corresponding transfer element. The first sub-pixel structures include a plurality of first-type sub-pixel structures and a plurality of second-type sub-pixel structures. When the display panel displays a grayscale picture, each of the first-type sub-pixel structures has first brightness, each of the second-type sub-pixel structures has second brightness. The first brightness is less than the second brightness. A total number of the first sub-pixel structures of the display panel is A, a number of the first-type sub-pixel structures in the first sub-pixel structures is a, and 50%<(a/A)<100%.
    Type: Application
    Filed: February 24, 2023
    Publication date: June 22, 2023
    Applicant: AUO Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11663963
    Abstract: A pixel circuit includes a light emitting element, a first local light emitting switch, a second local light emitting switch, a common light emitting switch, and a driving block. The light emitting element has a first light emitting part and a second light emitting part. The first local light emitting switch is coupled between a first power terminal and the driving block. The second local light emitting switch is coupled between a second power terminal and the driving block. The common light emitting switch is coupled between the driving block and the light emitting element. The driving block provides a first driving current and a second driving current to the first light emitting part and the second light emitting part respectively based on a first frame gate signal and a second frame gate signal; a direction of the first driving current is different from that of the second driving current.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: May 30, 2023
    Assignee: AUO Corporation
    Inventors: Ya-Ling Hsu, Peng-Bo Xi
  • Patent number: 11626425
    Abstract: A display panel includes a plurality of sub-pixel structures and a plurality of transfer elements. The sub-pixel structures include a plurality of first sub-pixel structures. A data line of each of the first sub-pixel structures is disposed adjacent to a corresponding transfer element, and a scan line of each of the first sub-pixel structures is electrically connected to the corresponding transfer element. The first sub-pixel structures include a plurality of first-type sub-pixel structures and a plurality of second-type sub-pixel structures. When the display panel displays a grayscale picture, each of the first-type sub-pixel structures has first brightness, each of the second-type sub-pixel structures has second brightness. The first brightness is less than the second brightness. A total number of the first sub-pixel structures of the display panel is A, a number of the first-type sub-pixel structures in the first sub-pixel structures is a, and 50%<(a/A)<100%.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: April 11, 2023
    Assignee: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11610920
    Abstract: A pixel array substrate includes data lines, first gate lines, pixel structures, first common lines, and conductive line sets. The conductive line sets are arranged in a first direction. Each of the conductive line sets includes first conductive line groups and a second conductive line group sequentially arranged in the first direction. Each of the first conductive line groups includes second gate lines and a second common line. The second conductive line group includes first auxiliary lines and a second common line. An arrangement order of the second gate lines and the second common line of each of the first conductive line groups in the first direction are the same as an arrangement order of the first auxiliary lines and the second common line of the second conductive line group in the first direction, respectively.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: March 21, 2023
    Assignee: Au Optronics Corporation
    Inventors: Ping-Wen Chen, Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Yueh-Chi Wu, Shu-Wen Liao, Ti-Kuei Yu, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11586085
    Abstract: A display apparatus including data lines, first gate lines, pixel structures, second gate lines, and first common lines is provided. The data lines are arranged in a first direction. The first gate lines are arranged in a second direction. The data lines and the second gate lines are arranged in the first direction, and the second gate lines are electrically connected to the first gate lines. The pixel structures are arranged in pixel columns which are arranged in the first direction. Each of the first common lines and the corresponding second gate line are configured between two adjacent pixel columns. The first common line and the corresponding second gate line are configured respectively on the opposite sides of the first gate line which is electrically connected to the corresponding second gate line. The first common line and the corresponding second gate line are structurally separated.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: February 21, 2023
    Assignee: Au Optronics Corporation
    Inventors: Sheng-Yen Cheng, Min-Tse Lee, Hung-Chia Liao, Jia-Hong Wang, Ping-Wen Chen, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11574935
    Abstract: A pixel array substrate, including gate elements and transfer elements, is provided. The gate elements include an n-th gate element and an m-th gate element. The transfer elements include a n-th transfer element and an m-th transfer element electrically connected to the n-th gate element and the m-th gate element respectively. A peripheral portion of each of the transfer elements includes a first straight section. A peripheral portion of the n-th transfer element further includes a first lateral section. The first lateral section of the n-th transfer element and the first straight section of the n-th transfer element respectively belong to a first conductive layer and a second conductive layer. A peripheral portion of the m-th transfer element crosses over the first lateral section of the peripheral portion of the n-th transfer element.
    Type: Grant
    Filed: August 19, 2020
    Date of Patent: February 7, 2023
    Assignee: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao, Peng-Che Tai, Ping-Hung Shih
  • Patent number: 11520190
    Abstract: An electronic device including a substrate, transversal signal lines, a first vertical signal line, a second vertical signal line, and a first shielding vertical line is provided. The transversal signal lines, the first vertical signal line, the second vertical signal line, and the first shielding vertical line are disposed on the substrate. The first vertical signal line and the second vertical signal line are intersected with the transversal signal lines. The second vertical signal line is connected to one of the transversal signal lines. An orthogonal projection of the first shielding vertical line on the substrate is between an orthogonal projection of the first vertical signal line on the substrate and an orthogonal projection of the second vertical signal line on the substrate.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: December 6, 2022
    Assignee: Au Optronics Corporation
    Inventors: Yueh-Hung Chung, Min-Tse Lee, Sheng-Yen Cheng, Ping-Wen Chen, Jia-Hong Wang, Ti-Kuei Yu, Ya-Ling Hsu, Chen-Hsien Liao
  • Publication number: 20220382122
    Abstract: An image displacement device includes a first grating and a second grating. The first grating has a first surface and a second surface opposite the first surface, the first surface receives image beams, and the image beams leave the first grating by the second surface. The second grating is disposed downstream from the first grating in a light path and has a third surface and a fourth surface opposite the third surface. The third surface receives the image beams, and the image beams leave the second grating by the fourth surface. The image beams are projected to form a plane image comprised of pixels, each pixel is displaced in a direction by the image displacement device, and a displacement of each pixel is smaller than five times a width of one pixel.
    Type: Application
    Filed: August 8, 2022
    Publication date: December 1, 2022
    Inventors: Ming-Chih CHEN, YA-LING HSU
  • Patent number: 11502114
    Abstract: A display panel including sub-pixels, first and second scan lines, first and second data lines, and first to fourth auxiliary lines is provided. The sub-pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. Each third auxiliary line is electrically connected to a second auxiliary line and a first auxiliary line electrically connected to a first scan line. Each fourth auxiliary line is electrically connected to a second scan line and a first scan line. There are at least 2n second rows between each third auxiliary line and the first scan line electrically connected thereto, there are at least 2n+1 second rows between each third auxiliary line and the second scan line electrically connected thereto, and n is a positive integer.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: November 15, 2022
    Assignee: Au Optronics Corporation
    Inventors: Jia-Hong Wang, Min-Tse Lee, Sheng-Yen Cheng, Ping-Wen Chen, Hung-Chia Liao, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11462148
    Abstract: A pixel array substrate includes a substrate, a plurality of data lines, a plurality of scan lines, a plurality of sub-pixels, and a first and a second auxiliary lines. The plurality of sub-pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. The first auxiliary line and the plurality of scan lines belong to a first conductive layer. The second auxiliary line and the plurality of data lines belong to a second conductive layer. The first auxiliary line is located between two scan lines. A first end of the first auxiliary line is connected to one of the two scan lines. A second end of the first auxiliary line is separated from the other one of the two scan lines. The second auxiliary line is electrically connected to the first auxiliary line at the second end through a conductive via.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: October 4, 2022
    Assignee: AU Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Ping-Wen Chen, Yueh-Hung Chung, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11442333
    Abstract: An image displacement device includes a first grating and a second grating. Each grating is switchable between a diffracting state and a non-diffracting state. The first grating has a first surface and a second surface opposite the first surface, the first surface receives image beams, and the image beams leave the first grating by the second surface. The second grating is disposed downstream from the first grating in a light path and has a third surface and a fourth surface opposite the third surface. The third surface receives the image beams, and the image beams leave the second grating by the fourth surface. An exit direction of the image beam exiting the second grating is shifted a distance in a first direction from an incident direction of the image beam incident to the first grating.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: September 13, 2022
    Assignee: YOUNG OPTICS INC.
    Inventors: Ming-Chih Chen, Ya-Ling Hsu