Patents by Inventor Ya Wang

Ya Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260248981
    Abstract: An artificial bone material is described, wherein, based on 100% by mass of the total dry matter of the artificial bone material, the artificial bone material comprises: 70%-90% of coralline hydroxyapatite particles, 5%-30% of a recombinant human collagen, and 0%-7% of an excipient. The artificial bone material has a high porosity and a longitudinal gradient structure, can mimic the properties of natural bone tissue, exhibits superior biocompatibility, biodegradability, hydrophilicity, osteogenic properties, and shape memory function.
    Type: Application
    Filed: June 26, 2025
    Publication date: August 27, 2026
    Inventors: Zhen Tian, Jing Zheng, Yuan Li, Ya Wang
  • Publication number: 20260248983
    Abstract: A method for bone repair is disclosed, comprising preparing the composition into a bone repair material and implanting the bone repair material into a bone defect in a patient, wherein, based on 100% by mass of the total dry matter of the composition being 100%, the material comprises: 70%-90% of coralline hydroxyapatite particles, 5%-30% of recombinant human collagen, and 0%-7% of excipient, and the bone repair material is a cancellous bone-mimicking material with a porosity of 85%-99%. The composition provided by the present disclosure has a high porosity and a longitudinal gradient structure, can mimic the properties of natural bone tissue, exhibits superior biocompatibility, biodegradability, hydrophilicity, osteogenic properties, and shape memory function, has excellent clinical convenience, hemostatic and healing-promoting effects, and excellent osteogenic effect, and has wide application prospects in the preparation of bone repair materials for filling and/or repairing bone defects.
    Type: Application
    Filed: June 26, 2025
    Publication date: August 27, 2026
    Inventors: Zhen Tian, Jianing Hou, Yuan Li, Ya Wang
  • Patent number: 12720725
    Abstract: A semiconductor device and methods for forming the same are provided. The semiconductor device includes an array of vertical transistors. Each transistor includes a semiconductor body extending in a vertical direction, and a gate structure located adjacent to a sidewall of the semiconductor body. The gate structures of each row of vertical transistors are connected with each other and extend along a first lateral direction to form a word line. A first word line of a first row of vertical transistors is located at a first side of the semiconductor bodies of the first row of vertical transistors along a second lateral direction perpendicular to the first lateral direction; and a second word line of a second row of vertical transistors adjacent to the first row of vertical transistors is located at a second side of the semiconductor bodies of the second row of vertical transistors along the second lateral direction.
    Type: Grant
    Filed: July 17, 2023
    Date of Patent: August 25, 2026
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Wei Liu, Hongbin Zhu, Yanhong Wang, Bingjie Yan, Wenyu Hua, Fandong Liu, Ya Wang
  • Patent number: 12712959
    Abstract: This application provides a port frame, a middle frame component, and an electronic device. The port frame includes a frame body, a connection bump, and a positioning structure. A frame hole is formed on the frame body, the frame body has a frame surface, and the frame surface is configured to come into contact with a first middle frame surface. The frame body may be formed through injection molding of metal powder, to improve structural strength. The connection bump is connected to the frame body, the connection bump has a connection surface that forms an included angle with the frame surface, the connection surface is configured to come into contact with a second middle frame surface, and the connection bump is fixedly connected to the middle frame body, and is electrically connected to both the frame body and the middle frame body.
    Type: Grant
    Filed: August 2, 2023
    Date of Patent: August 18, 2026
    Assignee: HONOR DEVICE CO., LTD.
    Inventors: Chenyu Wang, Ya Wang, Kuibing Zhao, Wenxing Yao
  • Publication number: 20260221188
    Abstract: A method includes discharging a voltage of a first word line to a first voltage after performing a first read operation on a first memory cell; floating the first word line after discharging the voltage of the first word line to the first voltage; applying a second voltage to the first word line in a first phase of performing a second read operation on the first memory cell, wherein the second read operation is after floating the first word line, and the second voltage is greater than the first voltage; and applying a pre pulse voltage to the first word line in a second phase of performing the second read operation, wherein the second phase is after the first phase, and the pre pulse voltage is greater than the second voltage.
    Type: Application
    Filed: June 12, 2025
    Publication date: July 30, 2026
    Inventors: Yu ZHANG, Lei JIN, Da LI, Wei QI, Ya WANG, ZongLiang HUO
  • Patent number: 12682955
    Abstract: In some examples, a peripheral circuit is configured to: when performing a first read operation on memory cells coupled to a selected word line, apply a first pass voltage to a first word line, apply a second pass voltage to a second word line, and apply a third pass voltage to a third word line, wherein the first word line comprises at least one word line physically located above and below the selected word line respectively, both the second word line and the third word line comprise word lines physically located on a side of the first word line away from the selected word line, memory cells coupled to the second word line comprise programmed memory cells, memory cells coupled to the third word line comprise unprogrammed memory cells, and the first pass voltage, the second pass voltage and the third pass voltage are all different.
    Type: Grant
    Filed: January 10, 2024
    Date of Patent: July 14, 2026
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Wei Qi, Da Li, Ya Wang, Feng Xu, Yaoyao Tian, Wenping Chen, Shuai Zhang
  • Publication number: 20260190327
    Abstract: Systems, devices, and methods for managing air gaps in a semiconductor device are provided. In one aspect, a semiconductor device includes a first array structure including bit lines, where two adjacent bit lines are separated by a first isolation structure having a first air gap; a second array structure adjacent to the first array structure along the first direction, the second array structure including connection lines, where two adjacent connection lines are separated by a second isolation structure having a second air gap; and a gate line. A first end of the first air gap is on a first side of a first end of the second air gap, the gate line is on a second side of the first end of the second air gap.
    Type: Application
    Filed: January 17, 2025
    Publication date: July 2, 2026
    Inventors: Meng YAN, Yijie NIE, Ya WANG, Zhaoyun TANG
  • Publication number: 20260099176
    Abstract: This application provides a housing and an electronic device. The housing includes a frame body and an overmolded part. A first mounting frame of the frame body is provided with a first mounting groove, and a first sidewall of the first mounting groove is provided with a retention groove. A first convex rib of the first mounting frame is fixedly connected to the first sidewall, a side surface of the first convex rib is recessed inwardly toward the first convex rib, and a first limiting groove is formed between the side surface of the first convex rib and the first sidewall. A second mounting frame of the overmolded part includes a second sidewall, the second sidewall is provided with a first groove, and a sidewall of the first groove is provided with a first engagement part.
    Type: Application
    Filed: December 10, 2025
    Publication date: April 9, 2026
    Inventors: Zhe ZHAO, Chenyu WANG, Ya WANG, Yang LIU, Hongde YANG
  • Publication number: 20260088094
    Abstract: Methods, devices, and systems for managing memory devices are provided. In one aspect, a method includes, during a first loop of a program operation, applying a first program voltage to a first word line, and applying, to a second word line, a first pass voltage during a first stage of the first loop and a second pass voltage during a second stage of the first loop. The method further includes, during a second loop of the program operation, applying a second program voltage to the first word line, and applying, to the second word line, a third pass voltage during a first stage of the second loop and a fourth pass voltage during a second stage of the second loop. A difference between the fourth pass voltage and the third pass voltage is greater than a difference between the second pass voltage and the first pass voltage.
    Type: Application
    Filed: October 4, 2024
    Publication date: March 26, 2026
    Inventors: Wei QI, Guoqi JI, Yong NIE, Zikang AI, Da LI, Ya WANG, Wenping CHEN, Kaikai YOU, Jiameng CUI
  • Publication number: 20260087707
    Abstract: An artificial intelligence-based avatar creation and editing system and method are disclosed. The system may receive user input associated with a set of avatar modifications. The system may further process the input, by a large language model fine-tuned, to facilitate avatar editing. The system may further generate, based on the processed user input, the set of avatar modifications within constraints of an available asset catalog. The system may further apply the generated set of avatar modifications to update a target avatar. The system may further output the updated target avatar to a display.
    Type: Application
    Filed: September 23, 2025
    Publication date: March 26, 2026
    Inventors: David Abraham Harris, Leon Zhan, Anton Pidkuiko, Ya Wang, Rahul Kumar, Igor Lifar
  • Patent number: 12576184
    Abstract: A coralline hydroxyapatite having a pore size of 30 ?m to 1300 ?m, a porosity of 50% to 70%, and a conversion rate of 50% or more, and a preparation method are disclosed. The preparation method comprises: soaking pretreated corallite in a cutting protective agent, and then cutting to obtain cut corallite, and screening for cut corallite that meets a cutting size requirement to obtain an acceptable product of cut corallite; fully soaking the acceptable product of cut corallite in a phosphate solution, and performing a hydrothermal exchange reaction to obtain the coralline hydroxyapatite; wherein the cutting protective agent is a solution containing a polyol. The preparation method can significantly improve the cutting efficiency, broaden the cutting specifications and sizes, and significantly improve the yield of acceptable product, especially the yield of acceptable small-size products, which further broadens the application range of artificial bones.
    Type: Grant
    Filed: June 24, 2025
    Date of Patent: March 17, 2026
    Assignee: WitKang Zhiyuan Medical Devices (Xi'an) Co., Ltd.
    Inventors: Jiuna Wang, Liang Chen, Ya Wang, Yanting Li, Jianing Hou, Yuan Li
  • Patent number: 12579998
    Abstract: A method for storing and acquiring information using fluorescence defects in wide bandgap materials, a device, an apparatus and a storage medium are provided, which are applied to a field of optical information storage technology. The method includes: determining a processing parameter group, where the processing parameter group is configured to store target information into wide bandgap materials, and the processing parameter group comprises at least one processing parameter; performing a processing at M storage addresses of the wide bandgap materials based on the processing parameter group, so that fluorescence defects matching the target information are generated at the M storage addresses, where M is a positive integer.
    Type: Grant
    Filed: September 25, 2023
    Date of Patent: March 17, 2026
    Assignee: University of Science and Technology of China
    Inventors: Jingyang Zhou, Kangwei Xia, Ya Wang, Jiangfeng Du
  • Publication number: 20260066006
    Abstract: Examples of the present disclosure provide a memory device, an operation method thereof, a memory system and a storage medium. The memory device includes a memory cell array including: a plurality of memory cells, and a peripheral circuit coupled with the memory cell array and configured to apply a read voltage to a selected word line coupled to a target memory cell of the plurality of memory cells and apply a pass voltage to a non-selected word line adjacent to the selected word line when performing a read operation on the target memory cell, wherein the pass voltage is related to the read voltage and a working temperature of the memory device when the read operation is performed.
    Type: Application
    Filed: February 11, 2025
    Publication date: March 5, 2026
    Inventors: Ya Wang, Wei Qi, Junyi Liao, Da Li, XiangNan Zhao
  • Publication number: 20260018188
    Abstract: A method for storing and acquiring information using fluorescence defects in wide bandgap materials, a device, an apparatus and a storage medium are provided, which are applied to a field of optical information storage technology. The method includes: determining a processing parameter group, where the processing parameter group is configured to store target information into wide bandgap materials, and the processing parameter group comprises at least one processing parameter; performing a processing at M storage addresses of the wide bandgap materials based on the processing parameter group, so that fluorescence defects matching the target information are generated at the M storage addresses, where M is a positive integer.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 15, 2026
    Inventors: Jingyang ZHOU, Kangwei XIA, Ya WANG, Jiangfeng DU
  • Patent number: 12525309
    Abstract: A memory system comprises: a memory device including a first word line; and a memory controller coupled to the memory device and configured to: acquire the number of read failure bits of a memory cell page coupled to the first word line; determine whether the number of read failure bits of the memory cell page is greater than a preset threshold; and control the memory device to perform a reprogram operation on the memory cell page in response to the number of read failure bits of the memory cell page being greater than the preset threshold.
    Type: Grant
    Filed: January 10, 2024
    Date of Patent: January 13, 2026
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Shuai Zhang, Yaoyao Tian, Ya Wang, Wei Qi, Da Li, Wenping Chen
  • Patent number: 12519376
    Abstract: An electric work machine in one aspect of the present disclosure includes an electric power input terminal, a motor, a circuit board, a first heat dissipation plate, and a second heat dissipation plate. The circuit board includes a first surface and an electronic circuit on the first surface. The electronic circuit controls supply of AC power to the motor. The electronic circuit includes an electronic component that generates Joule heat. The first heat dissipation plate is spaced from the first surface by a first distance in parallel to the first surface. The second heat dissipation plate is spaced from the first surface by a second distance in parallel to the first surface. The second heat dissipation plate is thermally coupled with the first heat dissipation plate. The second distance is smaller than the first distance.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: January 6, 2026
    Assignee: MAKITA CORPORATION
    Inventors: Jie Chen, Katsuhito Fujinami, Hong Jun Pang, Ya Wang, Fuchao Luan, Akira Naito
  • Publication number: 20260006735
    Abstract: Embodiments of this application provide a foldable structural member, a manufacturing method thereof, and a foldable electronic device. The foldable structural member includes a first middle frame and a second middle frame, a first protective layer and an injection molding layer that are successively stacked in corresponding regions of the first middle frame and the second middle frame, and an anti-corrosion layer disposed between the injection molding layer and the first protective layer. The special anti-corrosion design provides feasibility for a magnesium alloy to be used as a metal body in a rotating open region of the foldable structural member, so that the structural member can be configured to provide a lighter and thinner foldable electronic device.
    Type: Application
    Filed: September 8, 2025
    Publication date: January 1, 2026
    Inventors: Chunyang Li, Dongsheng Tan, Yuan Miao, Kangle Xue, Ya Wang, Shanhui Gao
  • Publication number: 20250374518
    Abstract: Systems, devices, and methods for managing dishing recess in a semiconductor device are provided. In one aspect, a semiconductor device includes a first body structure located in an array region. The first body structure includes a first connection line extending along a first direction. The semiconductor device includes a second body structure located in an edge region adjacent to the array region. The second body structure includes a second connection line extending along the first direction and having a dishing recess. A width of the second connection line along a second direction is greater than a width of the first connection line along the second direction. The second direction is perpendicular to the first direction. The semiconductor device includes a blocking layer inside the dishing recess of the second connection line.
    Type: Application
    Filed: July 31, 2024
    Publication date: December 4, 2025
    Inventors: Ya WANG, Pengfei ZHANG, Mingliang XU, Yugang WU, Xiuhuan ZOU, Yifeng CHEN
  • Patent number: D1105573
    Type: Grant
    Filed: August 20, 2024
    Date of Patent: December 9, 2025
    Assignee: Hunan Shengxin Intelligent Technology Co., Ltd.
    Inventor: Ya Wang
  • Patent number: D1119788
    Type: Grant
    Filed: June 20, 2024
    Date of Patent: March 24, 2026
    Inventor: Ya Wang