Abstract: This application provides a housing and an electronic device. The housing includes a frame body and an overmolded part. A first mounting frame of the frame body is provided with a first mounting groove, and a first sidewall of the first mounting groove is provided with a retention groove. A first convex rib of the first mounting frame is fixedly connected to the first sidewall, a side surface of the first convex rib is recessed inwardly toward the first convex rib, and a first limiting groove is formed between the side surface of the first convex rib and the first sidewall. A second mounting frame of the overmolded part includes a second sidewall, the second sidewall is provided with a first groove, and a sidewall of the first groove is provided with a first engagement part.

Abstract: Methods, devices, and systems for managing memory devices are provided. In one aspect, a method includes, during a first loop of a program operation, applying a first program voltage to a first word line, and applying, to a second word line, a first pass voltage during a first stage of the first loop and a second pass voltage during a second stage of the first loop. The method further includes, during a second loop of the program operation, applying a second program voltage to the first word line, and applying, to the second word line, a third pass voltage during a first stage of the second loop and a fourth pass voltage during a second stage of the second loop. A difference between the fourth pass voltage and the third pass voltage is greater than a difference between the second pass voltage and the first pass voltage.

Abstract: An artificial intelligence-based avatar creation and editing system and method are disclosed. The system may receive user input associated with a set of avatar modifications. The system may further process the input, by a large language model fine-tuned, to facilitate avatar editing. The system may further generate, based on the processed user input, the set of avatar modifications within constraints of an available asset catalog. The system may further apply the generated set of avatar modifications to update a target avatar. The system may further output the updated target avatar to a display.

Abstract: A coralline hydroxyapatite having a pore size of 30 ?m to 1300 ?m, a porosity of 50% to 70%, and a conversion rate of 50% or more, and a preparation method are disclosed. The preparation method comprises: soaking pretreated corallite in a cutting protective agent, and then cutting to obtain cut corallite, and screening for cut corallite that meets a cutting size requirement to obtain an acceptable product of cut corallite; fully soaking the acceptable product of cut corallite in a phosphate solution, and performing a hydrothermal exchange reaction to obtain the coralline hydroxyapatite; wherein the cutting protective agent is a solution containing a polyol. The preparation method can significantly improve the cutting efficiency, broaden the cutting specifications and sizes, and significantly improve the yield of acceptable product, especially the yield of acceptable small-size products, which further broadens the application range of artificial bones.

Abstract: A method for storing and acquiring information using fluorescence defects in wide bandgap materials, a device, an apparatus and a storage medium are provided, which are applied to a field of optical information storage technology. The method includes: determining a processing parameter group, where the processing parameter group is configured to store target information into wide bandgap materials, and the processing parameter group comprises at least one processing parameter; performing a processing at M storage addresses of the wide bandgap materials based on the processing parameter group, so that fluorescence defects matching the target information are generated at the M storage addresses, where M is a positive integer.

Abstract: Examples of the present disclosure provide a memory device, an operation method thereof, a memory system and a storage medium. The memory device includes a memory cell array including: a plurality of memory cells, and a peripheral circuit coupled with the memory cell array and configured to apply a read voltage to a selected word line coupled to a target memory cell of the plurality of memory cells and apply a pass voltage to a non-selected word line adjacent to the selected word line when performing a read operation on the target memory cell, wherein the pass voltage is related to the read voltage and a working temperature of the memory device when the read operation is performed.

Abstract: A method for storing and acquiring information using fluorescence defects in wide bandgap materials, a device, an apparatus and a storage medium are provided, which are applied to a field of optical information storage technology. The method includes: determining a processing parameter group, where the processing parameter group is configured to store target information into wide bandgap materials, and the processing parameter group comprises at least one processing parameter; performing a processing at M storage addresses of the wide bandgap materials based on the processing parameter group, so that fluorescence defects matching the target information are generated at the M storage addresses, where M is a positive integer.

Abstract: A memory system comprises: a memory device including a first word line; and a memory controller coupled to the memory device and configured to: acquire the number of read failure bits of a memory cell page coupled to the first word line; determine whether the number of read failure bits of the memory cell page is greater than a preset threshold; and control the memory device to perform a reprogram operation on the memory cell page in response to the number of read failure bits of the memory cell page being greater than the preset threshold.

Abstract: An electric work machine in one aspect of the present disclosure includes an electric power input terminal, a motor, a circuit board, a first heat dissipation plate, and a second heat dissipation plate. The circuit board includes a first surface and an electronic circuit on the first surface. The electronic circuit controls supply of AC power to the motor. The electronic circuit includes an electronic component that generates Joule heat. The first heat dissipation plate is spaced from the first surface by a first distance in parallel to the first surface. The second heat dissipation plate is spaced from the first surface by a second distance in parallel to the first surface. The second heat dissipation plate is thermally coupled with the first heat dissipation plate. The second distance is smaller than the first distance.

Abstract: Embodiments of this application provide a foldable structural member, a manufacturing method thereof, and a foldable electronic device. The foldable structural member includes a first middle frame and a second middle frame, a first protective layer and an injection molding layer that are successively stacked in corresponding regions of the first middle frame and the second middle frame, and an anti-corrosion layer disposed between the injection molding layer and the first protective layer. The special anti-corrosion design provides feasibility for a magnesium alloy to be used as a metal body in a rotating open region of the foldable structural member, so that the structural member can be configured to provide a lighter and thinner foldable electronic device.

Abstract: Systems, devices, and methods for managing dishing recess in a semiconductor device are provided. In one aspect, a semiconductor device includes a first body structure located in an array region. The first body structure includes a first connection line extending along a first direction. The semiconductor device includes a second body structure located in an edge region adjacent to the array region. The second body structure includes a second connection line extending along the first direction and having a dishing recess. A width of the second connection line along a second direction is greater than a width of the first connection line along the second direction. The second direction is perpendicular to the first direction. The semiconductor device includes a blocking layer inside the dishing recess of the second connection line.

Abstract: The present application provides memory devices, operating methods, and memory systems. An example memory device includes: a first, second, and third top select line, multiple word lines, multiple memory cells, and a peripheral circuit configured to: in a process of programming the multiple memory cells coupled to a selected word line of the multiple word lines, dynamically adjust an application approach of a select voltage on the second top select line depending on a distance between the selected word line and the third top select line; wherein when the first top select line reaches its select voltage is different from when the third top select line reaches its select voltage, and when the second top select line reaches its select voltage is not earlier than when the first top select line reaches its select voltage and not later than when the third top select line reaches its select voltage.

Abstract: This application provides a port frame, a middle frame component, and an electronic device. The port frame includes a frame body, a connection bump, and a positioning structure. A frame hole is formed on the frame body, the frame body has a frame surface, and the frame surface is configured to come into contact with a first middle frame surface. The frame body may be formed through injection molding of metal powder, to improve structural strength. The connection bump is connected to the frame body, the connection bump has a connection surface that forms an included angle with the frame surface, the connection surface is configured to come into contact with a second middle frame surface, and the connection bump is fixedly connected to the middle frame body, and is electrically connected to both the frame body and the middle frame body.

Abstract: Aspects of the present disclosure are directed to generating media element(s) using a multimodal scene graph. A scene manager can process visual information, such as video, images, and/or a recorded artificial relay scene, and generate a multimodal scene graph that comprises components and metadata generated via the processing. The scene manager can utilize the multimodal scene graph to generate social media elements, such as images, video, and/or artificial reality scenes. For example, a video of a user can be converted to a multimodal scene graph, which can be used to generate one or more images (e.g., memes, animated images, stickers, etc.), such as an image that represents the user via an avatar of the user. This generated media can be shared with other social platform users, and the stored multimodal scene graph can be accessed by the others to generate variations of the media.

Abstract: A chopped PIR (C-PIR) sensor is capable of detecting both stationary and moving objects with a high degree of accuracy using a narrow infrared semi-transparent chopper to temporally shutter incident radiation received by pyroelectric sensing elements. Demonstrating a field of view of 110° (horizontal) and 90° (vertical), the C-PIR sensor can detect stationary objects located within 4 m of the sensor, and moving objects located within 8 m of the sensor with 100% accuracy.

Abstract: A semiconductor memory device includes trench isolations arranged in a bit-line direction, gate structures arranged in a word-line direction perpendicular to the bit-line direction, an array of vertical-transistor channels arranged in a vertical direction perpendicular to the bit-line direction and the word-line direction and separated by the trench isolations and gate structures, top ends of the array of the vertical-transistor channels in each column being connected to a line of semiconductor structure extending in the bit-line direction at a backside of the semiconductor memory device, and air gap tunnels along the word-line direction that each crosses below the line of semiconductor structure and between two neighboring vertical-transistor channels in a first region at the backside of the semiconductor memory device.

Abstract: The present disclosure provides a fixed-position defect doping method for a micro-nanostructure based on a self-alignment process, including: S1, sequentially forming a sacrificial layer and a photoresist layer on a surface of a crystal substrate; S2, performing a lithography on the photoresist layer to form a mask hole according to a micro-nano pattern; S3, performing an isotropic etching on the sacrificial layer through the mask hole, and amplifying the micro-nano pattern to the sacrificial layer; S4, performing an ion implantation doping on an exposed crystal surface below the mask hole; S5, removing the photoresist layer, and depositing a mask material; S6, removing the sacrificial layer, and transferring a micro-nano amplified pattern in the sacrificial layer to a mask material pattern; and S7, etching an exposed crystal surface, and removing the mask material on the surface and forming a specific defect by annealing.

Abstract: A method includes providing a tapered roller bearing including an outer ring having a raceway surface, an inner ring having a raceway surface and a plurality of tapered rollers each having a rolling surface and a large end-face; optimizing a surface roughness of at least one surface selected from the following set of surfaces: the outer ring raceway surface, the inner ring raceway surface, the rolling surfaces of the tapered rollers and the large end faces of the tapered rollers; and black oxidizing the at least one first surface.