Abstract: An optical sensing apparatus, a method for manufacturing an optical sensing apparatus, and an electronic device can improve the optical detection accuracy and user experience. The optical sensing apparatus includes: a sensor chip configured to receive an incident light signal for optical detection; and a transparent conductive layer provided above the sensor chip and connected to a grounding terminal of the sensor chip, where the transparent conductive layer is configured to be coupled with an electromagnetic wave in an environment, and transmit the electromagnetic wave to the grounding terminal of the sensor chip.

Abstract: An interaction control method for detecting a default object in a real-time image and an electronic device are introduced. The method includes steps of image recognition, interaction area setting, movement detection, and playing execution, wherein a default object, a reference object and a setting object are recognized by artificial intelligence in the real-time image, and the electronic device triggers a preset instruction corresponding to the interaction content corresponding to an interaction area by artificial intelligence to recognize a preset instruction corresponding to the interaction content of an interaction area, and the electronic device executes the preset instruction to play a sound response. A terminal device in communication connection with an electronic device and a non-transitory computer-readable recording medium are further provided.

Abstract: A calibration system and a calibration method for state of charge (SOC) and state of health (SOH) in an energy storage system are provided. The calibration system includes a Main Battery Management System (MBMS) and a plurality of racks, wherein, when the MBMS determines that one of the plurality of racks meets auto-calibration conditions, the MBMS utilizes a battery feature value extraction algorithm to obtain feature value data of each of battery packs, and predicts the number of battery cycles for each of the battery packs via a battery aging correction model. In this way, the SOC and the SOH for each of the battery packs can be accurately calculated, so that maintenance personnel can clearly comprehend the status of each of the racks, thereby improving the efficiency of power management.

Abstract: A button structure includes a switch, a shell, an elastic member, a button and at least one adjustable limiting member. The elastic member includes a fixing portion, a compressive portion and an elastic portion. The fixing portion is connected to the shell. The compressive portion is configured to abut against the switch. The elastic portion is connected between the fixing portion and the compressive portion. The elastic portion is suitable for deformation. The button is connected to the compressive portion, and the compressive portion is located between the button and the switch. The adjustable limiting member is disposed on the button, and is configured to abut against the elastic portion. The adjustable limiting member adjustably protrudes for a length toward the elastic portion relative to the button.

Abstract: An electrode assembly, a battery cell, a battery, and an electrical apparatus are disclosed. The electrode assembly includes a first electrode plate, the electrode plate includes a current collector and active material layers arranged on the current collector, the active material layer is provided with a plurality of material removal regions at intervals in an extension direction (L) of the first electrode plate, and the material removal region extends in a width direction (Y) of the first electrode plate; the active material layer is provided with a marking portion, a width of the marking portion in the extension direction (L) of the first electrode plate is greater than or equal to a width of the material removal region, and the marking portion spans across the material removal region.

Abstract: A memory cell structure includes a transistor structure and a capacitor structure, where the capacitor structure includes a hydrogen absorption layer. The hydrogen absorption layer absorbs hydrogen, which prevents or reduces the likelihood of the hydrogen diffusing into an underlying metal-oxide channel of the transistor structure. In this way, the hydrogen absorption layer minimizes and/or reduces the likelihood of hydrogen contamination in the metal-oxide channel, which may enable a low current leakage to be achieved for the memory cell structure and reduces the likelihood of data corruption and/or failure of the memory cell structure, among other examples.

Abstract: Some embodiments of this application provide an electrode assembly, a battery cell, a battery, and an electrical device. The electrode assembly includes at least one first electrode plate, where the first electrode plate is bent and includes: a current collector; and an active material layer, disposed on the current collector. The active material layer includes a material-removed region in at least a part of bends of the first electrode plate. The material-removed region extends along a width direction of the first electrode plate. A depth of the material-removed region does not exceed a thickness of the active material layer at which the material-removed region is located.

Abstract: Provided is an identification method of plastic microparticles, including: performing an infrared analysis on plastic microparticles to identify whether the plastic microparticles include polyethylene terephthalate, polyethylene, polypropylene, or nylon 66, wherein the identification is to determine whether the plastic microparticles have a characteristic peak of each plastic, and the characteristic peak is selected from signals that do not overlap and interfere with each other in the infrared spectrum signals of each plastic.

Abstract: A semiconductor structure according to the present disclosure includes a substrate, a first base fin and a second base fin arising from the substrate, an isolation structure disposed between the first base fin and the second base fin, first channel members disposed over the first base fin, second channel members disposed over the second base fin, a region isolation feature extending into the substrate, a first gate structure wrapping around each of the first channel members, second gate structure wrapping around each of the second channel members, a first gate cut feature extending through the first gate structure and into the isolation feature, and a second gate cut feature extending though the second gate structure and into the isolation feature. Each of the first gate cut feature and the second gate cut feature are spaced apart from the region isolation feature.

Abstract: A carbon black with good dispersibility is provided. The carbon black has a full width at half maximum (FWHM) of greater than 0 and less than or equal to 0.3 ?m as measured by a centrifugal sedimentation method, wherein the centrifugal sedimentation method uses anhydrous ethanol as a solvent.

Abstract: Provided are a marking device and a lamination manufacturing system. The marking device includes an attachment mechanism, a coating mechanism, and a stripping mechanism, wherein the attachment mechanism is configured to attach shielding members to a marking area of a base material; the coating mechanism is arranged downstream of the attachment mechanism along a conveying direction of the base material, and the coating mechanism is configured to coat the base material; and the stripping mechanism is arranged downstream of the coating mechanism along the conveying direction, and the stripping mechanism is configured to detach the shielding members from the base material to form scores on the marking area.

Abstract: A method of fabricating a contact structure includes the following steps. An opening is formed in a dielectric layer. A conductive material layer is formed within the opening and on the dielectric layer, wherein the conductive material layer includes a bottom section having a first thickness and a top section having a second thickness, the second thickness is greater than the first thickness. A first treatment is performed on the conductive material layer to form a first oxide layer on the bottom section and on the top section of the conductive material layer. A second treatment is performed to remove at least portions of the first oxide layer and at least portions of the conductive material layer, wherein after performing the second treatment, the bottom section and the top section of the conductive material layer have substantially equal thickness.

Abstract: Methods for improving wafer bonding performance are disclosed herein. In some embodiments, a method for bonding a pair of semiconductor substrates is disclosed. The method includes: processing at least one of the pair of semiconductor substrates, and bonding the pair of semiconductor substrates together. Each of the pair of semiconductor substrates is processed by: performing at least one chemical vapor deposition (CVD), and performing at least one chemical mechanical polishing (CMP). One of the at least one CVD is performed after all CMP performed before bonding.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN); forming a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN); and forming a source/drain region adjacent to two sides of the second spacer.

Abstract: A semiconductor fabrication method includes: forming, on a substrate, an epitaxial stack comprising at least one sacrificial epitaxial layer and at least one channel epitaxial layer; forming a fin in the epitaxial stack; forming a sacrificial gate stack on channel regions of the fin; forming gate sidewall spacers on sidewalls of the sacrificial gate stack; performing pre-treatment operations to remove impurities from the at least one sacrificial epitaxial layer; recessing the at least one sacrificial epitaxial layer to form a cavity; forming inner spacer material in the cavity; forming source/drain features; removing the sacrificial gate stack and the at least one sacrificial epitaxial layer in the fins; and forming a metal gate to replace the sacrificial gate stack and the at least one sacrificial epitaxial layer, wherein the inner spacers have sufficient thickness to resist epi damage.

Abstract: An electronic device including a device housing, a cable, a cable positioning structure, and a housing restriction structure is provided. The device housing includes a through hole. The through hole includes a central region, a first channel region, and a second channel region. The cable passes through the device housing. The cable positioning structure is disposed on the cable. The cable positioning structure includes a first protrusion and a second protrusion. The cable positioning structure is adapted to be rotated between a first orientation and a second orientation relative to the device housing. The housing restriction structure is disposed on the device housing. The housing restriction structure includes a first restrain member and a first stopper. In a positioned state, the cable positioning structure is in the second orientation. The first restrain member and the first stopper restrict the cable positioning structure.

Abstract: A fully human antibody targeting GPRC5D and a chimeric antigen receptor (CAR) comprising the fully human antibody. A host cell expressing the CAR, such as a CAR-T cell. A use of the fully human antibody, the CAR, and the CAR-T cell in treatment of tumors (such as multiple myeloma).

Abstract: An electronic device includes a conductive wire having a metal portion with openings. The openings include a first opening and a second opening arranged along a first direction, and the metal portion includes the first to fourth extending portions and the first to fourth joint portions. The first opening is surrounded by the first extending portion, the second extending portion, the first joint portion, and the second joint portion. The second opening is surrounded by the third extending portion, the fourth extending portion, the third joint portion, and the fourth joint portion. Along the first direction, a ratio of a first width sum of widths of the first extending portion, the second extending portion, the third extending portion, and the fourth extending portion to a second width sum of widths of the first joint portion and the third joint portion is in a range from 0.8 to 1.2.

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a dielectric layer. The semiconductor device package further includes an antenna structure disposed in the dielectric layer. The semiconductor device package further includes a semiconductor device disposed on the dielectric layer. The semiconductor device package further includes an encapsulant covering the semiconductor device. The semiconductor device package further includes a conductive pillar having a first portion and a second portion. The first portion surrounded by the encapsulant and the second portion embedded in the dielectric layer.

Abstract: A cooling apparatus is provided. An external cooling fluid flows into an external inlet opening from an external inlet pipe and passes through a heat exchanger to flow out of an external outlet opening to an external outlet pipe. An internal cooling fluid flows into an internal inlet pipe from the server and flows into an internal inlet opening from the internal inlet pipe and passes through the heat exchanger for heat exchange with the external cooling fluid to flow out of an internal outlet opening to an internal outlet pipe. A hot-swap pump has a pump main body, an inlet anti-leakage pipe, an outlet anti-leakage pipe and a hot-swap connector. The inlet anti-leakage pipe includes an inlet connector and an inlet anti-leakage valve. The outlet anti-leakage pipe includes an outlet connector and an outlet anti-leakage valve. The hot-swap connector is electrically connected to the pump main body.