Abstract: The present application provides antibody-TCR chimeric constructs comprising an antibody moiety that specifically binds to a target antigen fused to a TCRM capable of recruiting at least one TCR-associated signaling module. Also provided are methods of making and using these constructs.

Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.

Abstract: Switches and methods for utilizing the switches are described. The switch has ports, a memory and a scheduler. Packets ingress and egress the switch through the ports. Each packet is divisible into packet segments. The memory includes banks. The scheduler is coupled with the ports and the memory. The scheduler is configured to allocate memory to store the packet segments in the banks such that a beginning packet segment of a packet is stored in a selected bank and each subsequent packet segment in the packet is stored in order in a next adjacent bank.

Abstract: Provided in the present disclosure are a coupler and a vehicle with the coupler. The coupler includes: a coupler body, having an accommodating cavity, a first impact protection pin flange being disposed on the coupler body; and a coupler tongue, pivotally connected to the coupler body. The coupler tongue includes a head portion and a tail portion. The tail portion is positioned inside the accommodating cavity, and a first interval d is formed between an end surface of the tail portion and the coupler body. The coupler tongue further includes a second impact protection pin flange, and a second interval b is formed between the first impact protection pin flange and the second impact protection pin flange, wherein the first interval d and the second interval b satisfy: d<b.

Abstract: A method for reducing odor in remediation of pesticide chemical contaminated soil comprises preparing odor control sustained-release particles and evenly covering on the surface of the pesticide chemical contaminated soil according to a certain dosage; preparing odor covering base materials and mixed bacterial solution, and preparing the odor covering soil by mixing the odor covering base materials and mixed bacterial solution in proportion, and then covering the odor covering soil on the surface of the pesticide chemical contaminated soil; and inserting heating rods into the pesticide chemical contaminated soil, and heating the surface layer of the pesticide chemical contaminated soil to 30-40° C.

Abstract: A method for co-producing blister copper by enriching germanium and indium from a copper sulfide ore comprises: mixing a copper sulfide ore containing germanium and indium, a reducing agent and a fluxing agent in proportion and then grinding; subjecting the mixture to reduction matte smelting to obtain volatile smoke containing germanium and indium and copper matte respectively; subjecting the copper matte to oxygen-enriched blowing to volatilize germanium and indium, so as to obtain the blister copper and volatile smoke containing germanium and indium respectively; and oxidizing fumes discharged from bag dust collection by ozone, and then absorbing them by spraying alkali liquor to reach up-to-standard discharge. In the reduction smelting stage, the volatilization rate of germanium and indium is more than 70%; and in the copper matte oxygen-enriched blowing stage, the volatilization rate of germanium and indium is more than 25%.

Abstract: A switch is described. The switch includes a plurality of ports, a plurality of port logic modules, a memory, and a switch fabric. Transactions ingress and egress the switch via the ports. The port logic modules are coupled with the ports. Each port logic module has core clock domain logic for a core clock domain specific to a corresponding port. The memory includes banks. The memory and the switch fabric have a system clock domain. The core clock domain for each of the port logic modules is different from the system clock domain.

Abstract: Disclosed are a model parameter training method and a terminal based on federation learning, and a medium. The method includes: determining a feature intersection of a first sample of the first terminal and a second sample of a second terminal, training the first sample based on the feature intersection to obtain a first mapping model, sending the first mapping model to the second terminal; receiving a second encryption mapping model sent by the second terminal, predicting a missing feature of the first sample of the first terminal according to the second encryption mapping model to obtain a first encryption supplementary sample; receiving a first encryption federation learning model parameter sent by a third terminal, training a federation learning model to be trained according to the first encryption federation learning model parameter, and calculating a first encryption loss value; and sending the first encryption loss value to the third terminal.

Abstract: A splicing adhesive film, a manufacturing method thereof, and a photovoltaic module are provided. The splicing adhesive film includes a first portion and a plurality of second portions. The first portion includes a first material, and each second portion includes a second material. The first portion is located in the central region, and the plurality of second portions each are at least partially located in the edge region. The first portion and each second portion are at least partially overlapped in the first direction. The maximum thickness of each second portion located in the edge region is P, and the maximum thickness of the first portion located in the central region is Q, P>Q.

Abstract: An optical module is disclosed. The optical module includes a carrier, an optical emitter disposed over the carrier, and a monitor disposed over the carrier and configured to adjust a property of a first light emitted from the optical emitter.

Abstract: This application relates to the artificial intelligence (AI) field, and specifically, to a voice quality enhancement method and a related device. The method includes: after a PNR mode is enabled, obtaining a noisy voice signal and target voice-related data, where the noisy-carrying voice signal includes a voice signal of a target user and an interfering noise signal, and the target voice-related data indicates a voice feature of the target user; and performing noise reduction on the noisy voice signal based on the target voice-related data by using a trained voice noise reduction model to obtain a noise-reduced voice signal of the target user, where the voice noise reduction model is implemented based on a neural network. In embodiments of this application, voice of a target person can be enhanced, and interference can be suppressed.

Abstract: A system including a fabric manager, a memory mapper, and a switch is described. The memory mapper receives and stores mapping information from the fabric manager that maps memory locations in a plurality of hosts to corresponding memory locations in a plurality of physical devices. The switch receives at least a portion of the mapping information from the memory mapper, receives a request from a host, and accesses memory that is identified by the request on a physical device of the plurality of physical devices.

Abstract: An organic light emitting device, a preparation method therefor, and a display apparatus are provided. The organic light emitting device includes an anode, a cathode, and a light emitting layer and an electron transport layer arranged between the anode and the cathode. The electron transport layer is arranged between the light emitting layer and the cathode. The electron transport layer includes a first host material and a second host material. A mixing ratio of the first host material to the second host material of one side of the electron transport layer close to the light emitting layer is different from a mixing ratio of the first host material to the second host material of one side of the electron transport layer away from the light emitting layer.

Abstract: A system includes: a high bandwidth memory (HBM) including a first sensing unit configured to generate one or more first environmental signals corresponding to a first transistor in a first memory cell, and a second sensing unit configured to generate one or more second environmental signals corresponding to a second transistor in a second memory cell; and a differentiated dynamic voltage and frequency scaling (DDVFS) device configured to perform the following (1) for a first set of the memory cells which includes the first memory cell, controlling temperature by adjusting one or more first transistor-temperature-affecting (TTA) parameters of the first set based on the one or more first environmental signals, and (2) for a second set of the memory cells which includes the second memory cell, controlling temperature by adjusting one or more second TTA parameters of the second set based on the one or more second environmental signals.

Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.

Abstract: A switch is described. The switch includes a plurality of ports, a plurality of port logic modules, a memory, and a switch fabric. Transactions ingress and egress the switch via the ports. The port logic modules are coupled with the ports. Each port logic module has core clock domain logic for a core clock domain specific to a corresponding port. The memory includes banks. The memory and the switch fabric have a system clock domain. The core clock domain for each of the port logic modules is different from the system clock domain.

Abstract: A system including a fabric manager, a memory mapper, and a switch is described. The memory mapper receives and stores mapping information from the fabric manager that maps memory locations in a plurality of hosts to corresponding memory locations in a plurality of physical devices. The switch receives at least a portion of the mapping information from the memory mapper, receives a request from a host, and accesses memory that is identified by the request on a physical device of the plurality of physical devices.

Abstract: Embodiments of the present application provide a method for predicting envelope features. The method includes: according to baseband data or data after modulation mapping, a peak value of a radio frequency envelope signal, a time point corresponding to the peak value, a valley point of the radio frequency envelope signal and a time point corresponding to the valley point are predicted; according to the valley point and the time point corresponding thereto, a generated reference value is sent to a low-bandwidth control signal generating module to obtain a control signal; according to adjacent valley point and peak point, and time points corresponding thereto, generated status information is sent to a high-bandwidth control signal generating module to obtain a control switch signal; and when in an ascending status, according to a key information string, a slope k of a connecting line is determined, and a corresponding filter inductor is turned on.

Abstract: The present disclosure relates to the technical field of display, and provided thereby are a display device, a flexible display panel and a manufacturing method therefor.

Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.