Abstract: A packaged GaN semiconductor device with improved heat dissipation is provided. A GaN device is packaged on a printed circuit board (PCB) with a vertical side of the device, and optionally the back side of the device, in thermal contact with the PCB. The packaging is compatible with surface mount technologies such as land grid array (LGA), ball grid array (BGA), and other formats. Thermal contact between the PCB and a vertical side of the device, and optionally the back side of the device, is made through solder. The solder used for the thermal contact may also connect a source terminal of the device, which also improves electrical stability of the device. The packaging is particularly suitable for GaN HEMT devices.

Abstract: Resonant converters may be operated according to selected working modes to achieve voltage doubler or non-voltage doubler functions. Embodiments may be based on two-phase resonant converters. Embodiments may implement primary side switching, secondary side switching, or both, to achieve the selected working modes and voltage doubler and non-voltage doubler function. Embodiments are suitable for applications requiring wide input and output voltage ranges, such as low-voltage charging circuits for personal electronic devices, and high voltage charging circuits for electric vehicles.

Abstract: A single phase five-level inverter topology comprising a half-bridge inverter circuit with a floating capacitor which outputs five mutually different voltage levels including zero, wherein both the system cost and the size is reduced, the leakage current is eliminated substantially and high efficiency is achieved by using five-level half-bridge structure with only one AC filtering inductor. A three-phase five-level inverter topology wherein the voltage utilization is twice that of the present three-phase five-level half-bridge inverter under the same operating conditions; the AC filtering inductance is smaller than that of the three-level half-bridge inverter; the DC link mid-point voltage can be balanced without additional circuitry.

Abstract: Disclosed are half bridge inverter unit and inverter thereof. The half bridge inverter unit includes an inverter controlling module and inductors. The inverter controlling module provides different connection modes based on different operation modes so that the inverter meets the requirement of wide input voltage range as it can work in either voltage step-up mode or voltage step-down mode. The mid-point voltage between the DC series capacitors connected in parallel with DC power supply can be balanced automatically by taking advantage of the grid voltage symmetry with regard to positive and negative half cycles. The inverter is of single stage structure. It has advantages of low power loss, low cost, high efficiency and reliability.

Abstract: A current-ripple-based control strategy for an AC-DC converter with a series ripple cancellation converter (RCC). Embodiments provide series ripple cancellation by sensing the load current information, and significantly simplify the control circuitry. In addition, the embodiments allow input voltage of the series RCC to tightly track its output voltage peak value with no extra control circuit, thus minimizing the RCC component voltage stress as well as the RCC loss. Embodiments are suitable for driving an LED load, where they eliminate LED light flicker caused by the power factor correction (PFC) stage, and significantly reduce its output capacitance.

Abstract: A five-voltage level inverter topology circuit and a three-phase five-voltage level inverter topology circuit, suitable for use with two series-connected direct current (DC) power sources, include a half-bridge inverter circuit having a first circuit module and a second circuit module. The half-bridge inverter circuit outputs five voltage levels including a 0V level. The five-voltage level inverter topology circuit has a five-voltage level half-bridge structure, and only requires an alternating current (AC) filtering inductor, thereby reducing system cost and size, removing leakage current, and providing high efficiency.

Abstract: Provided are circuits and methods for a power converter that converts AC input power into DC output power using a first output circuit that provides a first output comprising a DC voltage with a first AC voltage ripple and a second output circuit including a floating capacitor and one or more power switching device, and provides a second output comprising a second AC voltage ripple, wherein the first output and the second output are connected together in series, such that the first AC voltage ripple is substantially cancelled and substantially ripple-free DC output power is provided. Embodiments significantly reduce the total output capacitance requirement without sacrificing power factor, thus avoiding the need for electrolytic capacitors and enabling the use of long-life film capacitors. The circuits and methods are particularly suitable for use in applications where ripple-free high power and high reliability are required, such as in high power LED lighting.

Abstract: A single-phase five-level active clamping converter unit and a converter. The single-phase five-level active clamping converter unit has three input ends and one output end, and also comprises: a suspension capacitor and a topological control portion. The topological control portion is connected to the suspension capacitor and the three input ends and one output end of the single-phase five-level active clamping converter unit, is connected to a plurality of control ends, and is suitable for the supply of at least eight operating modes under the control of a control signal accessing the control ends. In the single-phase five-level active clamping converter unit, a topological structure is easy to design, and is simple and convenient to control.

Abstract: An LLC resonant converter includes a first phase with a first primary circuit and a second phase with a second primary circuit. The first primary circuit includes a first shared inductor, and the second primary circuit includes a second shared inductor. The first and second shared inductors are connected in parallel with each other. The first and second primary circuits do not include a capacitor that is connected in parallel with each other.

Abstract: A hybrid rectifier that works as either a hybrid full bridge or a voltage doubler. Under 220 V AC input condition, the hybrid rectifier operates in full bridge mode, while at 110 V AC input, it operates as voltage doubler rectifier. The hybrid rectifier may be used with a DC-DC converter, such as an LLC resonant converter, in a power supply. With this mode switching, the LLC converter resonant tank design only takes consideration of 220 V AC input case, such that the required operational input voltage range is reduced, and the efficiency of the LLC converter is optimized. Both the size and power loss are reduced by using a single stage structure instead of the conventional two-stage configuration.

Abstract: A hybrid rectifier that works as either a hybrid full bridge or a voltage doubler. Under 220 V AC input condition, the hybrid rectifier operates in full bridge mode, while at 110 V AC input, it operates as voltage doubler rectifier. The hybrid rectifier may be used with a DC-DC converter, such as an LLC resonant converter, in a power supply. With this mode switching, the LLC converter resonant tank design only takes consideration of 220 V AC input case, such that the required operational input voltage range is reduced, and the efficiency of the LLC converter is optimized. Both the size and power loss are reduced by using a single stage structure instead of the conventional two-stage configuration.

Abstract: A single-phase four-level inverter circuit topology and a three-phase four-level inverter circuit topology. The single-phase four-level inverter circuit topology is adapted to be used with two series-connected direct current power sources, so as to enable a first direct current power source or a second direct current power source to supply power to a load of the four-level inverter circuit topology, alternatively, any one of two direct current power sources is first algebraically superimposed with a flying capacitor and then supplies the power to the load of the four-level inverter circuit topology (M), thereby making the four-level inverter circuit topology output four different levels.

Abstract: A five-voltage level inverter topology circuit, and three-phase and five-voltage level inverter topology circuit, suitable for use with two serial-connected direct current (DC) power sources (C1, C2), comprise: a half-bridge inverter circuit comprising a first circuit module (M1) and a second circuit module (M2). The half-bridge inverter circuit can output 5 voltage levels including a 0V level. The five-voltage level inverter topology circuit adopts a 5-voltage level half-bridge structure, and only requires an alternating current (AC) filtering inductor (L1), thereby reducing a system cost and size, removing a leakage current, and providing high efficiency.

Abstract: A current-ripple-based control strategy for an AC-DC converter with a series ripple cancellation converter (RCC). Embodiments provide series ripple cancellation by sensing the load current information, and significantly simplify the control circuitry. In addition, the embodiments allow input voltage of the series RCC to tightly track its output voltage peak value with no extra control circuit, thus minimizing the RCC component voltage stress as well as the RCC loss. Embodiments are suitable for driving an LED load, where they eliminate LED light flicker caused by the power factor correction (PFC) stage, and significantly reduce its output capacitance.

Abstract: A converter includes a half-bridge circuit including first and second transistors that are connected in series, the half-bridge circuit is connected in parallel with a voltage input and includes a node connected to both the first and second transistors; a resonant inductor connected to the half-bridge circuit and the primary winding of a transformer; a resonant capacitor connected to the half-bridge circuit and the primary winding; a third transistor with a first terminal connected to the half-bridge circuit and a second terminal directly connected to a first terminal of the resonant inductor; and a rectification stage that is connected to the secondary winding of the transformer and that includes first and second synchronous rectifiers. The rectification stage does not use discrete diodes to provide rectification, and during voltage boost operation, the third transistor is turned on and off to maintain an output voltage level.

Abstract: Described herein are semiconductor devices and structures with improved power handling and heat dissipation. Embodiments are suitable for implementation in gallium nitride. Devices may be provided as individual square or diamond-shaped dies having electrode terminals at the die corners, tapered electrode bases, and interdigitated electrode fingers. Device matrix structures include a plurality of device dies arranged on a substrate in a matrix configuration with interdigitated conductors. Device lattice structures are based on a unit cell comprising a plurality of individual devices, the unit cells disposed on a chip with geometric periodicity. Also described herein are methods for implementing the semiconductor devices and structures.

Abstract: A hybrid rectifier that works as either a hybrid full bridge or a voltage doubler. Under 220 V AC input condition, the hybrid rectifier operates in full bridge mode, while at 110 V AC input, it operates as voltage doubler rectifier. The hybrid rectifier may be used with a DC-DC converter, such as an LLC resonant converter, in a power supply. With this mode switching, the LLC converter resonant tank design only takes consideration of 220 V AC input case, such that the required operational input voltage range is reduced, and the efficiency of the LLC converter is optimized. Both the size and power loss are reduced by using a single stage structure instead of the conventional two-stage configuration.

Abstract: Disclosed is single phase five-level inverter topology comprising a half-bridge inverter circuit with a floating capacitor which outputs five mutually different voltage levels including zero, wherein both the system cost and the size is reduced, the leakage current is eliminated substantially and high efficiency is achieved by using five-level half-bridge structure with only one AC filtering inductor. Provided also is three-phase five-level inverter topology wherein the voltage utilization is twice that of the present three-phase five-level half-bridge inverter under the same operating conditions; the AC filtering inductance is smaller than that of the three-level half-bridge inverter; the DC link mid-point voltage can be balanced without additional circuitry.

Abstract: A hybrid rectifier that works as either a hybrid full bridge or a voltage doubler. Under 220 V AC input condition, the hybrid rectifier operates in full bridge mode, while at 110 V AC input, it operates as voltage doubler rectifier. The hybrid rectifier may be used with a DC-DC converter, such as an LLC resonant converter, in a power supply. With this mode switching, the LLC converter resonant tank design only takes consideration of 220 V AC input case, such that the required operational input voltage range is reduced, and the efficiency of the LLC converter is optimized. Both the size and power loss are reduced by using a single stage structure instead of the conventional two-stage configuration.

Abstract: Described herein are semiconductor devices and structures with improved power handling and heat dissipation. Embodiments are suitable for implementation in gallium nitride. Devices may be provided as individual square or diamond-shaped dies having electrode terminals at the die corners, tapered electrode bases, and interdigitated electrode fingers. Device matrix structures include a plurality of device dies arranged on a substrate in a matrix configuration with interdigitated conductors. Device lattice structures are based on a unit cell comprising a plurality of individual devices, the unit cells disposed on a chip with geometric periodicity. Also described herein are methods for implementing the semiconductor devices and structures.