Patents by Inventor Yan Hao

Yan Hao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220176881
    Abstract: Systems, apparatuses and methods (30) may provide for technology that stores data associated with a plurality of intermediate operations in an autonomous vehicle process (32), generates a visualization output based at least partly on the data (34), and changes a magnification level of the visualization output based on user input (38), the visualization output is generated further based on parameter input and the data includes vector chart data.
    Type: Application
    Filed: May 31, 2019
    Publication date: June 9, 2022
    Applicant: Intel Corporation
    Inventors: YAN HAO, ZHI YONG ZHU, LU LI, CIYONG CHEN, KUN YU
  • Patent number: 11354903
    Abstract: Techniques related to training and implementing a bidirectional pairing architecture for object detection are discussed. Such techniques include generating a first enhanced feature map for each frame of a video sequence by processing the frames in a first direction, generating a second enhanced feature map for frame by processing the frames in a second direction opposite the first, and determining object detection information for each frame using the first and second enhanced feature map for the frame.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: June 7, 2022
    Assignee: Intel Corporation
    Inventors: Yan Hao, Zhi Yong Zhu, Lu Li, Ciyong Chen, Kun Yu
  • Publication number: 20220147837
    Abstract: A disclosed example includes selecting, by a mobile computing device, a model description for a predictive analytics model in response to a user-level application request including input data from an application of the mobile computing device, the model description created with a predictive analytics model description language, the model description received from a predictive analytics provider; comparing, by the mobile computing device, first data associated with the user-level application request with second data indicative of digital rights permissions associated with the model description; and executing, by the mobile computing device, an executable associated with the model description without providing the processor circuitry access to the executable and without providing the input data to the predictive analytics provider.
    Type: Application
    Filed: January 28, 2022
    Publication date: May 12, 2022
    Inventors: Feng Chen, Yan Hao, Yi Yang, Xiaoming Chen
  • Patent number: 11196241
    Abstract: An integrated opposite hook cable clamp includes a clamping plate, a connecting plate, and at least two J-shaped clamps. Side bars of the J-shaped clamps are locking bars. Locking holes corresponding to the locking bars are provided on the clamping plate, and at least two of the locking holes are diagonally arranged on the clamping plate. The locking bars of the J-shaped clamps vertically pass through the locking holes on the clamping plate and are movably connected with the clamping plate by a locking mechanism. A back surface of the connecting plate is lap-jointed to the inner sides of hooks of each of the J-shaped clamps. A front surface of the connecting plate is opposite to a front surface of the clamping plate (22).
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: December 7, 2021
    Assignee: GUANGZHOU PANYU CABLE GROUP CO., LTD.
    Inventors: Chaoqiang Hu, Zhanshan You, Jianji Sun, Dan Qin, Xueer Chen, Guangye Lu, Kaituo Zhang, Yanfa Wang, Shihuan Zhang, Yan Hao, Yuanpeng Shao, Xueli Cheng
  • Publication number: 20210303912
    Abstract: System and techniques are provided for three-dimension (3D) semantic segmentation. A device for 3D semantic segmentation includes: an interface, to obtain a point cloud data set for a time-ordered sequence of 3D frames, the 3D frames including a current 3D frame and one or more historical 3D frames previous to the current 3D frame; and processing circuitry, to: invoke a first artificial neural network (ANN) to estimate a 3D scene flow field for each of the one or more historical 3D frames by taking the current 3D frame as a reference frame; and invoke a second ANN to: produce an aggregated feature map, based on the reference frame and the estimated 3D scene flow field for each of the one or more historical 3D frames; and perform the 3D semantic segmentation based on the aggregated feature map.
    Type: Application
    Filed: March 25, 2020
    Publication date: September 30, 2021
    Applicant: Intel Corporation
    Inventors: Kun YU, Yan HAO, Lu LI, Zhiyong ZHU
  • Publication number: 20210271923
    Abstract: An example apparatus for detecting objects in video frames includes a receiver to receive a plurality of video frames from a video camera. The apparatus also includes a first still image object detector to receive a first frame of the plurality of video frames and calculate localization information and confidence information for each potential object patch in the first frame. The apparatus further includes a second still image object detector to receive an adjacent frame of the plurality of video frames adjacent to the first frame and calculate localization information and confidence information for each potential object patch in the adjacent frame. The apparatus includes a similarity detector trained to detect paired patches between the first frame and the adjacent frame based on a comparison of the detected potential object patches.
    Type: Application
    Filed: September 7, 2018
    Publication date: September 2, 2021
    Inventors: Kun Yu, Ciyong Chen, Xiaotian Guo, Yan Hao, Hui Li, Lu Li, Jianguo Pei, Zhi Yong Zhu
  • Publication number: 20210209368
    Abstract: Techniques related to training and implementing a bidirectional pairing architecture for object detection are discussed. Such techniques include generating a first enhanced feature map for each frame of a video sequence by processing the frames in a first direction, generating a second enhanced feature map for frame by processing the frames in a second direction opposite the first, and determining object detection information for each frame using the first and second enhanced feature map for the frame.
    Type: Application
    Filed: December 18, 2018
    Publication date: July 8, 2021
    Applicant: Intel Corporation
    Inventors: Yan HAO, Zhi Yong ZHU, Lu LI, Ciyong CHEN, Kun YU
  • Patent number: 11046701
    Abstract: The present invention relates to a salt of a compound of formula (I), The salt is crystalline or amorphous phosphate, or crystalline or amorphous oxalate. Particularly, a crystal form B of the phosphate of the present invention has high crystallinity, low hygroscopicity and good stability, and the crystal form B of the phosphate is good in oral bioavailability, good in tolerance after long-term administration, difficult to induce hypoglycemia and good in inhibition effect on serum DPPIV.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: June 29, 2021
    Assignee: CGENETECH (SUZHOU, CHINA) CO., LTD.
    Inventors: Yan Hao, Renyan Zhang, Huiping Pan, Fuzhi Zhang, Shijie Yin, Juping Ding, Qiang Yu
  • Publication number: 20210175876
    Abstract: A flip-flop circuit configured to latch an input signal to an output signal is disclosed. The circuit includes a first latch circuit; and a second latch circuit coupled to the first latch circuit. In some embodiments, in response to a clock signal, the first and second latch circuits are complementarily activated so as to latch the input signal to the output signal, and the first and second latch circuits each comprises at most two transistors configured to receive the clock signal.
    Type: Application
    Filed: February 19, 2021
    Publication date: June 10, 2021
    Inventors: Po-Chia LAI, Meng-Hung SHEN, Chi-Lin LIU, Stefan RUSU, Yan-Hao CHEN, Jerry Chang-Jui KAO
  • Patent number: 10931264
    Abstract: A flip-flop circuit configured to latch an input signal to an output signal is disclosed. The circuit includes a first latch circuit; and a second latch circuit coupled to the first latch circuit. In some embodiments, in response to a clock signal, the first and second latch circuits are complementarily activated so as to latch the input signal to the output signal, and the first and second latch circuits each comprises at most two transistors configured to receive the clock signal.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: February 23, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Chia Lai, Meng-Hung Shen, Chi-Lin Liu, Stefan Rusu, Yan-Hao Chen, Jerry Chang-Jui Kao
  • Publication number: 20210005634
    Abstract: In one embodiment, an integrated circuit cell includes a first circuit component and a second circuit component. The first circuit component includes fin field-effect transistors (finFETs) formed in a high fin portion of the integrated circuit cell, the high fin portion of the integrated circuit including a plurality of fin structures arranged in rows. The second circuit component that includes finFETs formed in a less fin portion of the integrated circuit cell, the less fin portion of the integrated circuit including a lesser number of fin structures than the high fin portion of the integrated circuit cell.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 7, 2021
    Inventors: Wei-An Lai, Hui-Zhong Zhuang, Jiann-Tyng Tzeng, Wei-Cheng Lin, Lipen Yuan, Yan-Hao Chen
  • Publication number: 20210005633
    Abstract: In one embodiment, an integrated circuit cell includes a first circuit component and a second circuit component. The first circuit component includes fin field-effect transistors (finFETs) formed in a high fin portion of the integrated circuit cell, the high fin portion of the integrated circuit including a plurality of fin structures arranged in rows. The second circuit component that includes finFETs formed in a less fin portion of the integrated circuit cell, the less fin portion of the integrated circuit including a lesser number of fin structures than the high fin portion of the integrated circuit cell.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 7, 2021
    Inventors: Wei-An Lai, Hui-Zhong Zhuang, Jiann-Tyng Tzeng, Wei-Cheng Lin, Lipen Yuan, Yan-Hao Chen
  • Patent number: 10797078
    Abstract: In one embodiment, an integrated circuit cell includes a first circuit component and a second circuit component. The first circuit component includes fin field-effect transistors (finFETs) formed in a high fin portion of the integrated circuit cell, the high fin portion of the integrated circuit including a plurality of fin structures arranged in rows. The second circuit component that includes finFETs formed in a less fin portion of the integrated circuit cell, the less fin portion of the integrated circuit including a lesser number of fin structures than the high fin portion of the integrated circuit cell.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wei-An Lai, Hui-Zhong Zhuang, Jiann-Tyng Tzeng, Wei-Cheng Lin, Lipen Yuan, Yan-Hao Chen
  • Patent number: 10787431
    Abstract: Provided herein is a process for the preparation of 4-((6-(2-(2,4-difluorophenyl)-1,1-difluoro-2-hydroxy-3-(5-mercapto-1H-1,2,4-triazol-1-yl)propyl)pyridin-3-yl)oxy)benzonitrile.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: September 29, 2020
    Assignee: Dow AgroSciences LLC
    Inventors: Nicholas R. Babij, Qiang Yang, Sarah Ryan, Yan Hao, Gary Roth, Kaitlyn Gray
  • Patent number: 10669237
    Abstract: Provided herein is a process for the preparation of 4-((6-bromopyridin-3-yl)oxy)benzonitrile.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: June 2, 2020
    Assignee: Dow AgroSciences LLC
    Inventors: Nicholas R. Babij, Qiang Yang, Kaitlyn Gray, Yan Hao
  • Publication number: 20200123164
    Abstract: The present invention relates to a salt of a compound of formula (I), The salt is crystalline or amorphous phosphate, or crystalline or amorphous oxalate. Particularly, a crystal form B of the phosphate of the present invention has high crystallinity, low hygroscopicity and good stability, and the crystal form B of the phosphate is good in oral bioavailability, good in tolerance after long-term administration, difficult to induce hypoglycemia and good in inhibition effect on serum DPPIV.
    Type: Application
    Filed: May 29, 2018
    Publication date: April 23, 2020
    Applicant: CGENETECH (SUZHOU, CHINA) CO., LTD.
    Inventors: Yan HAO, Renyan ZHANG, Huiping PAN, Fuzhi ZHANG, Shijie YIN, Juping DING, Qiang YU
  • Publication number: 20200058681
    Abstract: In one embodiment, an integrated circuit cell includes a first circuit component and a second circuit component. The first circuit component includes fin field-effect transistors (finFETs) formed in a high fin portion of the integrated circuit cell, the high fin portion of the integrated circuit including a plurality of fin structures arranged in rows. The second circuit component that includes finFETs formed in a less fin portion of the integrated circuit cell, the less fin portion of the integrated circuit including a lesser number of fin structures than the high fin portion of the integrated circuit cell.
    Type: Application
    Filed: August 14, 2018
    Publication date: February 20, 2020
    Inventors: Wei-An Lai, Hui-Zhong Zhuang, Jiann-Tyng Tzeng, Wei-Cheng Lin, Lipen Yuan, Yan-Hao Chen
  • Publication number: 20200044430
    Abstract: An integrated opposite hook cable clamp includes a clamping plate, a connecting plate, and at least two J-shaped clamps. Side bars of the J-shaped clamps are locking bars. Locking holes corresponding to the locking bars are provided on the clamping plate, and at least two of the locking holes are diagonally arranged on the clamping plate. The locking bars of the J-shaped clamps vertically pass through the locking holes on the clamping plate and are movably connected with the clamping plate by a locking mechanism. A back surface of the connecting plate is lap-jointed to the inner sides of hooks of each of the J-shaped clamps. A front surface of the connecting plate is opposite to a front surface of the clamping plate (22).
    Type: Application
    Filed: January 9, 2018
    Publication date: February 6, 2020
    Applicant: GUANGZHOU PANYU CABLE GROUP CO., LTD.
    Inventors: Chaoqiang HU, Zhanshan YOU, Jianji SUN, Dan QIN, Xueer CHEN, Guangye LU, Kaituo ZHANG, Yanfa WANG, Shihuan ZHANG, Yan HAO, Yuanpeng SHAO, Xueli CHENG
  • Patent number: 10513506
    Abstract: Provided herein is a process for the preparation of 4-((6-(2-(2,4-difluorophenyl)-1,1-difluoro-2-hydroxy-3-(1H-1,2,4-triazol-1-yl)propyl)pyridin-3-yl)oxy)benzonitrile.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: December 24, 2019
    Assignee: Dow AgroSciences LLC
    Inventors: Qiang Yang, Daniel Knueppel, Michael T. Sullenberger, Yan Hao, Sarah Ryan, Jerod Patzner, Gregory Whiteker
  • Publication number: 20190382369
    Abstract: Provided herein is a process for the preparation of 4-((6-(2-(2,4-difluorophenyl)-1, 1-difluoro-2-hydroxy-3-(1H-1,2,4-triazol-1-yl)propyl)pyridin-3-yl)oxy)benzonitrile.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 19, 2019
    Inventors: Qiang Yang, Yan Hao, Sarah Ryan, Gregory Whiteker