Patents by Inventor Yan Liang

Yan Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190359719
    Abstract: There is disclosed compositions and methods relating to or derived from anti-c-Met antibodies. More specifically, there is disclosed fully human antibodies that bind c-Met, c-Met-binding fragments and derivatives of such antibodies, and c-Met-binding polypeptides comprising such fragments. Further still, there is disclosed nucleic acids encoding such antibodies, antibody fragments and derivatives and polypeptides, cells comprising such polynucleotides, methods of making such antibodies, antibody fragments and derivatives and polypeptides, and methods of using such antibodies, antibody fragments and derivatives and polypeptides, including methods of treating or diagnosing subjects having c-Met related disorders or conditions, including various inflammatory disorders and various cancers.
    Type: Application
    Filed: June 25, 2019
    Publication date: November 28, 2019
    Applicant: Sorrento Therapeutics, Inc.
    Inventors: Barbara A. Swanson, Heyue Zhou, Yan-Liang Zhang, Randy Gastwirt, John Dixon Gray
  • Patent number: 10396166
    Abstract: A semiconductor device capable of high-voltage operation includes a semiconductor substrate having a first conductivity type. A first well doped region is formed in a portion of the semiconductor substrate. The first well doped region has a second conductivity type. A first doped region is formed on the first well doped region, having the second conductivity type. A second doped region is formed on the first well doped region and is separated from the first doped region, having the second conductivity type. A first gate structure is formed over the first well doped region and is adjacent to the first doped region. A second gate structure is formed beside the first gate structure and is close to the second doped region. A third gate structure is formed overlapping a portion of the first gate structure and a first portion of the second gate structure.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: August 27, 2019
    Assignee: MediaTek Inc.
    Inventors: Cheng Hua Lin, Yan-Liang Ji
  • Patent number: 10377827
    Abstract: There is disclosed compositions and methods relating to or derived from anti-c-Met antibodies. More specifically, there is disclosed fully human antibodies that bind c-Met, c-Met-binding fragments and derivatives of such antibodies, and c-Met-binding polypeptides comprising such fragments. Further still, there is disclosed nucleic acids encoding such antibodies, antibody fragments and derivatives and polypeptides, cells comprising such polynucleotides, methods of making such antibodies, antibody fragments and derivatives and polypeptides, and methods of using such antibodies, antibody fragments and derivatives and polypeptides, including methods of treating or diagnosing subjects having c-Met related disorders or conditions, including various inflammatory disorders and various cancers.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: August 13, 2019
    Assignee: SORRENTO THERAPEUTICS, INC.
    Inventors: Barbara A. Swanson, Heyue Zhou, Yan-Liang Zhang, Randy Gastwirt, John Dixon Gray
  • Patent number: 10380953
    Abstract: An electrophoretic display and method for driving panel using the same are provided. The electrophoretic display includes a display panel and a driving circuit. The display panel includes a plurality of column data lines and a plurality of row scan lines. The driving circuit provides a plurality of data driving signals to the column data lines, and provides a plurality of scan signals to row scan lines. Each of the scan signals has a plurality of scan enable periods, and each of the scan enable periods includes a plurality of scan interval periods. Each of the scan signals is floating or grounding during the scan interval periods. Each of the data driving signals includes a plurality of data driving periods, and each of the data driving periods includes a plurality of driving interval period. Each of the data driving signals is floating or grounding during the driving interval period.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: August 13, 2019
    Assignee: E Ink Holdings Inc.
    Inventors: Yan-Liang Wu, Chi-Mao Hung, Wei-Min Sun, Pei-Lin Tien, Chih-Yuan Hsu, Yao-Jen Hsieh, Hsiao-Lung Cheng
  • Patent number: 10373949
    Abstract: A semiconductor device includes a semiconductor substrate and a passive component. The passive component is formed on the semiconductor substrate and includes a first polysilicon (poly) layer, a salicide blockage (SAB) layer and a first salicide layer. The SAB layer is formed on the first poly layer. The first salicide layer is formed on the SAB layer.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: August 6, 2019
    Assignee: MEDIATEK INC.
    Inventors: Yan-Liang Ji, Cheng-Hua Lin, Chih-Chung Chiu
  • Patent number: 10364334
    Abstract: Continuous production equipment for graphene composite material includes a raw material preparation device; a reaction device, a material discharge end of the raw material preparation device being connected to the reaction device; and an extraction device configured to extract and purify crude composite material obtained from the reaction device, a material feed end of the extraction device being connected to the material discharge end of the reaction device, and a material discharge end of the extraction device being configured to convey polyamide monomer extract obtained by extraction to a liquid conveying pipe of the raw material preparation device. The raw material preparation device includes a raw material melting kettle configured to melt polyamide monomer and mix the molten polyamide monomer with graphene, and the raw material melting kettle is provided with a high-shear emulsifying machine and an ultrasonic disperser.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: July 30, 2019
    Assignee: CHANGZHOU HIGHBERY NEW NANO MATERIALS TECHNOLOGY CO., LTD.
    Inventors: Yan Jiang, Rongqing Huang, Zhenyang Luo, Yan Liang, Hongming Ma, Jianpeng Cao, Lu Zhou, Xuejing Liu, Shulie Dai
  • Publication number: 20190131450
    Abstract: A semiconductor device includes a semiconductor substrate having a first conductivity type, a first well region formed in a portion of the semiconductor substrate, having a second conductivity type that is the opposite of the first conductivity type. A second well region is formed in a portion of the first well region, having the first conductivity type. A first gate structure is formed over a portion of the second well region and a portion of the first well region. A first doped region is formed in a portion of the second well region. A second doped region is formed in a portion of the first well region, having the second conductivity type. A second dielectric layer is formed over a portion of the first gate structure, a portion of the first well region, and a portion of the second doped region.
    Type: Application
    Filed: December 19, 2018
    Publication date: May 2, 2019
    Inventors: Cheng-Hua LIN, Yan-Liang JI, Chih-Wen HSIUNG
  • Patent number: 10233123
    Abstract: A varistor composition free of Sb comprising: (a) ZnO; (b) B—Bi—Zn—Pr glass, or B—Bi—Zn—La glass, or a mixture thereof; (c) a cobalt compound, a chromium compound, a nickel compound, a manganese compound, or mixtures thereof; (d) SnO2; and (e) an aluminum compound, a silver compound, or a mixture thereof. By adjusting the ratio between the components, the varistor composition may be made into a multilayer varistor with inner electrodes having a low concentration of noble metals at a sintering temperature less than 1200° C. The multilayer varistor made from the varistor composition has good maximum surge current, good ESD withstand ability, and low fabrication cost.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: March 19, 2019
    Inventors: Yong-Ming Lin, Yan-Liang Shih, Tui-Ting Tu
  • Patent number: 10199496
    Abstract: A semiconductor device capable of high-voltage operation includes a semiconductor substrate, a first well region, a second well region, a first gate structure, a first doped region, a second doped region, and a second gate structure. The first well region is formed in a portion of the semiconductor substrate. The second well region is formed in a portion of the first well region. The first gate structure is formed over a portion of the second well region and a portion of the first well region. The first doped region is formed in a portion of the second well region. The second doped region is formed in a portion of the first well region. The second gate structure is formed over a portion of the first gate structure, a portion of the first well region, and a portion of the second doped region.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: February 5, 2019
    Assignee: MEDIATEK INC.
    Inventors: Cheng-Hua Lin, Yan-Liang Ji, Chih-Wen Hsiung
  • Patent number: 10189801
    Abstract: The present invention relates to a method for synthesizing tetrahydroisoquinoline thiazolidine, which can be conducted under a relatively mild reaction condition and can rapidly synthesize tetrahydroisoquinoline thiazolidine.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: January 29, 2019
    Assignee: NATIONAL CHI NAN UNIVERSITY
    Inventors: Te-Fang Yang, Sheng-Han Huang, Yan-Liang Lin, Yu-Wei Shih, Yi-Pang Chiu
  • Publication number: 20190016545
    Abstract: A container terminal includes a shore working area, loading-unloading passages, a yard area and collection-evacuation passages. The shore working area is arranged on the shore, and a ship is docked at the shore. The yard area comprises a plurality of yard units. Spacing areas are formed between adjacent yard units. Each yard unit comprises at least one yard. Each yard unit is arranged with a collection-evacuation passage surrounding the yard. Loading-unloading passages are arranged in the spacing areas between adjacent yard units. The loading-unloading passages connect the yard area and the shore working area. The collection-evacuation passages are arranged in the yard units. The loading-unloading passages and the collection-evacuation passages are in a same horizontal plane but do not intersect with each other.
    Type: Application
    Filed: April 22, 2016
    Publication date: January 17, 2019
    Applicant: Shanghai Zhenhua Heavy Industries Co., Ltd.
    Inventors: Gang He, Yaozhou Zhang, Jian Xia, Jianming Jin, Yan Liang, Siming Shi, Qi Lu
  • Patent number: 10177225
    Abstract: The electronic component includes a semiconductor substrate, a first doped region, a second doped region, a gate structure, a dielectric layer and a conductive portion. The semiconductor substrate has an upper surface. first doped region embedded in the semiconductor substrate. The second doped region is embedded in the semiconductor substrate. The gate structure is formed on the upper surface. The dielectric layer is formed above the upper surface and located between the first doped region and the second doped region. The conductive portion is formed on the dielectric layer.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: January 8, 2019
    Assignee: MEDIATEK INC.
    Inventors: Yan-Liang Ji, Cheng-Hua Lin, Puo-Yu Chiang
  • Patent number: 10164560
    Abstract: A method for creating a switch reluctance motor memory sensor model. A switch reluctance motor memory sensor circuit model is formed by two current transmitters AD844, an operational amplifier AD826, a memristor, a capacitor, and three resistors. The method for creating a switch reluctance motor memory sensor model enables physical phenomena in a simulation system to be similar to an actual switch reluctance motor system, and is beneficial for direct mathematical simulation of a switch reluctance motor system. The method is simple, can improve static and dynamic performance of a system, and achieves real-time simulation and real-time control of the switch reluctance motor system.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: December 25, 2018
    Assignee: China University of Mining and Technology
    Inventors: Hao Chen, Yan Liang
  • Publication number: 20180312658
    Abstract: Continuous production equipment for graphene composite material includes a raw material preparation device; a reaction device, a material discharge end of the raw material preparation device being connected to the reaction device; and an extraction device configured to extract and purify crude composite material obtained from the reaction device, a material feed end of the extraction device being connected to the material discharge end of the reaction device, and a material discharge end of the extraction device being configured to convey polyamide monomer extract obtained by extraction to a liquid conveying pipe of the raw material preparation device. The raw material preparation device includes a raw material melting kettle configured to melt polyamide monomer and mix the molten polyamide monomer with graphene, and the raw material melting kettle is provided with a high-shear emulsifying machine and an ultrasonic disperser.
    Type: Application
    Filed: November 27, 2017
    Publication date: November 1, 2018
    Inventors: Yan JIANG, Rongqing HUANG, Zhenyang LUO, Yan LIANG, Hongming MA, Jianpeng CAO, Lu ZHOU, Xuejing LIU, Shulie DAI
  • Publication number: 20180301916
    Abstract: A charging system and a method of charging an electric window covering are disclosed. The electric window covering includes a power supply device and an electric power input, which is provided in a frame and coupled to the power supply device. The charging system includes a charging device, which includes an extension object, an electric power output, and a power storage device which stores a power. The electric power output and the power storage device are respectively connected to the extension object, which is erectable in a longitudinal direction thereof. When the charging device is connected to the frame and suspended therefrom, the power of the power storage device is transmitted to the electric power output through the extension object, and then provided to the electric power input, whereby to charge the power supply device. Therefore, the method can be easily performed with said charging system.
    Type: Application
    Filed: April 16, 2018
    Publication date: October 18, 2018
    Inventors: Chao-Hung Nien, Jui-Pin Jao, Chin-Chu Chiu, Yan-Liang Guo
  • Patent number: 10093682
    Abstract: The invention relates to a method for synthesizing tetrahydroisoquinoline oxazolidine. The method is carried out at a room temperature between 20° C. and 35° C.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: October 9, 2018
    Assignee: NATIONAL CHI NAN UNIVERSITY
    Inventors: Te-Fang Yang, Sheng-Han Huang, Yan-Liang Lin, Wen-Tse Huang, Yu-Wei Shih
  • Patent number: 10096822
    Abstract: A lithium ion battery graphite negative electrode material and preparation method thereof. The lithium ion battery graphite negative electrode material is a composite material including graphite substrates, surface coating layers coated on the graphite substrates and carbon nanotubes and/or carbon nanofibers grown in situ on the surface of the surface coating layers. The preparation method thereof includes, in solid phase or liquid phase circumstance, the coated carbon material precursor forms the surface coating layer of amorphous carbon by carbonization, and then carbon nanotubes and/or carbon nanofibers having high conductive performance are formed on the surface of the surface coating layers by vapor deposition. This coating mode of the combination of solid phase with gas phase or of liquid phase and gas phase makes the amorphous carbon formed on the surface of the graphite substrates more uniform and dense.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: October 9, 2018
    Assignee: SHENZHEN BRT NEW ENERGY MATERIALS INC.
    Inventors: Min Yue, Yan Liang, Huiqing Yan, Minghua Deng, Youyuan Huang
  • Publication number: 20180262134
    Abstract: A switched reluctance motor modeling method, which is applicable to switched reluctance motors of various phase numbers. A variable resistor (RMp) formed by four operational amplifiers (U1, U2, U3, U4), three current conveyors (U5, U6, U7), a digital potentiometer and a digital controller, eight resistors (R1, R2, R3, R4, R5, Ro, Rx, Rs) and a capacitor (C) are adopted to form a switched reluctance motor phase winding equivalent model. The modeling method is simple, can realize system mathematic direct simulation for switched reluctance motors, and is capable of simulating and controlling in real time.
    Type: Application
    Filed: December 28, 2015
    Publication date: September 13, 2018
    Inventors: Hao CHEN, Yan LIANG
  • Patent number: D852193
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: June 25, 2019
    Assignee: Kingston Digital, Inc.
    Inventors: Chung-Chuan Chou, Yu-kuo Huang, Yan Liang Guo
  • Patent number: D858463
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: September 3, 2019
    Assignee: Nien Made Enterprise Co., Ltd.
    Inventors: Chao-Hung Nien, Jui-Pin Jao, Yan-Liang Guo, Tsu-Ya Huang