Patents by Inventor Yang Chen

Yang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145403
    Abstract: An electronic package is provided, in which electronic elements and at least one packaging module including a semiconductor chip and a shielding structure covering the semiconductor chip are disposed on a carrier structure, an encapsulation layer encapsulates the electronic elements and the packaging module, and a shielding layer is formed on the encapsulation layer and in contact with the shielding structure. Therefore, the packaging module includes the semiconductor chip and the shielding structure and has a chip function and a shielding wall function simultaneously.
    Type: Application
    Filed: February 6, 2023
    Publication date: May 2, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien CHIU, Wen-Jung TSAI, Chih-Chiang HE, Ko-Wei CHANG, Chia-Yang CHEN
  • Publication number: 20240146721
    Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser. The present technology is non-custodial, wherein a public-private key pair, which represents user identity, is created on a client machine and then directly encrypted by a third-party platform without relying on one centralized computing system.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Inventors: Fei-Yang Jen, Yi Wei Chen, Jaemin Jin, Hanyu Xue, Wentao Liu, Shang Li
  • Publication number: 20240145627
    Abstract: An epitaxial structure of a semiconductor light-emitting element includes an n-type layer, a V-pit control layer, a light-emitting layer, and a p-type layer stacked from bottom to top. The light-emitting layer includes a plurality of well layers and a plurality of barrier layers stacked alternately. The V-pit control layer includes a first superlattice layer, and a distance between a bottom surface of the V-pit control layer and a bottom surface of the first superlattice layer is less than or equal to 0.15 ?m. The bottom surface of the first superlattice layer and a bottom surface of the light-emitting layer have a distance therebetween ranging from 0.05 ?m to 0.3 ?m, and each of the first superlattice layer and the light-emitting layer is an Indium (In)-containing layer. A semiconductor light-emitting element and a light-emitting device are also provided.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 2, 2024
    Inventors: Meng-Hsin YEH, Zhousheng JIANG, Bing-Yang CHEN, Dongpo CHEN, Chung-Ying CHANG
  • Publication number: 20240145690
    Abstract: Disclosed are a positive electrode material, a preparation method therefor, and an application thereof. The method includes: (1) performing a co-precipitation reaction by mixing a soluble manganese salt and a soluble metal M salt with carbonate, to obtain a co-precipitate containing MxMn1-xCO3; and (2) sintering the co-precipitate containing MxMn1-xCO3 in an air atmosphere to obtain the positive electrode material containing MxMn1-xP2, where M is at least one selected from Al, Zr, Ti, Ni, Co, Mg, Ta, Ca, Fe, Na, K, Cu, Zn, Nb, Sn, Sb, La and In, and where x is in a range from 0 to 1 excluding endpoints 0 and 1.
    Type: Application
    Filed: June 24, 2021
    Publication date: May 2, 2024
    Inventors: Yang FU, Yunfeng LUO, Pu CHEN
  • Publication number: 20240144708
    Abstract: An examination system is provided. The examination system includes an optical detector and analyzer. The optical detector emits a detection light source toward a target object and detects a respondent light which is induced from the target object in response to the detection light source to generate image data. The image data indicates a detection image. The analyzer receives the image data and determines which region of the target object the detection image belongs to according to the image data. When the analyzer determines that the detection image belongs to a specific region of the target object, the analyzer extracts at least one feature of the image data to serve as a basis for classification of the specific region.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: Chih-Yang CHEN, Pau-Choo CHUNG CHAN, Sheng-Hao TSENG
  • Publication number: 20240142722
    Abstract: A passive optical alignment coupling between two bodies each having a complementary interstitial two-dimensional planar array of protrusions defining an array of interstices. Each array of protrusions defines an array of discrete protrusions separated and isolated from one another on the surface of the corresponding bodies. When the bodies are pressed together, the array of protrusions defined on one body intermesh with protrusions defined on the other body with protrusions of one body received in corresponding interstices defined on the other body. The protrusion surfaces of each adjacent pair of protrusions are in point contact. The first body is removably attachable to the second body to define a demountable coupling, with the first array of alignment features against the second array of alignment features to define an elastic averaging coupling, thereby passively aligning the first body to the second body.
    Type: Application
    Filed: October 28, 2023
    Publication date: May 2, 2024
    Inventors: Yang CHEN, Robert Ryan VALLANCE
  • Publication number: 20240140962
    Abstract: Provided are a series of 5,6-dihydrothieno[3,4-h]quinazoline compounds as represented by formula (P) and pharmaceutically acceptable salts thereof, and the use of the compounds or pharmaceutically acceptable salts thereof in the preparation of solid tumor drugs, such as solid tumor drugs associated with selective PLK1 inhibitors.
    Type: Application
    Filed: January 26, 2022
    Publication date: May 2, 2024
    Inventors: Yangyang XU, Wentao WU, Haizhong TAN, Dongkai ZAHNG, Jikui SUN, Yang ZHANG, Shuhui CHEN
  • Publication number: 20240145581
    Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN, Zheng-Yang PAN, Cheng-Po CHAU, Pin-Chu LIANG, Hung-Yao CHEN, De-Wei YU, Yi-Cheng LI
  • Publication number: 20240143047
    Abstract: A hard disk supporting structure is provided. The hard disk supporting structure includes a hard disk rack, a telescopic connecting rod, and a motor. The hard disk rack is for disposing at least one hard disk. An end of the telescopic connecting rod is connected to a rear end of the hard disk rack. The motor is connected to the other end of the telescopic connecting rod through a transmission mechanism; the motor drives the telescopic connecting rod to extend or retract through the transmission mechanism, to drive the hard disk rack to move back and forth. The present disclosure can automatically move the hard disk rack back and forth through a structure with automatic telescopic function, which saves labor, and improves efficiency.
    Type: Application
    Filed: March 25, 2022
    Publication date: May 2, 2024
    Applicants: Inventec (Pudong) Technology Corporation, INVENTEC CORPORATION
    Inventors: Yang YING, Xuefeng CHEN, Yanhua SHI, Lisheng WANG
  • Publication number: 20240141049
    Abstract: The present invention provides Wnt pathway agonists and related compositions, which may be used in any of a variety of therapeutic methods for the treatment of diseases.
    Type: Application
    Filed: July 28, 2023
    Publication date: May 2, 2024
    Inventors: Yang LI, Tom Zhiye YUAN, Aaron Ken SATO, Wen-Chen YEH, Claudia Yvonne JANDA, Tristan William FOWLER, Helene BARIBAULT, Kuo-Pao LAI, Liqin XIE, Randall J. BREZSKI, Chenggang LU
  • Publication number: 20240141301
    Abstract: A method for preparing a tumor-derived microparticle by a microwave includes the following steps: step 1, Lewis lung carcinoma (LLC) of a lung adenocarcinoma cell line is taken and then the LCC is cultured in a culture dish for more than 24 hours (h) to obtain cultured cells; step 2, microwave heating treatment is performed on the cultured cells obtained in step 1 to obtain treated cells; step 3, the treated cells obtained in step 2 are placed into a constant temperature incubator for cultivation for 24 h; and step 4, a supernatant of cells is collected from the culture dish cultured in step 3, and multiple centrifugation treatments is performed on the supernatant by using a density gradient centrifugation method to obtain a precipitate which is the tumor-derived microparticle TMPMW.
    Type: Application
    Filed: June 9, 2023
    Publication date: May 2, 2024
    Inventors: Yang Jin, WenJuan Chen, MengFei Guo, JingJing Deng, YaLi Wu
  • Patent number: 11969727
    Abstract: Present invention is related to a tumor microenvironment on chip or a biochip for cell therapy having a carrier, a first cell or tissue culture area and a second cell or tissue area imbedded within the carrier. The present invention provides a biochip successfully cooperating micro fluidic technology and cell culture achieving the goal for detecting or testing the function of cell therapy for cancer or tumor.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: April 30, 2024
    Assignees: China Medical University, China Medical University Hospital
    Inventors: Yi-Wen Chen, Ming-You Shie, Der-Yang Cho, Shao-Chih Chiu, Kai-Wen Kan, Chien-Chang Chen
  • Patent number: 11970510
    Abstract: Disclosed are a catalyst component and a catalyst for olefin polymerization, and an olefin polymerization method. The catalyst component comprises magnesium, titanium, a halogen and an internal electron donor, wherein the internal electron donor comprises a monocarboxylic acid ester compound and a diether compound, and the molar ratio of the monocarboxylic acid ester compound to the diether compound is (0.0035-0.7):1. By using the catalyst, a polymer having both a high isotactic index and a high melt flow index can be prepared.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: April 30, 2024
    Assignees: CHINA PETROLEUM & CHEMICAL CORPORATION, BEIJING RESEARCH INSTITUTE OF CHEMICAL INDUSTRY, CHINA PETROLEUM & CHEMICAL CORPORATION
    Inventors: Jin Zhao, Xianzhi Xia, Yuexiang Liu, Yang Tan, Chunhong Ren, Weili Li, Long Chen, Futang Gao, Yongtai Ling, Tao Liu
  • Patent number: 11972971
    Abstract: A wafer lift pin system is capable of dynamically modulating or adjusting the flow of gas into and out of lift pins of the wafer lift pin system to achieve and maintain a consistent pressure in supply lines that supply the gas to the lift pins. This enables the wafer lift pin system to precisely control the speed, acceleration, and deceleration of the lift pins to achieve consistent and repeatable lift pin rise times and fall times. A controller and various sensors and valves may control the gas pressures in the wafer lift pin system based on various factors, such as historic rise times, historic fall times, and/or the condition of the lift pins. This enables smoother and more controlled automatic operation of the lift pins, which reduces and/or minimizes wafer shifting and wafer instability, which may reduce processing defects and maintain or improve processing yields.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chen Chen, Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Jiun-Rong Pai
  • Patent number: 11972072
    Abstract: The present disclosure provides an electronic device including a first sensing circuit, a second sensing circuit and a power line. The first sensing circuit includes a first sensing unit and a first transistor, and a first end of the first sensing unit is coupled to a control end of the first transistor. The second sensing circuit includes a second sensing unit and a second transistor, and a first end of the second sensing unit is coupled to a control end of the second transistor. A first end of the first transistor and a first end of the second transistor are coupled to the power line.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: April 30, 2024
    Assignee: InnoLux Corporation
    Inventors: Shu-Fen Li, Chuan-Chi Chien, Hsiao-Feng Liao, Rui-An Yu, Chang-Chiang Cheng, Po-Yang Chen, I-An Yao
  • Patent number: 11970397
    Abstract: Disclosed is a method for preparing a nano-porous carbon material, comprising the following steps of: mixing polypyrrole nano-fibers with an activator, conducting microwave heating for reaction, and purifying to obtain the nano-porous carbon material. Compared with a conventional high-temperature carbonization method, the method for preparing the nano-porous carbon material of the present disclosure is simple in raw material, convenient to operate, less in time consumption and more suitable for mass preparation and production of the nano-porous carbon materials.
    Type: Grant
    Filed: April 28, 2019
    Date of Patent: April 30, 2024
    Assignee: SUN YAT-SEN UNIVERSITY
    Inventors: Yang Liu, Chao Zhang, Pengfei Yin, Jiareng Chen, Bin Cui
  • Patent number: 11973027
    Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei-Yu Chou, Jr-Hung Li, Liang-Yin Chen, Su-Hao Liu, Tze-Liang Lee, Meng-Han Chou, Kuo-Ju Chen, Huicheng Chang, Tsai-Jung Ho, Tzu-Yang Ho
  • Patent number: 11974235
    Abstract: Activating an uplink (UL) gap at a base station may include decoding a user equipment (UE) UL gap capability report received from a UE. A radio resource control (RRC) UL gap configuration may be encoded for transmission to the UE. A power headroom report (PHR) medium access control (MAC) control element (CE) received from the UE may be decoded. The PHR MAC CE may include at least one of a P value or a power management maximum power reduction (P-MPR) value. Decoding the measurement information may include determining that the P value is equal to one or the P-MPR value is greater than zero. Based on determining that the P value is equal to one or the P-MPR value is greater than zero, the UL gap configuration may be implicitly activated.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: April 30, 2024
    Assignee: APPLE INC.
    Inventors: Huaning Niu, Dawei Zhang, Jie Cui, Laxminarayana Pillutla, Manasa Raghavan, Qiming Li, Sharad Sambhwani, Xiang Chen, Yang Tang
  • Patent number: 11973338
    Abstract: A chip-level software and hardware cooperative relay protection device is provided. The device includes: a control chip, wherein a first control unit, a second control unit, and multiple logic circuits are integrated on the control chip; and the logic circuits perform microsecond-level rapid calculation on electrical signals of a protected electrical device, obtain fault feature parameters of the protected electrical device are and transmit same to the first control unit, then perform millisecond-level real-time protection logic determination according to the fault feature parameters of the protected electrical device to obtain relay protection results of the protected electrical device, and protect the protected electrical device by controlling an external relay according to the relay protection results.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: April 30, 2024
    Assignee: DIGITAL GRID RES. INST., CHINA SOUTHERN PWR. GRID
    Inventors: Peng Li, Wei Xi, Xiaobo Li, Hao Yao, Yang Yu, Tiantian Cai, Junjian Chen
  • Patent number: D1024761
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: April 30, 2024
    Assignee: HI-DOW IPHC, INC.
    Inventors: Luying Meng, Rong Guang, Bin Du, Qiangsheng Sun, Yang Chen