Abstract: Provided are mechanisms for promptly or gradually migrating data from a read-only disk in a storage system to a replacement disk, where, during gradual migration, data is migrated when it is requested of the read-only disk.

Abstract: According to one general aspect, an apparatus may include a host interface circuit configured to receive offloading instructions from a host processing device, wherein the offloading instructions instruct the apparatus to compute an error correction code associated with a plurality of data elements. The apparatus may include a memory interface circuit configured to receive the plurality of data elements. The apparatus may include a plurality of memory buffer circuits configured to temporarily store the plurality of data elements. The apparatus may include a plurality of error code computation circuits configured to, at least in part, compute the error correction code without additional processing by the host processing device.

Abstract: In various embodiments, a method for page cache management is described. The method can include: identifying a storage device fault associated with a fault-resilient storage device; determining that a first region associated with the fault-resilient storage device comprises an inaccessible space and that a second region associated with the fault-resilient storage device comprises an accessible space; identifying a read command at the second storage device for the data and determine, based on the read command, first data requested by a read operation from a local memory of the second storage device; determining, based on the read command, second data requested by the read operation from the second region; retrieving the second data from the second region; and scheduling a transmission of the second data from the fault-resilient storage device to the second storage device.

Abstract: A storage device, and a method for operating a storage device. In some embodiments, the storage device includes storage media, and the method includes: determining, by the storage device, that the storage device is in a first fault state from which recovery is possible by power cycling the storage device or by formatting the storage media; determining, by the storage device, that the storage device is in a second fault state from which partial recovery is possible by operating the storage device with reduced performance, with reduced capacity, or in a read-only mode; and operating the storage device with reduced performance, with reduced capacity, or in the read-only mode.

Abstract: An accelerator is disclosed. A hardware may process a query on a database. A storage may store a software to process the query on the database. A coordinator may manage the hardware and the software to process the query on the database based at least in part on the query, to produce a result of the query on the database.

Abstract: A system and method for scheduling commands for processing by a storage device. A command is received from an application and stored in a first queue. Information is obtained on a first set of resources managed by the storage device. A second set of resources is synchronized based on the information on the first set of resources. The second set of resources is allocated into a first pool and a second pool. A condition of the second set of resources in the first pool is determined. One of the second set of resources in the first pool is allocated to the command based on a first determination of the condition, and one of the second set of resources in the second pool is allocated to the command based on a second determination of the condition.

Abstract: A method for scheduling input/output (I/O) commands is described. The method includes receiving, by an I/O scheduler, an I/O command from an application; generating, by the I/O controller, an I/O resource requirement based on the I/O command; determining, by a traffic controller, that an amount of available resources satisfies a criteria based on the I/O resource requirement; and sending, by the traffic controller, the I/O command to a queue in response to the criteria being satisfied.

Abstract: A storage device includes a nonvolatile memory device and a storage controller. The storage controller includes a multi-protocol host interface circuit that receives a first-type request including a first logical address from an external host and transmits/receives data corresponding to the first-type request with the external host by a block unit. Additionally, the multi-protocol host interface circuit receives a second-type request including a first physical address from the external host and transmits/receives data corresponding to the second-type request with the external host by a unit smaller than the block unit. A mapping cache manager manages an address translation table cache, sends an address translation request including the first physical address to the external host, and receives a response including mapping information corresponding to the first physical address from the external host.

Abstract: Computing resources are optimally allocated for a multipath neural network using a multipath neural network analyzer that includes an interface and a processing device. The interface receives a multipath neural network that includes two or more paths. A first path includes one or more layers. A first layer of the first path corresponds to a first kernel that runs on a compute unit that includes two or more cores. The processing device allocates to the first kernel a minimum number of cores of the compute unit and a maximum number of cores of the compute unit. The minimum number of cores of the compute unit is allocated based on the first kernel being run concurrently with at least one other kernel on the compute unit and the maximum number of cores of the compute unit is allocated based on the first kernel being run alone on the compute unit.

Abstract: An accelerator is disclosed. A tier storage may store data. A circuit may process the data to produce a processed data. The accelerator may load the data from a device using a cache-coherent interconnect protocol.

Abstract: An accelerator is disclosed. A circuit may process a data to produce a processed data. A first tier storage may include a first capacity and a first latency. A second tier storage may include a second capacity and a second latency. The second capacity may be larger than the first capacity, and the second latency may be slower than the first latency. A bus may be used to transfer at least one of the data or the processed data between the first tier storage and the second tier storage.

Abstract: A Solid State Drive (SSD) is disclosed. The SSD may include an interface to receive read and write requests from an application on a host. Storage, including at least one chip, may store data. An SSD controller may process the read and write requests from the application. A configuration module may configure the SSD. Storage may include a reliability table which may include entries specifying configurations of the SSD and reliabilities for those configurations.

Abstract: Provided is a method of linking multiple KV blocks in a KV chain to ensure data consistency, the method including allocating an internal key to both a first KV block and a recovery begin internal key, allocating a next internal key that is different from the internal key and that corresponds to a next KV block, and encapsulating respective user key values in the first KV block and in the next KV block, wherein the first KV block is accessed by reading the recovery begin internal key, and wherein the next KV block is accessed by reading the next internal key of the first KV block.

Abstract: A system and method for training a neural network. In some embodiments, the system includes: a graphics processing unit cluster; and a computational storage cluster connected to the graphics processing unit cluster by a cache-coherent system interconnect. The graphics processing unit cluster may include one or more graphics processing units. The computational storage cluster may include one or more computational storage devices. A first computational storage device of the one or more computational storage devices may be configured to (i) store an embedding table, (ii) receive an index vector including a first index and a second index; and (iii) calculate an embedded vector based on: a first row of the embedding table, corresponding to the first index, and a second row of the embedding table, corresponding to the second index.

Abstract: A system and method for training a neural network. In some embodiments, the system includes a computational storage device including a backing store. The computational storage device may be configured to: store, in the backing store, an embedding table for a neural network embedding operation; receive a first index vector including a first index and a second index; retrieve, from the backing store: a first row of the embedding table, corresponding to the first index, and a second row of the embedding table, corresponding to the second index; and calculate a first embedded vector based on the first row and the second row.

Abstract: A storage system performing data deduplication includes a storage device configured to store data received from a host, and a controller configured to receive the data and an index associated with the data received from the host. The controller includes a memory configured to store mapping information and a reference count, the mapping information associating the index received from the host with a physical address of the storage system, the reference count associated with the index received from the host. The controller determines whether the data received from the host corresponds to a duplicate of data previously stored in the storage device by reading, from the memory, the mapping information and the reference count, the reading based on the index received from the host. The controller performs a deduplication process by updating the reference count if the data received from the host corresponds to the duplicate of data previously stored.

Abstract: A method for communicating with a device may include running, at a device, an operating system, communicating, using a first function of an interconnect, with the device, and communicating, using a second function of the interconnect, with the operating system. The operating system may include communication logic, and the communicating with the operating may include communicating with the communication logic. The communication logic may one or more terminal support drivers, and the communicating with the communication logic may include communicating with the one or more terminal support drivers using a terminal application. The terminal application may run on a host. The second function of the interconnect may be configured to operate with a controller. The communicating with the operating system may include communicating with the operating system based on a privilege information. The host may be a management controller.

Abstract: Embodiments of systems and methods for fast input/output (IO) on PCIE devices are described. Such methods include receiving an IO request from a user or application, the IO request comprising instructions for communicating data with a host system, the host system comprising a processing device and a memory device, analyzing information from the IO request in an IO block analyzer to select one of a plurality of communication paths for communicating the data with the host system, defining a routing instruction in a transfer routing information transmitter in response to the selected communication path, communicating the routing instruction in a Transaction Layer Packet (TLP) to an integrated IO (IIO) module of the host system routing the data from the peripheral device to either the processing device or the memory device according to the routing instruction with a data transfer router.

Abstract: A method includes receiving, at a controller of a computational storage (CS) device, a request to allocate computational storage to an application of a host device. The request includes a resource set ID associated with the application. The method further includes identifying a memory range within a memory region of the CS device. The method further includes storing, in a data structure associated with the resource set ID, an association between a memory range identifier (ID) of the memory range, the memory region, and an offset within the memory region. The method further includes sending the memory range ID to the host device.

Abstract: In various embodiments, a method for page cache management is described. The method can include: identifying a storage device fault associated with a fault-resilient storage device; determining that a first region associated with the fault-resilient storage device comprises an inaccessible space and that a second region associated with the fault-resilient storage device comprises an accessible space; identifying a read command at the second storage device for the data and determine, based on the read command, first data requested by a read operation from a local memory of the second storage device; determining, based on the read command, second data requested by the read operation from the second region; retrieving the second data from the second region; and scheduling a transmission of the second data from the fault-resilient storage device to the second storage device.