Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate including a base and a fin structure over the base. The fin structure includes a nanostructure. The semiconductor device structure includes a gate stack over the base and wrapped around the nanostructure. The gate stack has an upper portion and a sidewall portion, the upper portion is over the nanostructure, and the sidewall portion is over a first sidewall of the nanostructure. The semiconductor device structure includes a first inner spacer and a second inner spacer over opposite sides of the sidewall portion. A sum of a first width of the first inner spacer and a second width of the second inner spacer is greater than a third width of the sidewall portion as measured along a longitudinal axis of the fin structure.

Abstract: A power generation system, a power converter, and a switch assembly. The plurality of positive input ports and the plurality of negative input ports are configured to electrically connect the switch assembly to an external direct current source, and the switch assembly is electrically connected to the power device through a trace on the circuit mainboard. The switch assembly includes a plurality of first pins and a plurality of second pins, the plurality of first pins are located in a first region, the plurality of second pins are located in a second region, the first region and the second region are stacked in a first direction. The controller is configured to send a switch-off signal to the switch assembly when the external direct current source or the power device is faulty. The power converter provided can resolve a problem of a short circuit occurring during condensation.

Abstract: An inverter includes a chassis, which has a cavity that accommodates a plurality of power devices and a partition and blocking assembly. The partition and blocking assembly divides the cavity of the chassis into two installation cavities, and the plurality of power devices are disposed in the two installation cavities. The chassis includes a first side wall and a second side wall that are adjacent to each other. An air inlet of a fan of the partition and blocking assembly communicates with one installation cavity, an air outlet of the fan communicates with the other installation cavity, and a direction from the air inlet to the air outlet faces away from the first side wall. A gap exists between the partition and blocking assembly and the second side wall, or the partition and blocking assembly is provided with a through hole.

Abstract: The application provides a plasma-assisted ceramic sintering device and method. The plasma-assisted ceramic sintering device includes an enclosed container receiving ceramic green body and defining a gas outlet. A plasma jet device includes a working power supply and a plasma generation chamber. The plasma generation chamber defines a gas input port, and a gas output port located in the enclosed container. The plasma generation chamber includes a working electrode having a first end and a second end. The first end electrically connects the working power supply, and the second end is adjacent to the gas output port. A gas output device connects the gas input port for inputting working gas into the plasma generation chamber. A power supply device can electrically connect and apply voltage to the ceramic green body, obtaining the ceramic by sintering. The sintering device of the application provides plasma-assisted sintering and optimizes properties of ceramic materials.

Abstract: Techniques for resource allocation using machine learning are provided. A plurality of user segments is identified based on a plurality of features describing the users, and a set of predicted conversion scores is generated for the plurality of user segments using a trained surrogate model. A set of user segments, from the plurality of user segments, is selected by processing the set of predicted conversion scores using an acquisition model. A first resource allocation is generated for the set of user segments at a first point in time, where at least one user segment not included in the set of user segments is not allocated resources at the first point in time.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate including a base and a fin structure over the base. The fin structure includes a nanostructure. The semiconductor device structure includes a gate stack over the base and wrapped around the nanostructure. The gate stack has an upper portion and a sidewall portion, the upper portion is over the nanostructure, and the sidewall portion is over a first sidewall of the nanostructure. The semiconductor device structure includes a first inner spacer and a second inner spacer over opposite sides of the sidewall portion. A sum of a first width of the first inner spacer and a second width of the second inner spacer is greater than a third width of the sidewall portion as measured along a longitudinal axis of the fin structure.

Abstract: A power converter includes a plurality of direct current terminals, a plurality of temperature detection units, a plurality of direct current/direct current (DC/DC) conversion circuits, at least one direct current/alternating current (DC/AC) conversion circuit, and a controller. The temperature detection unit is configured to detect a temperature of the direct current terminal. When a highest temperature value in temperatures of the plurality of direct current terminals is greater than a first alarm threshold, a current value of an input current of at least one DC/DC conversion circuit is controlled to decrease. If the highest temperature value decreases to be less than or equal to a first safety threshold after the current value of the input current of the at least one DC/DC conversion circuit is decreased, a signal indicating that the direct current terminal corresponding to the at least one DC/DC conversion circuit is abnormal is output.

Abstract: The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

Abstract: A method includes capturing, via a microphone, noise data associated with the user sleeping. The method also includes detecting, based on the noise data, a trigger event. The method also includes, in response to detecting the trigger event, storing at least a portion of the noise data. The method also includes calculating, by a control system based on the at least a portion of the noise data, the sleep score for the user.

Abstract: The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

Abstract: The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate including a base and a fin structure over the base. The fin structure includes a nanostructure. The semiconductor device structure includes a gate stack over the base and wrapped around the nanostructure. The gate stack has an upper portion and a sidewall portion, the upper portion is over the nanostructure, and the sidewall portion is over a first sidewall of the nanostructure. The semiconductor device structure includes a first inner spacer and a second inner spacer over opposite sides of the sidewall portion. A sum of a first width of the first inner spacer and a second width of the second inner spacer is greater than a third width of the sidewall portion as measured along a longitudinal axis of the fin structure.

Abstract: The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

Abstract: Provided are methods, systems, computer program products for scheduling jobs. The method may include receiving a request for allocating resources for a first job, a job comprising information regarding maximum amount of resources required by the job; determining a type of the first job; obtaining at least one backfill of the first job based on the determined type; allocating the maximum amount of resources from system resources to the first job; searching a second job in waiting jobs to be allocated resources, the second job being suitable to be allocated used resources by the first job from the maximum amount of resources allocated to the first job during the at least one backfill; allocating the resources unused by the first job from the maximum amount of resources allocated to the first job to the second job in response to the first job running to the at least one backfill.

Abstract: A device includes plural semiconductor fins, a gate structure, an interlayer dielectric (ILD) layer, and an isolation dielectric. The gate structure is across the semiconductor fins. The ILD surrounds the gate structure. The isolation dielectric is at least between the semiconductor fins and has a thermal conductivity greater than a thermal conductivity of the ILD layer.

Abstract: The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

Abstract: According to embodiments of the present disclosure, there is provided a data transmission apparatus. The data transmission apparatus includes a plurality of first ports, a plurality of second ports, and a plurality of data channels. The plurality of first ports are coupled to a processing unit. The plurality of second ports are coupled to a plurality of memories. The plurality of data channels are disposed among the first ports and the second ports to form an interleaving network having a plurality of layers, and configured to transmit data among the processing unit and the plurality of memories, such that each layer in the interleaving network includes at least one interleaving sub-network.

Abstract: Provided are methods, systems, computer program products for scheduling jobs. The method may include receiving a request for allocating resources for a first job, a job comprising information regarding maximum amount of resources required by the job; determining a type of the first job; obtaining at least one backfill of the first job based on the determined type; allocating the maximum amount of resources from system resources to the first job; searching a second job in waiting jobs to be allocated resources, the second job being suitable to be allocated used resources by the first job from the maximum amount of resources allocated to the first job during the at least one backfill; allocating the resources unused by the first job from the maximum amount of resources allocated to the first job to the second job in response to the first job running to the at least one backfill.

Abstract: Example embodiments of the present disclosure provide a method, an apparatus, a device and a computer-readable storage medium for storage management. The method for storage management includes: obtaining an available channel mode of a plurality of channels in a memory of a data processing system, the available channel mode indicating availabilities of the plurality of channels, and each of the plurality of channels being associated with a set of addresses in the memory; obtaining a channel data-granularity of the plurality of channels, the channel data-granularity indicating a size of a data block that can be carried on each channel; obtaining a target address of data to be transmitted in the memory; and determining a translated address corresponding to the target address based on the available channel mode and the channel data-granularity.

Abstract: A steering knuckle, including a rod part, a disc part, an ear part including a first ear and a second ear. The rod part and the ear part are disposed on two sides of the disc part, respectively. The first ear is longer than the second ear. The first ear and the second ear each include a pin hole; the connection line of two pin holes of the first ear and the second ear is perpendicular to the axis of the rod part. The first ear extends parallel to the axis of the rod part in the direction away from the disc part to form a pulling arm configured to connect to a steering drag link. The second ear extends perpendicularly to the axis of the rod part and perpendicularly to the connection line of the two pin holes to form a steering arm configured to connect to a steering tie rod.