Abstract: A cell for detecting a disturbance capable of affecting the operation of a processor in which it is integrated, including circuitry for holding an invariant in normal operation of the processor and for detecting an invariant loss consecutive to the occurrence of a disturbance.

Abstract: A method and a circuit for scrambling an RSA-CRT algorithm calculation by an electronic circuit, in which a result is obtained from two modular exponentiation calculations, each providing a partial result, and from a recombination step, and in which a first step adds a digital quantity to at least one first partial result before said recombination step; and a second step cancels the effects of this quantity after the recombination step.

Abstract: A device for selecting an operating mode of an integrated circuit, including a non-volatile memory programmable after manufacturing exhibiting prior to any programming an initial content, means for storing a first signature representative of the initial content of the memory, means for calculating a second signature representative of a current content of the memory, and means for evaluating a difference between the first and second signatures and for deactivating an operating mode selection signal when the difference is greater than a predetermined threshold.

Abstract: A method for protecting an execution, by an integrated circuit, of a ciphering and/or deciphering algorithm taking into account data and at least one valid key and performing several iterations of the same calculation, including at least one execution of an iteration with the valid key between several executions of the same iteration with the invalid keys obtained by applying at least one non-linear one-way function to the valid key.

Abstract: A method and a circuit for protecting the execution of a program, including initializing at least one counter, carrying on with the normal program execution, interrupting this execution when the counter reaches a given value, and executing at least one integrity check of the calculation after this interrupt.

Abstract: A method for protecting an integrated circuit, including at least one non-volatile memory, including the steps of detecting a possible disturbance in the flow of a program executed by the integrated circuit, modifying the value of a digital variable in a volatile storage element in case of a disturbance detection and, in a way independent in time from the detection, intervening upon the non-volatile memory according to the value of said variable.

Abstract: A method and a circuit for protecting a digital quantity over a first number of bits, in an algorithm executing at least one modular exponentiation of data by the quantity, the steps including at least one squaring up and at least one multiplication and implementing, for each bit of the quantity, different calculation steps according to the state of the bit, a same number of multiplications being performed whatever the state of the bit and all the calculation steps using a multiplication being taken into account to calculate a final result.

Abstract: A method for protecting the execution of a main program against possible traps, including, on occurrence of an instruction from the main program, starting a time counter of a given count according to next instructions of the main program, and executing, once the counter has reached its count, at least one instruction of a secondary program from which the result of the main program depends.

Abstract: A method for determining the entropy of a noise source providing a bit flow, a method and a device for generating a bit flow, including parallelizing the bit flow to obtain first words over a first number of bits, applying to the successive words a compression function, and evaluating a second number of bits over which the compression function provides its results, the second number representing the number of useful bits in the first words.

Abstract: A device for selecting an operating mode of an integrated circuit, comprising a ROM storing at least one predetermined value formed of data words, a non-volatile programmable memory controllable to store said predetermined value, a comparator indicating how many data words of the value stored in the programmable memory are identical to the data words of the predetermined value, and a control means deactivating a selection signal for selecting the operating mode when the number of identical words is greater than a predetermined threshold.

Abstract: A method for checking a digital quantity contained in a non-volatile storage element of a processor and such a processor, including dividing the block into blocks of identical size, applying a symmetrical ciphering algorithm to each block, and applying a non-linear bijective function to results of the previous steps to obtain a current value to be compared with an expected value provided by the outside of the processor.

Abstract: A method is provided for secured transfer of data from a first memory containing the data element to a second memory through a data bus that is connected between the first memory and the second memory. According to the method, a secret N-byte data element is transferred byte-by-byte through the data bus, with each byte transiting at least once on the data bus. Before each transfer of a byte of the secret data element, a current index ranging from 0 to N?1 is randomly chosen, with the current index corresponding to a place value of the byte to be transferred. At each transfer of a byte of the secret data element with a place value equal to the current index, a corresponding bit of an N-byte loading indicator is modified as a function of a loading mode, with the loading mode being an integer ranging from 0 to a first constant. The transfer of the secret data element is ended when the loading indicator takes a predetermined value.

Abstract: A method and a circuit for masking a digital word by application of a random bijection, including applying at least one first operation including selecting a non-disjoint subset of the word having its position and size depending on a first random quantity, and assigning to each bit of the subset, the state of the bit having a symmetrical position with respect to the middle of the subset, to obtain a masked digital quantity.

Abstract: A method for protecting the execution of an algorithmic calculation taking into account at least one valid piece of data and at least one secret key by an integrated circuit, and performing several iterations of an encryption calculation, including executing the algorithm with the valid data between several executions of the same algorithm with invalid data corresponding to a combination of the valid data with predetermined masks.

Abstract: A method and an element of ciphering by an integrated processor of data to be stored in a memory, including applying a ciphering algorithm which is a function of a key specific to the integrated circuit and of an initialization vector, and of memorizing at least the ciphered data, the initialization vector depending at least on the address of storage of the data in the memory.

Abstract: A method and a circuit for detecting a possible loss of the equiprobable character of a first output bit flow originating from at least one first normalization element of an initial bit flow, consisting of submitting the initial flow to at least one second normalization element of a nature different from the first one, pairing, bit to bit, the flows originating from the two elements, and checking the equidistribution of the different state pairs.

Abstract: A method and a circuit for detecting a possible loss in the equiprobable character of a first output bit flow originating from at least one first element of normalization of an initial bit flow, consisting of analyzing the flow rate of the normalization element.

Abstract: A method for performing at least one jump in a program executed by a processor, including determining a result over several bits as an indicator that a desired condition has been complied with, the result corresponding to an operation taking into account at least one predetermined value and at least one current value; and calculating a jump address which is a function of the result.

Abstract: A method and a circuit for protecting against possible fault injections a calculation successively performed by several hardware cells of a same electronic element, including: starting a first execution of the calculation; starting a second execution of the same calculation once the first execution has freed a first cell and goes on in a second cell; synchronizing the executions so that the second execution uses a cell only when the first execution has passed to the next cell; and verifying the identity between the two results at the end of the execution of the two calculations.

Abstract: A method and a circuit for normalizing a noise source providing an initial bit flow, including conditioning the state of an output bit to the respective states of the bits of the initial flow examined by words of identical lengths and, upon occurrence of a word of bits of identical states, conditioning the state of the current output bit to the state of at least one previous output bit.