Patents by Inventor Yao Chen

Yao Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12681768
    Abstract: Resource optimized forwarding of classified requests to different instances of a microservice is provided. The process includes obtaining classified requests to a microservice. The classified requests are classified based on different microservice resource consumption types. Further, the method includes forwarding the classified requests to instances of the microservice with different assigned resource configurations. The forwarding is based on the different microservice resource consumption types of the classified requests.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: July 14, 2026
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hao Sheng, Rong Fu, Pan Li, Xiao Lin Sun, Yao Chen, Qing Yuan Meng
  • Publication number: 20260195041
    Abstract: The present disclosure provides a memory programming method, a memory device and a memory system. The memory device comprises a plurality of memory cells. The method comprises: performing a first incremental step pulse programming on the memory cells; performing a first programmed state verification on the memory cells; and performing a second incremental step pulse programming on the memory cells, comprising: determining an incremental voltage in the second incremental step pulse programming being less than a default incremental voltage, in response to a programming temperature of the memory cells being within a preset first temperature range. Implementations of the present disclosure can improve read margin of the memory cells, reduce read errors, and reduce overall loss for the performance of the memory device.
    Type: Application
    Filed: March 2, 2026
    Publication date: July 9, 2026
    Inventors: Yifan Li, Yao Chen, Zhiliang Xia
  • Patent number: 12673825
    Abstract: Embodiments of the present disclosure provide an order processing method, apparatus, device, system, medium, and product. The method includes: obtaining a target order to be processed and determining a quantity of types of goods in the target order; dividing the target order into a plurality of sub-orders according to the quantity of types of goods and assigning different workstations for the sub-orders; and sending the sub-orders for which the workstations have been assigned to the corresponding workstations for processing.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: July 7, 2026
    Assignee: HAI ROBOTICS CO., LTD.
    Inventors: Yurong Gao, Yao Chen
  • Patent number: 12671232
    Abstract: Spontaneous and stimulated emission devices such as edge emitting laser diodes and vertical cavity surface emitting lasers operating in the visible spectrum and in the infrared spectrum between 380 mm and 1600 nm, and to the application of the light-emitting devices are disclosed. The devices are based on relaxed InGaN to provide strain-balanced epitaxial layer stacks.
    Type: Grant
    Filed: June 27, 2025
    Date of Patent: June 30, 2026
    Assignee: OPNOVIX CORP.
    Inventors: Michael R. Krames, Jun Wang, Nicolas Grandjean, Yao Chen, Jean-Francois Carlin, Etienne Giraud
  • Patent number: 12652516
    Abstract: In one of the various implementations of this disclosure, a first device establishes short-range communication with a second device. The first device obtains related information of the second device based on the short-range communication. The first device sends the related information of the second device and related information of the first device to a third device. The first device then receives paging from the third device, where the paging is sent by the third device based on the related information of the second device and the related information of the first device.
    Type: Grant
    Filed: August 25, 2023
    Date of Patent: June 9, 2026
    Assignee: Yinwang Intelligent Technologies Co., Ltd.
    Inventors: Yao Chen, Mingchao Li
  • Publication number: 20260155632
    Abstract: Bulk relaxed Wurtzite In-containing III-nitride layers having a smooth and substantially pit-free surface morphology and an interface region having a substantially relaxed in-plane a-lattice parameter and characterized by a single-phase gallium-polar (0001) orientation are disclosed. Methods of making the bulk relaxed Wurtzite In-containing III-nitride layers using MOCVD growth conditions are also disclosed. Semiconductor structures include epitaxial layers grown on a bulk relaxed Wurtzite In-containing III-nitride layer. The semiconductor structures can be used in optoelectronic devices such as in light sources for illumination and display applications.
    Type: Application
    Filed: January 2, 2026
    Publication date: June 4, 2026
    Inventors: Michael R. KRAMES, Yao CHEN, Jean-Francois CARLIN, Etienne GIRAUD, Nicolas GRANDJEAN
  • Patent number: 12642871
    Abstract: The present disclosure provides stable lyophilized pharmaceutical compositions comprising recombinant adeno-associated virus (rAAV) particles. In certain embodiments, the compositions contain, in addition to the rAAV particles, a buffer, one or more salts, a surfactant, a bulking agent, and a sugar. The pharmaceutical compositions of the present disclosure exhibit a substantial degree of rAAV stability upon stress and storage.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: June 2, 2026
    Assignee: Regeneron Pharmaceuticals, Inc.
    Inventors: Dingjiang Liu, Li Zhi, Yao Chen, Kuan-Yu Lai, Jonathan Wert, Xiaoyan Wang
  • Patent number: 12626926
    Abstract: Methods and systems are provided for an electrode active material for lithium ion batteries. In one example, the electrode active material may include a lithium mixed metal oxide core and flame-retardant dusting particles partially retained within a surface of the core. In some examples, the dusting particles may have an average size of less than 20 ?m. In some examples, the amount of dusting particles by weight may be greater than 0.1% of the core particles and less than 50% of the core particles. In another example, methods are provided for manufacturing the electrode active material for use in a lithium ion battery, where lithium metal composite core particles may be mixed with the flame-retardant dusting particles in a dry process.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: May 12, 2026
    Assignee: A123 SYSTEMS LLC
    Inventors: Lixin Wang, Weidong Zhou, Yao Chen, Chloe Harrison, Fu Zhou, Kitae Kim, Jun Wang, Derek C. Johnson
  • Publication number: 20260123095
    Abstract: The present application discloses a back contact solar cell and a photovoltaic module. An example back contact solar cell includes: a semiconductor substrate, a first doped region, a second doped region, and at least one conductive semiconductor structure. The first doped region and the second doped region are alternately spaced apart on a back surface of the semiconductor substrate. Each conductive semiconductor structure is at least partially located between the first doped region and the second doped region, and only a part of the first doped region and only a part of the second doped region are in electrical contact with at least one conductive semiconductor structure respectively. A width of a spacing region located between the first doped region and the second doped region is D1. A width of the conductive semiconductor structure along an extension direction of the spacing region is W, and 0.5D1?W?6D1.
    Type: Application
    Filed: January 26, 2025
    Publication date: April 30, 2026
    Inventors: Yao CHEN, Hongbo TONG, Xueliang ZHAO, Chen CHEN
  • Publication number: 20260123090
    Abstract: This present disclosure provides a back contact solar cell and a photovoltaic module. In one example, a back contact solar cell includes a silicon substrate, a P-type doped polysilicon layer, and an N-type doped polysilicon layer, where the silicon substrate includes a first side and a second side opposite to the first side. The P-type doped polysilicon layer is located in a first region on the first side of the silicon substrate, and the N-type doped polysilicon layer is located in a second region on the first side of the silicon substrate, where the first region is different from the second region. A ratio of a thickness of the P-type doped polysilicon layer to a thickness of the N-type doped polysilicon layer ranges from 1 to 2.
    Type: Application
    Filed: November 18, 2024
    Publication date: April 30, 2026
    Inventors: Zhenguo LI, Hongbo TONG, Yao CHEN, Xueliang ZHAO, Jiawei ZHAO
  • Patent number: 12604469
    Abstract: A memory die includes first and second memory-region alternating stacks of memory-region insulating layers and electrically conductive layers that are laterally spaced apart from each other by a respective first portion of a retro-stepped dielectric structure overlying first stepped surfaces of the first and second memory-region alternating stacks, memory opening fill structures located the first and second memory-region alternating stacks, and a peripheral alternating stack of peripheral insulating layers and spacer material which is laterally spaced from the second memory-region alternating stack by a second portion of the retro-stepped dielectric structure overlying second stepped surfaces of the second memory-region alternating stack.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: April 14, 2026
    Assignee: Sandisk Technologies, Inc.
    Inventors: Yao Chen, Shigehisa Inoue, Kazuto Ohsawa, Hisaya Sakai
  • Patent number: 12597371
    Abstract: The embodiment of this application discloses a connecting assembly and a assembled display, the connecting assembly comprises a first base provided with a first guiding structure, a second base provided with a second guiding structure, and a connecting member for locking the first base and the second base together, and the connecting member is provided with a first matching structure configured to match the first guiding structure and a second matching structure configured to match the second guiding structure.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: April 7, 2026
    Assignee: TCL China Star Optoelectronics Technology Co., Ltd.
    Inventors: Min Wang, Yao Chen
  • Publication number: 20260094940
    Abstract: A battery comprises a separator. In the width direction of the separator, the separator further comprises a first region and a second region located between the positive and negative electrode plates. The protruding heights of the adhesive layers in the first and second regions are denoted as X and Y, respectively. The battery further comprises an electrolyte comprising a first solvent and a first additive each having a dielectric constant of ?10. Based on the total mass of the electrolyte, the mass percentages of the first solvent and the first additive are denoted as a and b, respectively; and 3?(a+b)/(X/Y)?60 is satisfied, such that the adhesion between the separator and the electrode plate can be significantly improved, and the infiltration problem caused by the pore blockage by the adhesive layer of the separator can be effectively solved.
    Type: Application
    Filed: September 3, 2025
    Publication date: April 2, 2026
    Inventors: Qibo Luo, Qingsong Liu, Hui Zhu, Yao Chen
  • Patent number: 12591363
    Abstract: The present disclosure provides a memory programming method, a memory device and a memory system. The memory device comprises a plurality of memory cells. The method comprises: performing a first incremental step pulse programming on the memory cells; performing a first programmed state verification on the memory cells; and performing a second incremental step pulse programming on the memory cells, comprising: determining an incremental voltage in the second incremental step pulse programming being less than a default incremental voltage, in response to a programming temperature of the memory cells being within a preset first temperature range. Implementations of the present disclosure can improve read margin of the memory cells, reduce read errors, and reduce overall loss for the performance of the memory device.
    Type: Grant
    Filed: May 31, 2023
    Date of Patent: March 31, 2026
    Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
    Inventors: Yifan Li, Yao Chen, Zhiliang Xia
  • Publication number: 20260034683
    Abstract: A method and device for determining pressure applied to a robot foot device by leveraging deformation parameters of cantilever devices. The method includes obtaining a deformation parameter representing the deformation state of at least one cantilever device when subjected to pressure, determining the target position on the robot foot where the pressure is applied, and calculating the corresponding target pressure. The determination process involves utilizing predefined pressure correspondence relationships that map deformation parameters to positions and pressure ratios. The invention also provides a device with a processor and memory to execute the method, a legged robot incorporating the device, and computer-readable media containing instructions for implementing the method. This innovation enables precise pressure detection and localization for enhanced robotic performance and adaptability.
    Type: Application
    Filed: January 16, 2025
    Publication date: February 5, 2026
    Applicant: Beijing Xiaomi Robot Technology Co., Ltd.
    Inventors: Tongye XU, Wenping GUO, Xiaoling WEI, Yao CHEN
  • Patent number: 12542413
    Abstract: Bulk relaxed Wurtzite In-containing III-nitride layers having a smooth and substantially pit-free surface morphology and an interface region having a substantially relaxed in-plane a-lattice parameter and characterized by a single-phase gallium-polar (0001) orientation are disclosed. Methods of making the bulk relaxed Wurtzite In-containing III-nitride layers using MOCVD growth conditions are also disclosed. Semiconductor structures include epitaxial layers grown on a bulk relaxed Wurtzite In-containing III-nitride layer. The semiconductor structures can be used in optoelectronic devices such as in light sources for illumination and display applications.
    Type: Grant
    Filed: June 27, 2025
    Date of Patent: February 3, 2026
    Assignee: Opnovix Corp.
    Inventors: Michael R. Krames, Yao Chen, Jean-Francois Carlin, Etienne Giraud, Nicolas Grandjean
  • Publication number: 20260011983
    Abstract: Spontaneous and stimulated emission devices such as edge emitting laser diodes and vertical cavity surface emitting lasers operating in the visible spectrum and in the infrared spectrum between 380 mm and 1600 nm, and to the application of the light-emitting devices are disclosed. The devices are based on relaxed InGaN to provide strain-balanced epitaxial layer stacks.
    Type: Application
    Filed: June 27, 2025
    Publication date: January 8, 2026
    Inventors: MICHAEL R. KRAMES, JUN WANG, NICOLAS GRANDJEAN, YAO CHEN, JEAN-FRANCOIS CARLIN, ETIENNE GIRAUD
  • Patent number: 12518710
    Abstract: A driving control apparatus, a driving control method and a display apparatus. When a display panel is in a power-on state and it is determined that a user leaves the display panel, a backlight stop signal (VBN) is first output, and a voltage stop signal (VPN) is then output. A backlight control circuit (320) stops operating in response to the backlight stop signal. In response to the voltage stop signal, a power switching circuit (330) stops outputting a driving voltage for driving the display panel to display a picture. When determining that the user returns to the front of the display panel, a voltage start signal (VPQ) can first be output, and a backlight start signal (VBQ) is then output. The backlight control circuit starts to operate in response to the backlight start signal. The power switching circuit outputs the driving voltage in response to the voltage start signal.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: January 6, 2026
    Assignees: Chongqing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Ying Zhang, Can Shen, Jin Sha, Bo Ran, Xiang Fang, Chao Gao, Yao Chen, Yiming Cheng, Jinxiang Li, Shifei Huang, Shengjie Yin, Junrui Fang, Wendi Zhang, Jun Tao, Qiuju Xie, Zhou Zhang, Jun Wei, Hongchao Su
  • Publication number: 20260005485
    Abstract: Bulk relaxed Wurtzite In-containing III-nitride layers having a smooth and substantially pit-free surface morphology and an interface region having a substantially relaxed in-plane a-lattice parameter and characterized by a single-phase gallium-polar (0001) orientation are disclosed. Methods of making the bulk relaxed Wurtzite In-containing III-nitride layers using MOCVD growth conditions are also disclosed. Semiconductor structures include epitaxial layers grown on a bulk relaxed Wurtzite In-containing III-nitride layer. The semiconductor structures can be used in optoelectronic devices such as in light sources for illumination and display applications.
    Type: Application
    Filed: June 27, 2025
    Publication date: January 1, 2026
    Inventors: MICHAEL R. KRAMES, YAO CHEN, JEAN-FRANCOIS CARLIN, ETIENNE GIRAUD, NICOLAS GRANDJEAN
  • Patent number: D1119375
    Type: Grant
    Filed: December 19, 2024
    Date of Patent: March 24, 2026
    Assignee: HANGZHOU GIPUTA CLOTHING CO., LTD.
    Inventors: Yao Chen, Michael Alexander Mayer