Abstract: A local oscillation generator includes a multi-phase circuit and a multiplexer. The multi-phase oscillator provides a plurality of multi-phase oscillation signals of a same frequency and different phases. The multiplexer conducts one of the multi-phase oscillation signals to an output end in different time slots to provide an output oscillation signal. The frequency of the multi-phase oscillation signals is the same as a fundamental frequency, and the frequency of the output oscillation signal is different from the fundamental frequency. Thus, the local oscillation generator provides a local oscillation signal according to the output oscillation signal such that the fundamental frequency is different from the frequency of the local oscillation signal.

Abstract: A signal generating system for generating an output signal with a 50% duty cycle, comprising: a frequency dividing module, comprising an odd number of level triggering devices, for generating a plurality of frequency divided signals utilizing a frequency dividing ratio equaling to M, wherein the M is an positive integer; and a signal combining module, for combining at least two of the frequency divided signals to generate at least one output combined signal. The signal generating system generates the output signal based on the output combined signal. The frequency dividing module cooperates the signal combining module to provide a frequency dividing ratio equaling to N.5, wherein the N is a positive integer.

Abstract: A local oscillation generator includes an oscillation circuit, a frequency multiplication circuit, a mixer, and a frequency divider. The oscillation circuit provides a fundamental oscillation signal. The frequency multiplication circuit provides a first oscillation signal according to the fundamental oscillation signal. The mixer provides a mixed oscillation signal according to mixing of the fundamental oscillation signal and the first oscillation signal. The frequency divider frequency divides the mixed oscillation signal so that the local oscillation generator accordingly provides a local oscillation signal.

Abstract: A communication device is provided in the present invention. The communication device comprises an oscillation signal source, a tunable capacitor array, a frame counter; and a control module. The control module is configured to jointly or separately control the tunable capacitor array and the frame counter to compensate a first frequency offset of the oscillation signal source when the communication device operates in a first mode, and to jointly or separately control the tunable capacitor array and the frame counter to compensate a second frequency offset of the oscillation signal source when the communication device operates in a second mode.

Abstract: A circuit, including a receiving path, for converting a first analog radio frequency (RF) input signal to a digital intermediate frequency (IF) input signal, wherein the first analog RF input signal includes a first signal component conforming to a first wireless transmission standard and a second signal component conforming to a second wireless transmission standard; a first digital down converter, for receiving and processing the digital IF input signal to generate a first digital baseband signal corresponding to the first signal component; a second digital down converter, for receiving and processing the digital IF input signal in order to generate a second digital baseband signal corresponding to the second signal component; a first baseband processing module, for processing the first digital baseband signal according to the first wireless transmission standard; and a second baseband processing module, for processing the second digital baseband signal according to the second wireless transmission standard

Abstract: A circuit system includes a current supply module, a voltage supply module and a voltage-controlled oscillator (VCO). The current supply module provides a current adapted to an ambient temperature. The voltage supply module receives the current and generates an adapted voltage according to the current. The VCO receives the adapted voltage and generates an oscillation signal according to the adapted voltage.

Abstract: A phase locked loop and an associated alignment method are provided. A disclosed phase locked loop receives a reference signal to provide a feedback signal. The phase locked loop is first opened. When the phase locked loop is open, a frequency range of an oscillating signal from a voltage-controlled oscillator is substantially selected. The feedback signal is provided according to the oscillation signal. After the frequency range is selected, the phase locked loop is kept open and the phases of the reference signal and the feedback signal are substantially aligned. The phase locked loop is then closed after the reference signal and the feedback signal are aligned.

Abstract: A frequency multiplier includes a first impedance module, a second impedance module, a first path and a second path. When the first path is conducted, the first impedance module generates a first output signal and the second impedance module generates a second output signal. When the second path is conducted, the first impedance module generates a third output signal and the second impedance module generates a fourth output signal. The first and second paths are not conducted simultaneously. A frequency of a first combination signal generated from the first and third output signals and a frequency of a second combination signal generated from the second and fourth output signals are N times of a frequency of the input signal, where N is a positive rational number.

Abstract: A communication device is provided in the present invention. The communication device comprises an oscillation signal source, a tunable capacitor array, a frame counter; and a control module. The control module is configured to jointly or separately control the tunable capacitor array and the frame counter to compensate a first frequency offset of the oscillation signal source when the communication device operates in a first mode, and to jointly or separately control the tunable capacitor array and the frame counter to compensate a second frequency offset of the oscillation signal source when the communication device operates in a second mode.

Abstract: A frequency multiplier and associated method are provided, wherein the frequency multiplier includes a waveform generator and a slicer. The waveform generator generates a waveform in response to an input signal, and the slicer induces transitions in an output signal whenever the waveform crosses each of a plurality of reference levels, such that a frequency of the output signal is a multiple of a frequency of the input signal.

Abstract: A direct-conversion transmitter including an oscillator, a frequency divider, a transmitter, and a filter is provided. The oscillator generates an oscillating signal with an original frequency. The frequency divider performs frequency dividing on the oscillating signal, so as to generate a carrier signal. The transmitter receives the carrier signal from the frequency divider and generates an output signal based on the carrier signal and a data signal. The filter is coupled between the frequency divider and the transmitter. The filter filters out an interference signal fed-back from the transmitter to the oscillator, wherein the interference signal may cause the oscillating signal to float.

Abstract: A circuit, including a receiving path, for converting a first analog radio frequency (RF) input signal to a digital intermediate frequency (IF) input signal, wherein the first analog RF input signal includes a first signal component conforming to a first wireless transmission standard and a second signal component conforming to a second wireless transmission standard; a first digital down converter, for receiving and processing the digital IF input signal to generate a first digital baseband signal corresponding to the first signal component; a second digital down converter, for receiving and processing the digital IF input signal in order to generate a second digital baseband signal corresponding to the second signal component; a first baseband processing module, for processing the first digital baseband signal according to the first wireless transmission standard; and a second baseband processing module, for processing the second digital baseband signal according to the second wireless transmission standard

Abstract: A frequency multiplier includes a first impedance module, a second impedance module, a first path and a second path. When the first path is conducted, the first impedance module generates a first output signal and the second impedance module generates a second output signal. When the second path is conducted, the first impedance module generates a third output signal and the second impedance module generates a fourth output signal. The first and second paths are not conducted simultaneously. A frequency of a first combination signal generated from the first and third output signals and a frequency of a second combination signal generated from the second and fourth output signals are N times of a frequency of the input signal, where N is a positive rational number.

Abstract: A direct-conversion transmitter including an oscillator, a frequency divider, a transmitter, and a filter is provided. The oscillator generates an oscillating signal with an original frequency. The frequency divider performs frequency dividing on the oscillating signal, so as to generate a carrier signal. The transmitter receives the carrier signal from the frequency divider and generates an output signal based on the carrier signal and a data signal. The filter is coupled between the frequency divider and the transmitter. The filter filters out an interference signal fed-back from the transmitter to the oscillator, wherein the interference signal may cause the oscillating signal to float.

Abstract: An offset phase-locked loop (PLL) transmitter comprises a clock generator that generates a first clock signal; a detector that detects a phase difference between an input data signal and a feedback data signal to generate a control signal; a controlled oscillator, coupled to the detector, that generates an output data signal according to the control signal; a mixer, coupled to the controlled oscillator and the clock generator, that mixes the output data signal according to the first clock signal to generate the feedback data signal; and a control circuit, coupled to the detector and the controlled oscillator, that adjusts the operating frequency curve of the controlled oscillator by one of a first step distance and a second step distance smaller than the first step distance such that the control signal is substantially equal to a predetermined value.

Abstract: A frequency multiplier and associated method are provided, wherein the frequency multiplier includes a waveform generator and a slicer. The waveform generator generates a waveform in response to an input signal, and the slicer induces transitions in an output signal whenever the waveform crosses each of a plurality of reference levels, such that a frequency of the output signal is a multiple of a frequency of the input signal.

Abstract: A local oscillation generator includes a multi-phase circuit and a multiplexer. The multi-phase oscillator provides a plurality of multi-phase oscillation signals of a same frequency and different phases. The multiplexer conducts one of the multi-phase oscillation signals to an output end in different time slots to provide an output oscillation signal. The frequency of the multi-phase oscillation signals is the same as a fundamental frequency, and the frequency of the output oscillation signal is different from the fundamental frequency. Thus, the local oscillation generator provides a local oscillation signal according to the output oscillation signal such that the fundamental frequency is different from the frequency of the local oscillation signal.

Abstract: A local oscillation generator includes an oscillation circuit, a frequency multiplication circuit, a mixer, and a frequency divider. The oscillation circuit provides a fundamental oscillation signal. The frequency multiplication circuit provides a first oscillation signal according to the fundamental oscillation signal. The mixer provides a mixed oscillation signal according to mixing of the fundamental oscillation signal and the first oscillation signal. The frequency divider frequency divides the mixed oscillation signal so that the local oscillation generator accordingly provides a local oscillation signal.

Abstract: A voltage-controlled oscillator (VCO) control circuit, used for controlling a VCO to process phase locking procedure after receiving a frequency locking signal, comprises an operating frequency controller and a judgment unit. The operating frequency controller, coupled to the VCO and the judgment unit, generates one of a first control code and a second control code to the VCO. The judgment unit, coupled to an input end of the VCO, generates a phase locking signal according to a voltage control signal inputted to the VCO. When the operating frequency controller receives the frequency locking signal, the operating frequency controller generates a first control code to control the VCO to switch from a first candidate VCO curve to a second candidate VCO curve. When the operating frequency controller receives the phase locking signal, the operating frequency controller generates a second control code to control the VCO to switch from the second candidate VCO curve to the first candidate VCO curve.

Abstract: A phase locked loop and an associated alignment method are provided. A disclosed phase locked loop receives a reference signal to provide a feedback signal. The phase locked loop is first opened. When the phase locked loop is open, a frequency range of an oscillating signal from a voltage-controlled oscillator is substantially selected. The feedback signal is provided according to the oscillation signal. After the frequency range is selected, the phase locked loop is kept open and the phases of the reference signal and the feedback signal are substantially aligned. The phase locked loop is then closed after the reference signal and the feedback signal are aligned.