Patents by Inventor Yao-Lien Hsieh
Yao-Lien Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12243466Abstract: The present disclosure provides an electronic device and a driving method thereof. The electronic device includes a pixel compensation circuit and a display panel. The pixel compensation circuit receives a pixel signal. The pixel signal includes multiple sub-pixel gray-scale values. The pixel compensation circuit compensates the sub-pixel gray-scale value according to the difference between the sub-pixel gray-scale values and the first threshold value to output an adjusted pixel signal. The display panel displays an image screen according to the adjusted pixel signal.Type: GrantFiled: January 15, 2023Date of Patent: March 4, 2025Assignee: Innolux CorporationInventors: Yao-Lien Hsieh, Chien-Hung Chan, Meng-Chang Tsai, Chan-Feng Chiu
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Patent number: 12190839Abstract: An electronic device includes gate lines, maintained at a low level voltage during a blank period and sequentially scanned during an active period in a frame period, and data lines. Voltage polarities of the data lines for all the blank period are respectively identical with voltage polarities of the data lines during the active period. A first level voltage applied to one of the data lines during all the blank period is related to an average value or a maximum value of level voltages of a portion or all of the data lines during the active period. A time length of the blank period in the frame period with the average value or the maximum value applied to one of the data lines during all the blank period is longer than a first time length of a first blank period in a first frame period adjacent to the frame period.Type: GrantFiled: September 28, 2023Date of Patent: January 7, 2025Assignee: InnoLux CorporationInventors: Yeh-Yi Lan, Cheng-Cheng Pan, Ming-Chin Hsu, Hsiu-Chuan Chung, Szu-Fan Wu, Chien-Hung Chan, Huang-Chi Chao, Wai Lon Chan, Yao-Lien Hsieh, Li-Jin Wang
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Patent number: 12183257Abstract: An electronic device includes a display panel, a gate driving circuit and a control unit. The display panel includes a display scan line and a dummy scan line. The gate driving circuit includes a first output unit for providing a display scan signal to the display scan line, and a second output unit for providing a test scan signal to the dummy scan line. The control unit is electrically connected to the gate driving circuit for receiving the test scan signal, updating a driving voltage according to the test scan signal, and driving the gate driving circuit according to the updated driving voltage.Type: GrantFiled: November 15, 2023Date of Patent: December 31, 2024Assignee: InnoLux CorporationInventors: Yu-Hsin Feng, Yu-Tse Lu, Jen-Chieh Hsieh, Yao-Lien Hsieh
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Publication number: 20240203317Abstract: An electronic device includes a display panel, a gate driving circuit and a control unit. The display panel includes a display scan line and a dummy scan line. The gate driving circuit includes a first output unit for providing a display scan signal to the display scan line, and a second output unit for providing a test scan signal to the dummy scan line. The control unit is electrically connected to the gate driving circuit for receiving the test scan signal, updating a driving voltage according to the test scan signal, and driving the gate driving circuit according to the updated driving voltage.Type: ApplicationFiled: November 15, 2023Publication date: June 20, 2024Applicant: InnoLux CorporationInventors: Yu-Hsin FENG, Yu-Tse Lu, Jen-Chieh HSIEH, Yao-Lien HSIEH
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Publication number: 20240021170Abstract: An electronic device includes gate lines, maintained at a low level voltage during a blank period and sequentially scanned during an active period in a frame period, and data lines. Voltage polarities of the data lines for all the blank period are respectively identical with voltage polarities of the data lines during the active period. A first level voltage applied to one of the data lines during all the blank period is related to an average value or a maximum value of level voltages of a portion or all of the data lines during the active period. A time length of the blank period in the frame period with the average value or the maximum value applied to one of the data lines during all the blank period is longer than a first time length of a first blank period in a first frame period adjacent to the frame period.Type: ApplicationFiled: September 28, 2023Publication date: January 18, 2024Applicant: InnoLux CorporationInventors: Yeh-Yi LAN, Cheng-Cheng PAN, Ming-Chin HSU, Hsiu-Chuan CHUNG, Szu-Fan WU, Chien-Hung CHAN, Huang-Chi CHAO, Wai Lon CHAN, Yao-Lien HSIEH, Li-Jin Wang
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Publication number: 20230267870Abstract: The present disclosure provides an electronic device and a driving method thereof. The electronic device includes a pixel compensation circuit and a display panel. The pixel compensation circuit receives a pixel signal. The pixel signal includes multiple sub-pixel gray-scale values. The pixel compensation circuit compensates the sub-pixel gray-scale value according to the difference between the sub-pixel gray-scale values and the first threshold value to output an adjusted pixel signal. The display panel displays an image screen according to the adjusted pixel signal.Type: ApplicationFiled: January 15, 2023Publication date: August 24, 2023Applicant: Innolux CorporationInventors: Yao-Lien Hsieh, Chien-Hung Chan, Meng-Chang Tsai, Chan-Feng Chiu
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Publication number: 20220130317Abstract: The present disclosure provides an electronic device and an electronic device driving method. The electronic device includes a plurality of gate lines and a plurality of data lines. The plurality of gate lines are sequentially scanned during an active period in a frame period, and the plurality of gate lines are maintained at a low level voltage during a blank period in the frame period. Voltage polarities of the plurality of data lines during a first time period of the blank period are respectively identical with voltage polarities of the plurality of data lines during the active period.Type: ApplicationFiled: September 23, 2021Publication date: April 28, 2022Applicant: InnoLux CorporationInventors: Yeh-Yi LAN, Cheng-Cheng PAN, Ming-Chin HSU, Hsiu-Chuan CHUNG, Szu-Fan WU, Chien-Hung CHAN, Huang-Chi CHAO, Wai Lon CHAN, Yao-Lien HSIEH, Li-Jin Wang
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Patent number: 10586501Abstract: A low color shift display panel includes a pixel array. The pixel array includes a first sub-pixel and a second sub-pixel. Each of the first sub-pixel and second sub-pixel respectively includes a data line, a gate line, a first transistor coupled to the data line and a first liquid crystal capacitor, a second transistor coupled to the data line and a second liquid crystal capacitor, and a third transistor coupled to a common voltage and the second transistor. The first sub-pixel has a first ratio which is the width-to-length ratio of the third transistor divided by the width-to-length ratio of the second transistor. The second sub-pixel has a second ratio which is the width-to-length ratio of the third transistor divided by the width-to-length ratio of the second transistor. The second ratio is smaller than the first ratio.Type: GrantFiled: May 30, 2019Date of Patent: March 10, 2020Assignee: INNOLUX CORPORATIONInventors: Bo-Chin Tsuei, Yao-Lien Hsieh
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Publication number: 20190279582Abstract: A low color shift display panel includes a pixel array. The pixel array includes a first sub-pixel and a second sub-pixel. Each of the first sub-pixel and second sub-pixel respectively includes a data line, a gate line, a first transistor coupled to the data line and a first liquid crystal capacitor, a second transistor coupled to the data line and a second liquid crystal capacitor, and a third transistor coupled to a common voltage and the second transistor. The first sub-pixel has a first ratio which is the width-to-length ratio of the third transistor divided by the width-to-length ratio of the second transistor. The second sub-pixel has a second ratio which is the width-to-length ratio of the third transistor divided by the width-to-length ratio of the second transistor. The second ratio is smaller than the first ratio.Type: ApplicationFiled: May 30, 2019Publication date: September 12, 2019Inventors: Bo-Chin TSUEI, Yao-Lien HSIEH
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Publication number: 20190266945Abstract: A display device is disclosed, which includes: a substrate; a first pixel and a second pixel disposed on the substrate and arranged along a first direction; and a first data line and a second data line disposed on the substrate and arranged along a second direction different from the first direction, and the first and second pixels are disposed between the first and second data lines, wherein the first data line is electrically connected to the first pixel, the second data line is electrically connected to the second pixel, a first conductive portion of the first data line is electrically connected to a second conductive portion of the first data line through a first conductive via, and a first conductive portion of the second data line is electrically connected to a second conductive portion of the second data line through a second conductive via.Type: ApplicationFiled: January 29, 2019Publication date: August 29, 2019Inventors: Li-Jin WANG, Yao-Lien HSIEH
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Patent number: 10395607Abstract: A low color shift display panel includes a pixel array. The pixel array includes a first sub-pixel and a second sub-pixel. Each of the first sub-pixel and second sub-pixel respectively includes a data line, a gate line, a first transistor coupled to the data line and a first liquid crystal capacitor, a second transistor coupled to the data line and a second liquid crystal capacitor, and a third transistor coupled to a common voltage and the second transistor. The first sub-pixel has a first ratio which is the width-to-length ratio of the third transistor divided by the width-to-length ratio of the second transistor. The second sub-pixel has a second ratio which is the width-to-length ratio of the third transistor divided by the width-to-length ratio of the second transistor. The second ratio is smaller than the first ratio.Type: GrantFiled: July 15, 2015Date of Patent: August 27, 2019Assignee: INNOLUX CORPORATIONInventors: Bo-Chin Tsuei, Yao-Lien Hsieh
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Publication number: 20180341160Abstract: A display panel includes a pixel array with pixel cells and multiple data lines coupled to the pixel array. The multiple pixel cells include multiple first pixel cells and multiple second pixel cells. The multiple data lines include multiple first data lines and multiple second data lines. One of the multiple first data lines is coupled to the multiple first pixel cells in the pixel array. The multiple second data lines include a third data line and a fourth data line adjacent to the third data line. A part of the multiple second pixel cells coupled to the third data line and another part of the multiple second pixel cells coupled to the fourth data line are configured to display the same color.Type: ApplicationFiled: May 21, 2018Publication date: November 29, 2018Inventors: Yu-Jhou GONG, Yao-Lien HSIEH, Chung-Yi WANG, Li-Wei SUNG
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Patent number: 10043436Abstract: A display device including a first pixel, a second pixel, and a control unit is provided. The first and second pixels are coupled to a data line. The control unit generates a first original image signal and a second original image signal required by the first and second pixels in a frame time according to an analog image and generates a first output image signal and a second output image signal according to the difference between the first and second original image signals. In the frame time, the control unit sequentially provides the first and second output image signals to the first and second pixels via the data line.Type: GrantFiled: June 16, 2016Date of Patent: August 7, 2018Assignee: INNOLUX CORPORATIONInventors: Li-Jin Wang, Yao-Lien Hsieh, Chan-Feng Chiu, Chung-Yi Wang
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Patent number: 9875704Abstract: A liquid crystal display panel includes multiple pixel units each connected to a data line and a gate line. The pixel unit defines a first region and a second region. A first liquid crystal capacitor is disposed in the first region. A first transistor is disposed in the first region and is connected between the data line and the first liquid crystal capacitor, and has a control electrode connected to the gate line. A second liquid crystal capacitor is disposed in the second region. A second transistor is disposed in the second region and is connected between the data line and the second liquid crystal capacitor, and has a control electrode connected to the gate line. A third transistor is disposed in the second region and is connected between a common voltage and the second transistor and has a control electrode connected to the gate line.Type: GrantFiled: March 12, 2015Date of Patent: January 23, 2018Assignee: INNOLUX CORPORATIONInventors: Li-Wei Sung, Chung-Yi Wang, Yao-Lien Hsieh, Wei-Jung Chiu
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Patent number: 9823525Abstract: A display panel is provided. The display panel includes a first sub-pixel row including a plurality of sub-pixels electrically connecting to a scan line; and a second sub-pixel row including a plurality of sub-pixels, wherein the scan line overlaps with an area of the sub-pixels of the second sub-pixel row, and the scan line overlaps with an edge of a first sub-pixel of the sub-pixels of the first sub-pixel row, wherein the edge is adjacent to a driving transistor of the first sub-pixel.Type: GrantFiled: January 20, 2016Date of Patent: November 21, 2017Assignee: INNOLUX CORPORATIONInventors: Li-Wei Sung, Chung-Yi Wang, An-Chang Wang, Yao-Lien Hsieh
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Patent number: 9691792Abstract: A thin film transistor (TFT) substrate comprises a substrate, a plurality of pixel electrodes, a gate layer, an active layer, a first source layer and a second source layer, and a drain layer. The pixel electrodes are disposed on the substrate. The gate layer is disposed on the substrate. The active layer is disposed corresponding to the gate layer. The first source layer and the second source layer contact the active layer respectively. The drain layer contacts the active layer and is electrically coupled to one of the pixel electrodes. The gate layer, the active layer, the first source layer and the drain layer constitute a first transistor. The gate layer, the active layer, the second source layer and the drain layer constitute a second transistor. When the first and second transistors are disabled, the first and second source layers are electrically isolated from each other.Type: GrantFiled: January 7, 2016Date of Patent: June 27, 2017Assignee: INNOLUX CORPORATIONInventors: Chung-Yi Wang, Yao-Lien Hsieh
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Publication number: 20170076652Abstract: A display device including a first pixel, a second pixel, and a control unit is provided. The first and second pixels are coupled to a data line. The control unit generates a first original image signal and a second original image signal required by the first and second pixels in a frame time according to an analog image and generates a first output image signal and a second output image signal according to the difference between the first and second original image signals. In the frame time, the control unit sequentially provides the first and second output image signals to the first and second pixels via the data line.Type: ApplicationFiled: June 16, 2016Publication date: March 16, 2017Inventors: Li-Jin WANG, Yao-Lien HSIEH, Chan-Feng CHIU, Chung-Yi WANG
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Patent number: 9443882Abstract: A display panel comprising a fan-out structure located in a peripheral region is provided. The peripheral region has two border regions and a central region. The fan-out structure of the peripheral region comprises a plurality of first fan-out wires and a plurality of second fan-out wires alternatively arranged with the first fan-out wires. In the border regions, resistance of the first fan-out wire is lower than that of the adjacent second fan-out wire. In the central region, resistance of the first fan-out wire is higher than that of the adjacent second fan-out wire.Type: GrantFiled: March 2, 2015Date of Patent: September 13, 2016Assignee: INNOLUX CORPORATIONInventors: Yao-Lien Hsieh, Jen-Chih Lu, Neng-Hsien Wang, Ching-Lung Wu
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Publication number: 20160131949Abstract: A display panel is provided. The display panel includes a first sub-pixel row including a plurality of sub-pixels electrically connecting to a scan line; and a second sub-pixel row including a plurality of sub-pixels, wherein the scan line overlaps with an area of the sub-pixels of the second sub-pixel row, and the scan line overlaps with an edge of a first sub-pixel of the sub-pixels of the first sub-pixel row, wherein the edge is adjacent to a driving transistor of the first sub-pixel.Type: ApplicationFiled: January 20, 2016Publication date: May 12, 2016Inventors: Li-Wei SUNG, Chung-Yi WANG, An-Chang WANG, Yao-Lien HSIEH
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Publication number: 20160118413Abstract: A thin film transistor (TFT) substrate comprises a substrate, a plurality of pixel electrodes, a gate layer, an active layer, a first source layer and a second source layer, and a drain layer. The pixel electrodes are disposed on the substrate. The gate layer is disposed on the substrate. The active layer is disposed corresponding to the gate layer. The first source layer and the second source layer contact the active layer respectively. The drain layer contacts the active layer and is electrically coupled to one of the pixel electrodes. The gate layer, the active layer, the first source layer and the drain layer constitute a first transistor. The gate layer, the active layer, the second source layer and the drain layer constitute a second transistor. When the first and second transistors are disabled, the first and second source layers are electrically isolated from each other.Type: ApplicationFiled: January 7, 2016Publication date: April 28, 2016Inventors: Chung-Yi WANG, Yao-Lien HSIEH