Patents by Inventor Yao Ren

Yao Ren has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240091366
    Abstract: The present invention relates to the field of pharmaceutical and chemical engineering, and specifically relates to a weakly acidic microenvironment-sensitive aptamer for tumors, a triptolide conjugate. The conjugate is formed by conjugation between the 14-position hydroxyl group of triptolide and the aptamer via an acetal ester linking bond, which is an acid-sensitive linking bond with a cleavage condition of (pH=3.5-6.5), which is much less pH-sensitive and is more likely to cleave under the tumor microenvironment. Based on the characteristics of the aptamer targeting the highly expressed proteins on the membrane surface of tumor cells, the conjugate delivered triptolide targeted to tumor cells and mediated endocytosis to reach the lysosome; based on the characteristics of the acidic environment of lysosomes, the acetal ester linking bond released intact triptolide in the lysosomal acidic environment, targeting and killing of tumor cells.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 21, 2024
    Inventors: Jun LU, Yun DENG, Yao CHEN, Jirui YANG, Yi ZUO, Xiao LI, Qing REN
  • Publication number: 20240063717
    Abstract: A control circuit for adaptive noise margin control for a constant on time (COT) converter comprises an input reference terminal, amplifier, first switch device, voltage divider, trigger circuit, and output reference terminal. The amplifier has an input terminal coupled to the input reference terminal receiving a reference voltage signal. The first switch device has a control terminal coupled to an output of the amplifier, a first conduction terminal for receiving a voltage source signal, and a second conduction terminal. The voltage divider is coupled to the second conduction terminal and another input terminal of the amplifier. The trigger circuit, coupled to the voltage divider, is for triggering voltage change of a modified reference voltage signal selectively according to a high-side control signal of the COT converter. The output reference terminal coupled to the second conduction terminal outputs the modified reference voltage signal.
    Type: Application
    Filed: August 22, 2022
    Publication date: February 22, 2024
    Inventor: YAO-REN CHANG
  • Patent number: 11764678
    Abstract: A constant on time converter control circuit and a constant on time converter are provided. The constant on time converter control circuit comprises an error amplifier, a voltage to current converter, and an initial current source. The error amplifier is for receiving a reference voltage signal and a feedback voltage signal and outputting a compensated voltage signal. The voltage to current converter receives the compensated voltage signal and outputs a converted current signal. The initial current source provides an initial current signal. The initial current signal and the converted current signal form a new reference voltage signal. A constant on time OFF time comparator receives the new reference voltage signal and the feedback voltage signal and outputs a control signal. The control signal affects the turning on and turning off of electronic switches to produce an output voltage of a constant on time converter.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: September 19, 2023
    Assignee: ELITE SEMICONDUCTOR MICROELECTRONICS TECHNOLOGY INC.
    Inventor: Yao-Ren Chang
  • Publication number: 20230238886
    Abstract: A constant on time converter control circuit and a constant on time converter are provided. The constant on time converter control circuit comprises an error amplifier, a voltage to current converter, and an initial current source. The error amplifier is for receiving a reference voltage signal and a feedback voltage signal and outputting a compensated voltage signal. The voltage to current converter receives the compensated voltage signal and outputs a converted current signal. The initial current source provides an initial current signal. The initial current signal and the converted current signal form a new reference voltage signal. A constant on time OFF time comparator receives the new reference voltage signal and the feedback voltage signal and outputs a control signal. The control signal affects the turning on and turning off of electronic switches to produce an output voltage of a constant on time converter.
    Type: Application
    Filed: January 21, 2022
    Publication date: July 27, 2023
    Inventor: YAO-REN CHANG
  • Patent number: 11626868
    Abstract: A comparator circuit with dynamic biasing comprises a comparator, first dynamic biasing generator, first extra biasing device, second dynamic biasing generator, and second extra biasing device. The comparator includes a biasing circuit, input stage, active loads, and output terminal. The input stage has a first input terminal, second input terminal, first current path, and second current path. The comparator is configured to output an output signal at the output terminal according to the first input signal and second input signal. The first dynamic biasing generator is coupled between a first detection node and the first extra biasing device coupled to the biasing circuit. The second dynamic biasing generator is coupled between a second detection node and the second extra biasing device coupled to the biasing circuit. The first and second detection nodes are between the input stage and the active loads.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: April 11, 2023
    Assignee: ELITE SEMICONDUCTOR MICROELECTRONICS TECHNOLOGY INC.
    Inventor: Yao-Ren Chang
  • Publication number: 20220171515
    Abstract: A controller of a touch display device is configured to perform steps of: transmitting a main uplink signal to an input device, the main uplink signal indicating an amount of a plurality of downlink signals transmitted in a frame; transmitting a first sub-uplink signal to the input device, the first sub-uplink signal notifying the input device of a time length of a first downlink signal among the plurality of downlink signals; transmitting a second sub-uplink signal to the input device, the second sub-uplink signal notifying the input device of a time length of a second downlink signal among the plurality of downlink signals; and receiving the plurality of downlink signals from the input device.
    Type: Application
    Filed: February 16, 2022
    Publication date: June 2, 2022
    Applicant: NOVATEK Microelectronics Corp.
    Inventors: Yu-Chung Lin, He-Wei Huang, Chun-Ching Huang, Yao-Ren Fan
  • Patent number: 11277066
    Abstract: A control circuit is introduced for facilitating inrush current reduction for a voltage regulator providing an output voltage variable in response to an output voltage selection. The control circuit includes a soft-start circuit, a soft-start tracking circuit, and a controller. The soft-start circuit is utilized for providing a soft-start signal. The soft-start tracking circuit includes a first input terminal for receiving a feedback signal from the voltage regulator, a second input terminal coupled to the soft-start circuit, and an output terminal coupled to the soft-start circuit. The controller, coupled to the soft-start tracking circuit, is configured to output an enabling signal to the soft-start tracking circuit selectively in accordance with the output voltage selection. The soft-start tracking circuit is operable in response to the enabling signal so that the soft-start signal provided by the soft-start circuit substantially follows the feedback signal from the voltage regulator.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: March 15, 2022
    Assignee: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
    Inventor: Yao-Ren Chang
  • Publication number: 20210257902
    Abstract: A control circuit is introduced for facilitating inrush current reduction for a voltage regulator providing an output voltage variable in response to an output voltage selection. The control circuit includes a soft-start circuit, a soft-start tracking circuit, and a controller. The soft-start circuit is utilized for providing a soft-start signal. The soft-start tracking circuit includes a first input terminal for receiving a feedback signal from the voltage regulator, a second input terminal coupled to the soft-start circuit, and an output terminal coupled to the soft-start circuit. The controller, coupled to the soft-start tracking circuit, is configured to output an enabling signal to the soft-start tracking circuit selectively in accordance with the output voltage selection. The soft-start tracking circuit is operable in response to the enabling signal so that the soft-start signal provided by the soft-start circuit substantially follows the feedback signal from the voltage regulator.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 19, 2021
    Inventor: Yao-Ren Chang
  • Publication number: 20200379739
    Abstract: Processing external code includes: parsing the external code to identify a first semantic entity, mapping the first semantic entity to a second semantic entity, the first semantic entity comprising a first set of one or more specified attributes and the second semantic entity comprising a second set of one or more attributes that are capable of being specified, determining that a first attribute of the second set of one or more attributes does not have a corresponding specified attribute within the first set of one or more specified attributes, determining available information for specifying the first attribute of the second set of one or more attributes, and storing the second semantic entity in association with the first attribute of the second set of one or more attributes specified based on user selection or specifying the first attribute in response to available information provided to a user interface system.
    Type: Application
    Filed: May 31, 2019
    Publication date: December 3, 2020
    Inventors: Vivek Bhownani, Alexander C. Feinman, Fazil Peermohammed, David A. Foti, Ebrahim Mehran Mestchian, Yao Ren, Vijaya Raghavan, Peter S. Szpak, Matthew Englehart, Roy Mathew, Emmanuel Roy, Dekun Pei, Jianhao Du, Antoine Requet, Shailesh Shashikant Nirgudkar
  • Patent number: 10831456
    Abstract: Processing external code includes: parsing the external code to identify a first semantic entity, mapping the first semantic entity to a second semantic entity, the first semantic entity comprising a first set of one or more specified attributes and the second semantic entity comprising a second set of one or more attributes that are capable of being specified, determining that a first attribute of the second set of one or more attributes does not have a corresponding specified attribute within the first set of one or more specified attributes, determining available information for specifying the first attribute of the second set of one or more attributes, and storing the second semantic entity in association with the first attribute of the second set of one or more attributes specified based on user selection or specifying the first attribute in response to available information provided to a user interface system.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: November 10, 2020
    Assignee: The MathWorks, Inc.
    Inventors: Vivek Bhownani, Alexander C. Feinman, Fazil Peermohammed, David A. Foti, Ebrahim Mehran Mestchian, Yao Ren, Vijaya Raghavan, Peter S. Szpak, Matthew Englehart, Roy Mathew, Emmanuel Roy, Dekun Pei, Jianhao Du, Antoine Requet, Shailesh Shashikant Nirgudkar
  • Patent number: 10797597
    Abstract: The present application proposes a transient enhancing circuit for a constant-on-time converter. The constant-on-time converter includes an error amplifier and a comparator. The transient enhancing circuit includes a first sample-and-hold circuit and a zero-current detection circuit. The first sample-and-hold circuit has an input terminal and an output terminal. The input terminal of the first sample-and-hold circuit is coupled to an output terminal of the error amplifier, and the output terminal of the first sample-and-hold circuit is coupled to a first input terminal of the comparator. The zero-current detection circuit is coupled to the first sample-and-hold circuit and arranged for outputting a control signal when current flowing through a load of the constant-on-time converter is detected to be zero. The present application also proposes a constant-on-time converter using the transient enhancing circuit.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: October 6, 2020
    Assignee: ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
    Inventor: Yao-Ren Chang
  • Publication number: 20200042134
    Abstract: A controller and a touch display device are disclosed. The controller used in a touch display device is configured to perform: transmitting a first uplink signal to an input device in a time slot of a frame: and transmitting one or more second uplink signal in one or more time slots of the frame to cause the input device to transmit one or more downlink signals in response to each of the one or ore second uplink signals.
    Type: Application
    Filed: March 19, 2019
    Publication date: February 6, 2020
    Inventors: Yu-Chung LIN, He-Wei HUANG, Chun-Ching HUANG, Yao-Ren FAN
  • Patent number: 10360502
    Abstract: A computing device may include a memory to store data that describes a state machine model that includes destination states and source states. The source states may be associated with conditions upon which the state machine model is to transition from a corresponding source state to one of the destination states. The device may also include a processor configured to generate data to describe a state diagram from the data that describes the state machine model. The state diagram may include the graphical symbols and lines. Each of the graphical symbols may represent one of the source states or one of the destination states. The lines may represent transitions and include one or more vertical lines to represent transitions to one of the destination states from more than one of the source states. The graphical symbol may represent the one of the destination states is not adjacent to the graphical symbols to represent the more than one of the source states.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: July 23, 2019
    Assignee: The MathWorks, Inc.
    Inventors: Siddhartha Shankar, Srinath Avadhanula, Vijaya Raghavan, Ebrahim Mehran Mestchian, Yao Ren
  • Patent number: 9600241
    Abstract: A computer-readable memory device may include instructions to store data describing a state machine model including source states and destination states. The device may also include instructions to store, for each of the source states, a condition field identifying a condition upon which, when satisfied, the state machine model transitions from the source state to one of the destination states. The device may also include instructions to store, for each of source states, a destination field identifying the one of the destination states. Each of at least two of the source states may identify an identical destination state in the corresponding destination field. Each of at least two of the source states may identify an identical condition in the corresponding condition field.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: March 21, 2017
    Assignee: The MathWorks, Inc.
    Inventors: Siddhartha Shankar, Srinath Avadhanula, Vijaya Raghavan, Ebrahim Mehran Mestchian, Yao Ren
  • Patent number: 9582398
    Abstract: Exemplary embodiments enable debugging executable code using a debugger in a computational device that provides a programming environment including a presentation layer. For example, an exemplary method includes providing a first marshalling function that receives a portion of information manipulated by the executable code and produces a presentation layer representation of the portion of the information. The presentation layer representation is compatible with a debugger that debugs the executable code. An exemplary method also includes debugging the executable code to produce a presentation layer representation of the portion of the information with the first marshalling function so as to display the presentation layer representation of the portion of the information to a user via a display device. The debugging also includes modifying the presentation layer representation of the portion of the information to produce modified information for use by the executable code, a device, or a user.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: February 28, 2017
    Assignee: The MathWorks, Inc.
    Inventors: John Elliott, Frederick Mattsson Smith, Yao Ren
  • Patent number: 9478587
    Abstract: An array structure for light emitting diodes (LEDs) uses a patterned metal layer buried beneath LED chips to electrically interconnect non-adjacent chips in series, such that each chip in the LED array can be adjacently surrounded by LED chips of different colors. Thus, when the emission from the LED array is projected to a spot in the far field, its color uniformity over the spot is enhanced. Methods are also described for fabricating the multi-layer circuit board for such an array. Top and bottom patterned metal layers are formed, separated by a patterned insulating layer, so that electrical connections may be made between the metal layers. This provides “vias” between the metal layers for creating “cross-under” electrical connections under the second insulation layer, such that spatially-separated LED chips can be interconnected into strings, while maintaining electrical isolation between LED chips of different colors.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: October 25, 2016
    Assignee: DiCon Fiberoptics Inc.
    Inventors: Yao-Ren Liu, Ho-Shang Lee
  • Patent number: 8930909
    Abstract: Exemplary embodiments enable debugging executable code using a debugger in a computational device that provides a programming environment including a presentation layer. For example, an exemplary method includes providing a first marshalling function that receives a portion of information manipulated by the executable code and produces a presentation layer representation of the portion of the information. The presentation layer representation is compatible with a debugger that debugs the executable code. An exemplary method also includes debugging the executable code to produce a presentation layer representation of the portion of the information with the first marshalling function so as to display the presentation layer representation of the portion of the information to a user via a display device. The debugging also includes modifying the presentation layer representation of the portion of the information to produce modified information for use by the executable code, a device, or a user.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: January 6, 2015
    Assignee: The MathWorks, Inc.
    Inventors: John Elliott, Frederick Mattsson Smith, Yao Ren
  • Patent number: 8798971
    Abstract: A method of specifying a truth table includes generating a block diagram model, generating a statechart in the block diagram model, selecting a truth table graphical function in the statechart, and applying a set of graphical semantics for logic specification to the truth table graphical function combined with textual language predicates and actions.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: August 5, 2014
    Assignee: The MathWorks, Inc.
    Inventors: Robert O. Aberg, Vijaya Raghavan, Yao Ren
  • Patent number: 8762974
    Abstract: Methods, systems and computer program products are provided for creating and compiling source program code using one or more compiler directives a programming environment. The compiler directives may provide information on how to compile the source program code. The compiler directives may apply to the source program code under a given condition. The compiler directive may appear at the second or lower level of the source program code. The present invention may also provide a compiler that can determine the given condition of the source program code and apply the compiler directives based upon the determination of the given condition.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: June 24, 2014
    Assignee: The MathWorks, Inc.
    Inventors: Frederick Mattsson Smith, Alexander Jean-Claude Bottema, Yao Ren
  • Patent number: 8234630
    Abstract: The present invention provides a graphical model in a computing environment that enables a non-graphical entity to be a caller entity that executes a sequence of commands to call to a graphical or non-graphical entity that is a callee. The present invention also enables a graphical entity to be a caller to call a non-graphical entity as a callee. The present invention further allows graphical entities to have a variable number of input ports and output ports and provides the ability to use function overloading that is similar to function overloading provided in textual programming languages, such as C and C++. Further, the present invention allows the use of hyperlink between navigate between the caller and callee entities.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: July 31, 2012
    Assignee: The MathWorks, Inc.
    Inventors: Vijay Raghavan, Pieter J. Mosterman, Yao Ren