Abstract: The present disclosure discloses a neural network processing module, in which a mapping unit is configured to receive an input neuron and a weight, and then process the input neuron and/or the weight to obtain a processed input neuron and a processed weight; and an operation unit is configured to perform an artificial neural network operation on the processed input neuron and the processed weight. Examples of the present disclosure may reduce additional overhead of the device, reduce the amount of access, and improve efficiency of the neural network operation.

Abstract: The present disclosure provides an integrated circuit chip device and a related product. The integrated circuit chip device includes: a primary processing circuit and a plurality of basic processing circuits. The primary processing circuit or at least one of the plurality of basic processing circuits includes the compression mapping circuits configured to perform compression on each data of a neural network operation. The technical solution provided by the present disclosure has the advantages of a small amount of computations and low power consumption.

Abstract: A filtering antenna element and a dual-band filtering antenna array using filtering antenna elements for mutual coupling suppression have been disclosed. The filtering antenna element comprises a feeding element, a sub-substrate, a sup-substrate and an air gap between the sub-substrate and the sup-substrate. A stacked patch is fabricated on a top surface of the sub-substrate, a driven patch and a ground plane are fabricated on a top surface and a bottom surface of the sub-substrate. An asymmetric E-slot is arranged on the driven patch and a shorting pin is inserted into the sub-substrate for generating radiation nulls in stopbands. The dual-band filtering antenna array is compact and needs no feeding network with an isolation of 35 dB, and is suitable for potential base station applications.

Abstract: A convolution operation method and a processing device for performing the same are provided. The method is performed by a processing device. The processing device includes a main processing circuit and a plurality of basic processing circuits. The basic processing circuits are configured to perform convolution operation in parallel. The technical solutions disclosed by the present disclosure can provide short operation time and low energy consumption.

Abstract: A matrix-multiplying-matrix operation method and a processing device for performing the same are provided. The matrix-multiplying-matrix method includes distributing, by a main processing circuit, basic data blocks of one matrix and broadcasting the other matrix to a plurality of the basic processing circuits. That way, the basic processing circuits can perform inner-product operations between the basic data blocks and the broadcasted matrix in parallel. The results are then provided back to main processing circuit for combining. The technical solutions proposed by the present disclosure provide short operation time and low energy consumption.

Abstract: A convolution operation method and a processing device for performing the same are provided. The method is performed by a processing device. The processing device includes a main processing circuit and a plurality of basic processing circuits. The basic processing circuits are configured to perform convolution operation in parallel. The technical solutions disclosed by the present disclosure can provide short operation time and low energy consumption.

Abstract: A matrix-multiplying-vector operation method and a processing device for performing the same are provided. The matrix-multiplying-vector method includes distributing, by a main processing circuit, basic data blocks of the matrix and broadcasting the vector to a plurality of the basic processing circuits. That way, the basic processing circuits can perform inner-product operations between the basic data blocks and the broadcasted vector in parallel. The results are then provided back to main processing circuit for combining. The technical solutions proposed by the present disclosure provide short operation time and low energy consumption.

Abstract: A pooling operation method and a processing device for performing the same are provided. The pooling operation method may rearrange a dimension order of the input data before pooling is performed. The technical solutions provided by the present disclosure have the advantages of short operation time and low energy consumption.

Abstract: A fully connected operation method and a processing device for performing the same are provided. The fully connected operation method designates distribution data and broadcast data. The distribution data is divided into basic data blocks and distributed to parallel processing units, and the broadcast data is broadcasted to the parallel processing units. Operations between the basic data blocks and the broadcasted data are carried out by the parallel processing units before the results are returned to a main unit for further processing. The technical solutions disclosed by the present disclosure provide short Operation time and low energy consumption.

Abstract: A method for log analysis includes receiving log outputs from an application and generating a log file by recording the log outputs in the log file and, for each log output in the log file, attaching a log context record to the log output. The log context record is encoded with a call stack having stack frames and one or more variables in the stack frames. The method further includes grouping the log outputs in the log file based on their log context records.

Abstract: An adaptive virtual desktop architecture is provided. Application install or assignment is evaluated, such as by using heuristics to identify applications that may present compatibility problems. Upon determining that a newly installed application may have compatibility problems when associated with a non-persistent virtual desktop, a promotion to a persistent virtual desktop occurs.

Abstract: Embodiments herein relate to chemical sensors, devices and systems including the same, and related methods. In an embodiment, a medical device is included. The medical device can include a graphene varactor. The graphene varactor can include a graphene layer and a self-assembled monolayer disposed on an outer surface of the graphene layer through ?-? stacking interactions. The self-assembled monolayer can provide a Langmuir theta value of at least 0.9. The self-assembled monolayer can include polycyclic aromatic hydrocarbons, tetraphenylporphyrins or derivatives thereof, metallotetraphenylporphyrins, or aromatic cyclodextrins. Other embodiments are also included herein.

Abstract: A low-profile dual-band filtering patch antenna and its application to LTE MIMO system are disclosed. By using two embedded U-shaped radiating patches and a multi-stub microstrip feed-line, two operating bands and four radiation nulls can been generated and individually controlled, the design is thus very simple and flexible. Based on the proposed low-profile dual-band filtering patch antenna, a MIMO antenna with a very low profile, low mutual coupling and low ECCs has been presented.

Abstract: A cushioning apparatus includes a substrate, a first folding plate extending from the substrate, a second folding plate extending from the substrate, an annular wall, a first clamping portion, and a second clamping portion. The substrate has a first surface and a second surface opposite to each other and has an accommodation space concave towards the second surface from the first surface. The annular wall is disposed around the accommodation space. The first clamping portion is disposed on the first folding plate and is located on a same side as the second surface. The second clamping portion is disposed on the second folding plate and is located on a same side as the second surface. When the first folding plate and the second folding plate are both folded towards the second surface, the first clamping portion and the second clamping portion are clamped with each other.

Abstract: An adaptive virtual desktop architecture is provided. Application install or assignment is evaluated, such as by using heuristics to identify applications that may present compatibility problems. Upon determining that a newly installed application may have compatibility problems when associated with a non-persistent virtual desktop, a promotion to a persistent virtual desktop occurs.

Abstract: The present invention discloses a circulating magnetoelectric-induction reaction system and application thereof. The system comprises an alternating induction voltage unit, an alternating induction magnetic field unit, a low-frequency power supply, and a feed liquid container. The alternating induction voltage unit is mainly composed of a closed iron core, a primary coil, a secondary coil, and an induction voltage cavity. The alternating induction magnetic field unit is mainly composed of a C-shaped iron core, a primary coil, and a magnetic field cavity. The low-frequency power supply is connected to the primary coils in the alternating induction voltage unit and the alternating induction magnetic field unit and provides excitation voltage for the primary coils. The secondary coil comprises an insulating pipeline, which serves as a feed liquid circulating pipeline, and has both ends exposed out of the induction voltage cavity, with one end as a feed inlet and the other as a discharge outlet.

Abstract: A gradient copolymer comprises or consists of n polymer components. The n polymer components each independently represents an addition polymer of a monomer of the formula (I), and/or a mixture thereof, or the n polymer components each independently comprises or consists essential of one or more structural units represented by the formula (I-1), The symbol n represents an integer within the closed interval [5, ?]. The average side chain carbon number of the i-th polymer component as determined according to the nuclear magnetic resonance method is expressed as Xi, with the symbol i representing an arbitrary integer from 1 to n, the relationship X1<X2< . . . <Xn?1<Xn holds.

Abstract: A multi-index detection microfluidic chip is provided. A bottom plate (1) and a cover plate (2) that matches the bottom plate (1) and seals it are provided in the microfluidic chip. The center of the microfluidic chip has a through-hole (3). The bottom plate (1) has one or more wave-shaped main channel(s) (4), one end of each of the main channel (4) connected to a sample injection hole (9) on the bottom plate (1), and the other end connected to an exhaust hole (10) on the bottom plate (1). The valley on the main channel (1) is distal to the through-hole (3), and the peak is proximal to the through-hole (3). Each valley of the main channel (1) is connected to a reaction chamber (6) by a linking channel (5). The linking channel (5) comprises one or more buffering chambers (7). The microfluidic chip can be used in detection by fluorescence, turbidity, color, detection equipment, and/or direct observation by the naked eyes. The detection is real-time as the reaction occurs or after the reaction.

Abstract: Systems and methods for solid-state storage drive-level failure prediction and health metric are described. A plurality of host-write commands are received at a solid-state storage device. A number of drive-writes per day based on the on the plurality of host-write commands is determined. An aggregated amount of degradation to one or more internal non-volatile memory components based on the number of drive-writes per day is determined. Using a machine-learned model, a probability of failure value based on a set of parameter data and the aggregated amount of degradation to the non-volatile memory component is generated. An alert is generated, based on the probability of failure value or degradation threshold.

Abstract: A processing device and related products are disclosed. The processing device includes a main unit and a plurality of basic units in communication with the main unit. The main unit is configured to perform a first set of operations in a neural network in series, and transmit data to the plurality of basic units. The plurality of basic units are configured to receive the data transmitted from the main unit, perform a second set of operations in the neural network in parallel based on the data received from the main unit, and return operation results to the main unit.