Abstract: An image sensor array and circuit design and method employing a voltage and current detection circuit capable of quantifying a power signal, grounding signal, internal reference voltage and internal reference current. An image sensor comprising the invented circuit design may be incorporated within a digital camera.

Abstract: The present invention discloses an image sensor, an image readout method, and an electronic device. The image sensor comprises: a pixel array and a plurality of readout conversion circuits, the readout conversion circuit comprises: a comparison circuit for comparing an output signal of the column pixel with a ramp signal to obtain a first output signal and a second output signal; a selection module for selecting the first output signal during a first sampling count, and selecting the second output signal during a second sampling count; a counter for counting according to the first output signal and the second output signal to obtain total quantization value of the first sampling count and the second sampling count, so as to obtain actual signal quantization result according to the total quantization value. The image readout speed of the image sensor is improved.

Abstract: The present disclosure relates to an imaging device, a pixel and a method thereof The imaging device comprises: a pixel array, which comprises multiple pixels arranged in rows and columns, wherein at least one pixel comprises multiple subpixels, and the multiple subpixels share one floating diffusion region; and a control circuit, which controls the pixel array; wherein the control circuit reads the multiple subpixels one by one under the rolling shutter state, and reads the multiple subpixels simultaneously under the global shutter state.

Abstract: This application belongs to the technical field of semiconductor devices, and relates to a pixel circuit, a control method, and an image sensor, including: at least two pixel units arranged in an array, wherein transmission transistors of at least two pixels of at least one pixel unit are connected to a corresponding first group of transmission control lines, and a transmission transistor of one other pixel is connected to a corresponding second group of transmission control lines. Therefore, the pixel circuit, the control method and the image sensor provided in the present application can control the density of phase focus of the image sensor by controlling the first group of transmission control lines and the second group of transmission control lines without changing the structure of the pixel, the structure is simple, and the optical performance is good.

Abstract: This application belongs to the technical field of semiconductor devices, and relates to a pixel circuit, a control method, and an image sensor, including: at least two pixel units arranged in an array, wherein transmission transistors of two pixels of at least one pixel unit are connected to a corresponding first group of transmission control lines, and transmission transistors of other pixel unit are connected to a corresponding second group of transmission control lines. Therefore, the pixel circuit, the control method and the image sensor provided in the present application can control the density of phase focus of the image sensor by controlling the first group of transmission control lines and the second group of transmission control lines without changing the structure of the pixel, the structure is simple, and the optical performance is good.

Abstract: The present invention discloses an image sensor, an image readout method, and an electronic device. The image sensor comprises: a pixel array and a plurality of readout conversion circuits, the readout conversion circuit comprises: a comparison circuit for comparing an output signal of the column pixel with a ramp signal to obtain a first output signal and a second output signal; a selection module for selecting the first output signal during a first sampling count, and selecting the second output signal during a second sampling count; a counter for counting according to the first output signal and the second output signal to obtain total quantization value of the first sampling count and the second sampling count, so as to obtain actual signal quantization result according to the total quantization value. The image readout speed of the image sensor is improved.

Abstract: Disclosed are a pixel unit, and an imaging method and apparatus thereof. The pixel has a first and a second pixel sub-portion each comprising one or more photodiodes; one or more transfer transistors each coupled to a floating diffusion, for transferring the charges generated by the one or more photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period respectively to the floating diffusion; a reset transistor; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signal of the floating diffusion. In some embodiments, the pixel further includes a capacitor and a gain control transistor.

Abstract: An image sensor pixel noise suppression circuit having a source follower transistor based pixel circuit, a power supply voltage and noise mirror circuit, a power supply voltage and noise gain circuit, and a comparator circuit. An output of the comparator circuit provides an image related output signal wherein the noise component of the source follower signal has been suppressed. The invention further includes a CMOS image sensor containing the image sensor pixel noise suppression circuit.

Abstract: An image sensor array and circuit design employs a method of black level compensation to address vertical image shading related to global exposure image capture and rolling row by row readout schemes. An image sensor having the invented black level compensation pixel array and method may be incorporated within a digital camera.

Abstract: An image sensor array and circuit design employs a method of black level compensation to address vertical image shading related to global exposure image capture and rolling row by row readout schemes. An image sensor having the invented black level compensation pixel array and method may be incorporated within a digital camera.

Abstract: Disclosed are a pixel unit, and an imaging method and apparatus thereof. The pixel comprises a first and a second pixel sub-portion each comprising one or more photodiodes; one or more transfer transistors each coupled to a floating diffusion, for transferring the charges generated by the one or more photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period respectively to the floating diffusion; a reset transistor; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signal of the floating diffusion. In some embodiments, the pixel further includes a capacitor and a gain control transistor.

Abstract: Disclosed are a pixel unit, and an imaging method and apparatus thereof. The pixel has a first and a second pixel sub-portion each comprising one or more photodiodes; one or more transfer transistors each coupled to a floating diffusion, for transferring the charges generated by the one or more photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period respectively to the floating diffusion; a reset transistor; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signal of the floating diffusion. In some embodiments, the pixel further includes a capacitor and a gain control transistor.

Abstract: An image sensor pixel noise suppression circuit having a source follower transistor based pixel circuit, a power supply voltage and noise mirror circuit, a power supply voltage and noise gain circuit, and a comparator circuit. An output of the comparator circuit provides an image related output signal wherein the noise component of the source follower signal has been suppressed. The invention further includes a CMOS image sensor containing the image sensor pixel noise suppression circuit.

Abstract: A pixel cell and row select and row driver circuits include two column bias circuits and row driver circuits, one placed at the right and one placed at the left side of the array of pixel cells. The digital control signals for the two sets of bias and row driver circuits enter at the center top or bottom of the array of pixel cells and drive the circuits symmetrically. The combination of two-sided row driver and column bias helps eliminate any signal delay and bias difference between the left and right side of the pixel cell array. More significantly this circuit construction can minimize horizontal shading in the resulting image.

Abstract: An improved DNA sequencing system comprising a DNA sample holder residing on a stacked BSI global shutter image sensor illuminated by a pulsed laser for fluorescent illumination detection. The pulsed laser has on and off periods wherein during the laser on period a Fluorophore tag attached to a DNA sample is excited to produce fluorescence emission while the imaging system captures no illumination and during the off period the global shutter imaging system captures persistent fluorescent emission from the DNA sample and reads out an imaging signal.

Abstract: An imaging sensor having a pixel array with a separate analog-to-digital conversion (ADC) circuit coupled on an input side to each column line and on an output side to a separate M-bit wide digital memory circuit and a column data readout circuit comprising N M-bit data shifters. Each M-bit data shifter has an M-bit wide output, and single pole double throw (SPDT) switches whose common terminals provide inputs to the M-bit data shifters, wherein a first switch state of the SPDT switches connects the input of their associated M-bit data shifters to their associated M-bit wide digital memory circuits and wherein a second switch state of the SPDT switches connects the input of their associated M-bit data shifters to an M-bit wide output bus from an adjacent M-bit data shifter.

Abstract: A pixel cell and row select and row driver circuits include two column bias circuits and row driver circuits, one placed at the right and one placed at the left side of the array of pixel cells. The digital control signals for the two sets of bias and row driver circuits enter at the center top or bottom of the array of pixel cells and drive the circuits symmetrically. The combination of two-sided row driver and column bias helps eliminate any signal delay and bias difference between the left and right side of the pixel cell array. More significantly this circuit construction can minimize horizontal shading in the resulting image.

Abstract: A pixel cell and readout circuit includes an anti-eclipse voltage clamp circuit at both the top and bottom of each column line of an array of the pixel cells. The anti-eclipse voltage clamp circuits form a row with each column in the array coupled to an anti-eclipse voltage clamp circuit. The combination of two rows of anti-eclipse voltage clamp circuits helps settle the clamp voltage more rapidly and to compensate for the increased length of the anti-eclipse voltage circuit row as well as the column line resistance due to narrow metal lines and increased numbers of pixels as well as the requirement to operate a sensor at a higher frame rate. More significantly this circuit construction can minimize vertical shading in the resulting image.

Abstract: An improved DNA sequencing system comprising a DNA sample holder residing on a stacked BSI global shutter image sensor illuminated by a pulsed laser for fluorescent illumination detection. The pulsed laser has on and off periods wherein during the laser on period a Fluorophore tag attached to a DNA sample is excited to produce fluorescence emission while the imaging system captures no illumination and during the off period the global shutter imaging system captures persistent fluorescent emission from the DNA sample and reads out an imaging signal.

Abstract: A pixel cell has a large and small photodiode, transfer transistors, a reset transistor, a dynamic range enhancement capacitor, a capacitor control transistor, a storage capacitor, a storage capacitor control transistor, an amplifier transistor in a source follower configuration and a rolling shutter row select transistor and a readout circuit block. The small and large photodiodes are exposed simultaneously, the large photodiode having a constant exposure while the small photodiode has a chopped exposure and charge transfer to a storage capacitor.