Abstract: A pixel cell has a large and small photodiode, transfer transistors, a reset transistor, a dynamic range enhancement capacitor, a capacitor control transistor, a storage capacitor, a storage capacitor control transistor, an amplifier transistor in a source follower configuration and a rolling shutter row select transistor and a readout circuit block. The small and large photodiodes are exposed simultaneously, the large photodiode having a constant exposure while the small photodiode has a chopped exposure and charge transfer to a storage capacitor.

Abstract: An image sensor has a pixel cell array comprising clusters of pixel cell blocks each block having four pixel cells under the same microlens and filter wherein during readout electrical signals from two pixels positioned along a first diagonal are binned followed by binning the signals from two pixels positioned along the remaining second reverse diagonal in order to reduce spatial color artifacts associated with orthogonal binning schemes and minimize gaps or irregular spacing between optical centers within an image read out from the array of pixel cells.

Abstract: Disclosed are a pixel unit, an apparatus thereof, and a method thereof. The pixel unit comprises a first and a second transfer transistors with different photosensitive areas coupled to a floating diffusion and transfer the charges generated by a first and a second photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period thereto; a capacitor with a first end coupled to a specified voltage; a gain control transistor coupled between the second end of the capacitor and the floating diffusion for imposing an isolation control therebetween; a reset transistor coupled to the second end of the capacitor and the gain control transistor for resetting the level of the coupling point therebetween via a reset control signal; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signals.

Abstract: Disclosed are a pixel unit, and an imaging method and apparatus thereof. The pixel comprises a first and a second pixel sub-portion each comprising one or more photodiodes; one or more transfer transistors each coupled to a floating diffusion, for transferring the charges generated by the one or more photodiodes in response to incident light during an exposure period and accumulated in the photodiode during said exposure period respectively to the floating diffusion; a reset transistor; and a source follower transistor coupled to the floating diffusion for amplifying and outputting the pixel signal of the floating diffusion. In some embodiments, the pixel further includes a capacitor and a gain control transistor.

Abstract: An image sensor has global shutter imaging pixel cells, each including an anti-blooming transistor gate for modifying electric charge within a photodiode and for setting the photodiode to a selected potential. The sensor also has a row decoder circuit providing readout signals to each row of the imaging cells during both a readout interval and during a calibration interval for each row and providing to the anti-blooming transistor drain a selectable potential supply voltage. A mode select switch within the row decoder circuit applies either a standard drain supply voltage or an adjustable low voltage to the anti-blooming transistor drain. A programmable function logic circuit determines the timing of operation of the mode select switch to provide knee-point calibration to minimize photo conversion variations that lead to fixed pattern noise.

Abstract: An image sensor has a stacked pixel arrangement including both rolling and global shutter readout circuits wherein each pixel includes an adjustable transfer transistor gate voltage level for modifying electric charge within a photodiode during exposure depending on incident light intensity. The sensor also has a row decoder circuit providing readout signals to each row of the imaging cells during both a readout interval and during a calibration interval for each row. The row decoder may employ one of several of its features to provide a self-knee point calibration following an image signal readout in order to minimize photo conversion variations that lead to fixed pattern noise and to enhance dynamic range.

Abstract: The present disclosure relates to an imaging device, a pixel and a method thereof. The imaging device comprises: a pixel array, which comprises multiple pixels arranged in rows and columns, wherein at least one pixel comprises multiple subpixels, and the multiple subpixels share one floating diffusion region; and a control circuit, which controls the pixel array; wherein the control circuit reads the multiple subpixels one by one under the rolling shutter state, and reads the multiple subpixels simultaneously under the global shutter state.

Abstract: A pixel cell has four maskless phase detection photodiodes sharing the same readout amplifier, microlens and filter color. The four photodiodes are configured to operate in two adjacent pairs wherein the two adjacent pairs of photodiodes are separated by a light guide and are positioned under the single microlens such that light incident in a first direction is collected in a first pair of photodiodes of the two adjacent pairs of photodiodes and light incident in a second direction is collected in a second pair of photodiodes of the two adjacent pairs of photodiodes. The microlens has a plano-convex shape which causes light to be incident in two directions on photodiodes positioned under each of two sides of the microlens.

Abstract: A pixel cell has a photodiode, a transfer transistor, a reset transistor, a dynamic range enhancement capacitor, a capacitor control transistor, an amplifier transistor in a source follower configuration and a rolling shutter row select transistor and a readout circuit block. The photodiode, a transfer transistor, a reset transistor, dynamic range enhancement capacitor, capacitor control transistor, amplifier transistor and rolling shutter row select transistor are disposed within a first substrate of a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. The readout circuit block may be partially disposed within a second substrate of a second semiconductor chip and partially disposed within the first substrate wherein the readout circuit block comprises optionally selectable rolling shutter and global shutter readout modes through the use of computer programmable digital register settings.

Abstract: A pixel cell has a photodiode, a transfer transistor, a reset transistor, a dynamic range enhancement capacitor, a capacitor control transistor, an amplifier transistor in a source follower configuration and a rolling shutter row select transistor and a readout circuit block. The photodiode, a transfer transistor, a reset transistor, dynamic range enhancement capacitor, capacitor control transistor, amplifier transistor and rolling shutter row select transistor are disposed within a first substrate of a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. The readout circuit block may be partially disposed within a second substrate of a second semiconductor chip and partially disposed within the first substrate wherein the readout circuit block comprises optionally selectable rolling shutter and global shutter readout modes through the use of computer programmable digital register settings.

Abstract: A pixel cell has a photodiode, a transfer transistor, a reset transistor, an amplifier transistor in a source follower configuration, and a readout circuit block. The photodiode, transfer transistor, reset transistor and source follower amplifier are disposed within a first substrate of a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. The readout circuit block may be partially disposed within a second substrate of a second semiconductor chip and partially disposed within the first substrate wherein the readout circuit block comprises optionally selectable rolling shutter and global shutter readout modes through the use of computer programmable digital register settings. The global shutter readout mode provides in-pixel correlated double sampling.

Abstract: A pixel cell has a photodiode, a transfer transistor, and a readout circuit block. The photodiode, transfer transistor, and reset transistor are disposed within a first substrate of a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. The readout circuit block is disposed within a second substrate of a second semiconductor chip and the readout circuit block comprises optionally selectable rolling shutter and global shutter readout modes through the use of computer programmable digital register settings. The global shutter readout mode provides in-pixel correlated double sampling.

Abstract: An imaging system with a pixel cell has a photodiode, a transfer transistor, a reset transistor, an amplifier transistor in a source follower configuration, and a readout circuit block. The photodiode, transfer transistor, reset transistor and source follower amplifier are part of an array disposed within a first substrate of a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. The readout circuit block may be partially disposed within a second substrate of a second semiconductor chip and partially disposed within the first substrate wherein the readout circuit block comprises optionally selectable rolling shutter and global shutter readout modes through the use of computer programmable digital register settings. The global shutter readout mode provides in-pixel correlated double sampling.

Abstract: A pixel cell has a photodiode, a transfer transistor, a reset transistor, an amplifier transistor in a common source configuration and a readout circuit block. The photodiode, transfer transistor, reset transistor and common source amplifier are disposed within a first substrate of a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. The readout circuit block may be partially disposed within a second substrate of a second semiconductor chip and partially disposed within the first substrate wherein the readout circuit block comprises optionally selectable rolling shutter and global shutter readout modes through the use of computer programmable digital register settings. The global shutter readout mode provides in-pixel correlated double sampling.

Abstract: A method of reading out a pixel includes photogenerating charge carriers during a single integration time in photodetectors of each one of a plurality of sub-pixels included in the pixel. Each one of the plurality of sub-pixels of the pixel has a same color filter. A floating diffusion node of the pixel is reset. The floating diffusion node is sampled to generate a reset output sample signal. Charge carriers that were photogenerated in a first portion of the plurality of sub-pixels are transferred to the floating diffusion node. The floating diffusion node is sampled to generate a first output sample signal. Charge carriers that were photogenerated in a second portion of the plurality of sub-pixels are transferred to the floating diffusion node. The floating diffusion node is sampled to generate a second output sample signal.

Abstract: A method of reading out a pixel includes photogenerating charge carriers during a single integration time in photodetectors of each one of a plurality of sub-pixels included in the pixel. Each one of the plurality of sub-pixels of the pixel has a same color filter. A floating diffusion node of the pixel is reset. The floating diffusion node is sampled to generate a reset output sample signal. Charge carriers that were photogenerated in a first portion of the plurality of sub-pixels are transferred to the floating diffusion node. The floating diffusion node is sampled to generate a first output sample signal. Charge carriers that were photogenerated in a second portion of the plurality of sub-pixels are transferred to the floating diffusion node. The floating diffusion node is sampled to generate a second output sample signal.

Abstract: A system, method and apparatus implementing a multiple-row concurrent readout scheme for high-speed CMOS image sensor with backside illumination are described herein. In one embodiment, the method of operating an image sensor starts acquiring image data within a color pixel array and the image data from a first set of multiple rows in the color pixel array is then concurrently readout. Concurrently reading out the image data from the first set of multiple rows includes concurrently selecting a first portion of the image data from the first set by first readout circuitry and a second portion of the image data from the first set by second readout circuitry. The first and second portions of the image data from the first set are different and the first and second readout circuitries are also different. Other embodiments are also described.

Abstract: An image sensor includes a plurality of pixel cells organized into rows and columns of a pixel array. A bit line is coupled to each of the pixel cells within a line of the pixel array. Readout circuitry is coupled to the bit line to readout the image data from the pixel cells within the line. The readout circuitry includes a line amplifier coupled to the bit line to amplify the image data and first and second sample and convert circuits coupled in parallel to an output of the line amplifier to reciprocally and contemporaneously sample the image data and convert the image data from analog values to digital values.

Abstract: A method of one aspect includes reading a reset level of an active pixel, and concurrently, reading a reset level of a reference pixel. The method also includes reading an image signal level of the active pixel, and concurrently, reading an image signal level of the reference pixel. A reduced noise image signal level of the active pixel is generated based on the reset levels and the image signal levels of the active and reference pixels. Other methods are disclosed as well as apparatus and systems.

Abstract: A method of implementing high dynamic range bin algorithm in an image sensor including a pixel array with a first super row having a first integration time and a second super row having a second integration time is described. The method starts by reading out image data from the first super row into a counter. Image data from the first super row is multiplied by a factor to obtain multiplied data. The factor is a ratio between the first and the second integration times. The multiplied data is then compared with a predetermined data. The image data from the second super row is readout into the counter. If the multiplied data is larger than the predetermined data, the multiplied data from the first super row is stored in the counter. If not, the image data from the second super row is stored. Other embodiments are also described.