Abstract: A boost converter circuit that includes a power supply, an inductor coupled to the power supply to receive current from the power supply, a diode coupled to receive current from the inductor and coupled to provide current to a load as an output, an inductor switch coupled to a node between the inductor and the diode for selectively switching current from the inductor anyway from the diode, and a ramp circuit. The ramp circuit is coupled to the node between the inductor and the diode, and is configured to selectively sample a voltage at the node between the inductor and the diode via a sampling switch and use the sampled signal to produce a stabilization ramp to stabilize the output.

Abstract: A sink circuit for protecting connectivity of a digital multimedia interface, the sink circuit is connected in a sink multimedia device. The sink circuit comprises a sink port configured to provide a connection to a source multimedia device; a termination coupled to the sink port; and a protection component coupled in series between the termination and a power source of the sink multimedia device, the protection component blocks any direct current path through the sink port when the sink multimedia device is off and the power source of the source multimedia device is on.

Abstract: An apparatus for enabling simultaneous multimedia content streaming and power charging of handheld devices, comprises a universal connector installed in a first device and enables connectivity of at least one multimedia display interface and at least one data interface with a second device, the first device is connected to the second device using a charging-streaming cable having, at one end, a first connector compliant with the universal connector, and at the other end, a second connector compliant with a multimedia display interface and a third connector compliant with a data interface of the second device, wherein streaming of the multimedia content is from the universal connector in the first device to the second connector in the second device and power charging of the first device is through the third connector of the second device; and a detector for determining a type of the multimedia display interface of the second device.

Abstract: A multimedia interface cable for achieving complete interoperability between different types of multimedia display interfaces. The cable comprises a first multimedia connector including a plurality of contact pins of at least high-speed multimedia signals and control signals; a second multimedia connector including a plurality of contact pins of least high-speed multimedia signals and control signals; a plurality of un-crossing conducting wires for coupling the plurality of contact pins of the high-speed multimedia signals in the first multimedia connector to the plurality of contact pins of the high-speed multimedia signals in the second multimedia connector; and a plurality of conducting wires for coupling the plurality of contact pins of the control signals in the first multimedia connector to the plurality of contact pins of the control signals in the second multimedia connector.

Abstract: A triple-mode connectivity apparatus for enabling interoperability between a multimedia display interface and a data interface. The apparatus comprises a universal connector installed in a first device and structured to enable connectivity between the multimedia display interface and the data interface of a second device, the first device is connected to the second device using a cable having a first connector compliant with the universal connector and a second connecter compliant with the data interface of the second device; a physical layer interface for processing signals compliant with the multimedia display interface and the data interface; and a detector for detecting an interface type of the second device and setting the apparatus to process signals according to the determined interface type.

Abstract: A circuit for switching between an AC-coupled connectivity and DC-coupled connectivity of a multimedia interface. The circuit comprises a current source connected in series to a wire of the multimedia interface and a coupling capacitor; and a termination resistor connected to the current source and to the coupling capacitor, wherein the circuit is connected in series between a source line driver and a sink line receiver of the multimedia interface, wherein the source line driver supports both the AC-coupled connectivity and the DC-coupled connectivity and the sink line receiver supports any one of the AC-coupled connectivity and the DC-coupled connectivity, wherein the current source and the termination resistor allows the setting of voltage levels of signals received at the sink line receiver to voltage levels defined by the multimedia interface thereby to switch to the coupling connectivity type required by the multimedia interface at which the sink line receiver operates.

Abstract: A method for compensating for gain changes of an N-level pulse amplitude modulation (PAM-N) modulated signal. The method comprises comparing the PAM-N modulated signal to N?1 configurable thresholds, wherein the input PAM-N modulated signal is also equalized and the N?1 configurable thresholds are N?1 different voltage levels; tracking gain changes in the input PAM-N modulated signal by comparing the input PAM-N modulated signal to a compensation threshold; and adjusting a level of the at least one of the N?1 configurable thresholds of the N?1 comparators based on an output of the compensation comparator, thereby offsetting a crossing point of the at least one comparator respective of the at least one of the N?1 configurable thresholds to compensate for gain changes in the input PAM-N modulated signal.

Abstract: A decision feedback equalizer (DFE) for equalizing PAM-N signals comprises a coefficient setting unit for setting a first group of most significant feedback coefficients of the DFE to a predefined value selected from a group of predefined values; a coefficients computation unit coupled to the coefficient setting unit for computing values of feedback coefficients of a second group of feedback coefficients other than the first group of most significant feedback coefficients; a feedback (FB) unit for mitigating, using a complete group of feedback coefficients, effects of interference from data symbols that are adjacent in time to an input data symbol, wherein most significant feedback coefficients of the first group are set to an optimal value computed during an initialization of the DFE and feedback coefficients of the second group are computed by the coefficients computation unit.

Abstract: An interface circuit for enabling clock and data recovery (CDR) of N-level pulse amplitude modulation (N-PAM) modulated data streams using a 2-PAM CDR circuit. The circuit comprises a number of N?1 comparators for comparing an input data stream to N?1 configurable thresholds, the input data stream is N-PAM modulated and the N?1 configurable thresholds are N?1 different voltage levels; a number of N?1 of edge detectors respectively connected to the N?1 comparators for detecting transitions from one logic value to another logic value, N is a discrete number greater than two; and a determination unit for determining if the detected transitions is any one of a major transition and a minor transition and asserting a transition signal if only a major transition or a minor transition has occurred, the transition signal is fed into a 2-PAM CDR circuit and utilized for recovering a clock signal of the input data stream.

Abstract: A PAM-N decision feedback equalizer (DFE) comprises a coefficient computation unit; a feedback unit that mitigates, using computed feedback coefficients, effects of interference from data symbols; an error-and-decision unit for at least computing a least error value respective to one of a plurality of decision levels, wherein the least error value indicates a difference of a pseudo equalized input PAM-N data symbol from an optimal position of the one of the plurality of decision levels, wherein the one of the plurality of decision levels corresponds to a modulation level used to modulate data in the input PAM-N data symbol; and a calibration unit for adaptively setting the plurality of decision levels based, in part, on the least error value, thereby enabling for compensating for gain changes resulted by a cable on which the input PAM-N data symbol is received and further compensating for embedded offsets of the error-and-decision unit.

Abstract: A sink circuit for protecting connectivity of a digital multimedia interface, the sink circuit is connected in a sink multimedia device. The sink circuit comprises a sink port configured to provide a connection to a source multimedia device; a termination coupled to the sink port; and a protection component coupled in series between the termination and a power source of the sink multimedia device, the protection component blocks any direct current path through the sink port when the sink multimedia device is off and the power source of the source multimedia device is on.

Abstract: A boost converter circuit that includes a power supply, an inductor coupled to the power supply to receive current from the power supply, a diode coupled to receive current from the inductor and coupled to provide current to a load as an output, an inductor switch coupled to a node between the inductor and the diode for selectively switching current from the inductor anyway from the diode, and a ramp circuit. The ramp circuit is coupled to the node between the inductor and the diode, and is configured to selectively sample a voltage at the node between the inductor and the diode via a sampling switch and use the sampled signal to produce a stabilization ramp to stabilize the output.

Abstract: A method for compensating for gain changes of an N-level pulse amplitude modulation (PAM-N) modulated signal. The method comprises comparing the PAM-N modulated signal to N?1 configurable thresholds, wherein the input PAM-N modulated signal is also equalized and the N?1 configurable thresholds are N?1 different voltage levels; tracking gain changes in the input PAM-N modulated signal by comparing the input PAM-N modulated signal to a compensation threshold; and adjusting a level of the at least one of the N?1 configurable thresholds of the N?1 comparators based on an output of the compensation comparator, thereby offsetting a crossing point of the at least one comparator respective of the at least one of the N?1 configurable thresholds to compensate for gain changes in the input PAM-N modulated signal.

Abstract: A PAM-N decision feedback equalizer (DFE) comprises a coefficient computation unit; a feedback unit that mitigates, using computed feedback coefficients, effects of interference from data symbols; an error-and-decision unit for at least computing a least error value respective to one of a plurality of decision levels, wherein the least error value indicates a difference of a pseudo equalized input PAM-N data symbol from an optimal position of the one of the plurality of decision levels, wherein the one of the plurality of decision levels corresponds to a modulation level used to modulate data in the input PAM-N data symbol; and a calibration unit for adaptively setting the plurality of decision levels based, in part, on the least error value, thereby enabling for compensating for gain changes resulted by a cable on which the input PAM-N data symbol is received and further compensating for embedded offsets of the error-and-decision unit.

Abstract: A decision feedback equalizer (DFE) for equalizing PAM-N signals comprises a coefficient setting unit for setting a first group of most significant feedback coefficients of the DFE to a predefined value selected from a group of predefined values; a coefficients computation unit coupled to the coefficient setting unit for computing values of feedback coefficients of a second group of feedback coefficients other than the first group of most significant feedback coefficients; a feedback (FB) unit for mitigating, using a complete group of feedback coefficients, effects of interference from data symbols that are adjacent in time to an input data symbol, wherein most significant feedback coefficients of the first group are set to an optimal value computed during an initialization of the DFE and feedback coefficients of the second group are computed by the coefficients computation unit.

Abstract: A boost converter circuit that includes a power supply, an inductor coupled to the power supply to receive current from the power supply, a diode coupled to receive current from the inductor and coupled to provide current to a load as an output, an inductor switch coupled to a node between the inductor and the diode for selectively switching current from the inductor anyway from the diode, and a ramp circuit. The ramp circuit is coupled to the node between the inductor and the diode, and is configured to selectively sample a voltage at the node between the inductor and the diode via a sampling switch and use the sampled signal to produce a stabilization ramp to stabilize the output.

Abstract: An apparatus for enabling simultaneous multimedia content streaming and power charging of handheld devices, comprises a universal connector installed in a first device and enables connectivity of at least one multimedia display interface and at least one data interface with a second device, the first device is connected to the second device using a charging-streaming cable having, at one end, a first connector compliant with the universal connector, and at the other end, a second connector compliant with a multimedia display interface and a third connector compliant with a data interface of the second device, wherein streaming of the multimedia content is from the universal connector in the first device to the second connector in the second device and power charging of the first device is through the third connector of the second device; and a detector for determining a type of the multimedia display interface of the second device.

Abstract: A triple-mode connectivity apparatus for enabling interoperability between a multimedia display interface and a data interface. The apparatus comprises a universal connector installed in a first device and structured to enable connectivity between the multimedia display interface and the data interface of a second device, the first device is connected to the second device using a cable having a first connector compliant with the universal connector and a second connecter compliant with the data interface of the second device; a physical layer interface for processing signals compliant with the multimedia display interface and the data interface; and a detector for detecting an interface type of the second device and setting the apparatus to process signals according to the determined interface type.

Abstract: An interface circuit for enabling clock and data recovery (CDR) of N-level pulse amplitude modulation (N-PAM) modulated data streams using a 2-PAM CDR circuit. The circuit comprises a number of N?1 comparators for comparing an input data stream to N?1 configurable thresholds, the input data stream is N-PAM modulated and the N?1 configurable thresholds are N?1 different voltage levels; a number of N?1 of edge detectors respectively connected to the N?1 comparators for detecting transitions from one logic value to another logic value, N is a discrete number greater than two; and a determination unit for determining if the detected transitions is any one of a major transition and a minor transition and asserting a transition signal if only a major transition or a minor transition has occurred, the transition signal is fed into a 2-PAM CDR circuit and utilized for recovering a clock signal of the input data stream.

Abstract: A multimedia interface cable for achieving complete interoperability between different types of multimedia display interfaces. The cable comprises a first multimedia connector including a plurality of contact pins of at least high-speed multimedia signals and control signals; a second multimedia connector including a plurality of contact pins of least high-speed multimedia signals and control signals; a plurality of un-crossing conducting wires for coupling the plurality of contact pins of the high-speed multimedia signals in the first multimedia connector to the plurality of contact pins of the high-speed multimedia signals in the second multimedia connector; and a plurality of conducting wires for coupling the plurality of contact pins of the control signals in the first multimedia connector to the plurality of contact pins of the control signals in the second multimedia connector.