Patents by Inventor Yasue Tokutake

Yasue Tokutake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9488677
    Abstract: A probe card includes a wiring substrate including an opening portion and a connection pad arranged on an upper face of the wiring substrate located on the periphery of the opening portion, a resin portion formed in the opening portion of the wiring substrate, and the resin portion formed of a material having elasticity, a contact terminal arranged to protrude from the lower face of the resin portion, and wire buried in the resin portion and connecting the contact terminal and the connection pad, wherein the contact terminal is formed of an end part of the wire, and is formed integrally with the wire.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: November 8, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Ryo Fukasawa, Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Mitsuhiro Aizawa
  • Patent number: 9476913
    Abstract: A probe card includes a wiring substrate including an opening portion, a first connection pad, and a second connection pad arranged in an opposite area to the first connection pad, a resin portion formed in the opening portion, a first wire buried in the resin portion, in which one end is connected to the first connection pad and other end constitutes a first contact terminal, and a second wire buried in the resin portion, in which one end is connected to the second connection pad and other end constitutes a second contact terminal, wherein the first and second wires extend on one line, and the first and second contact terminals are arranged on the one line, and the first and second contact terminals are gathered to be separated such that the first and second contact terminals touch one electrode pad of a text object with a pair.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: October 25, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Ryo Fukasawa, Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Mitsuhiro Aizawa
  • Patent number: 9470718
    Abstract: A probe card, includes, a wiring substrate having an opening portion and including a first connection pad and a second connection pad, the first connection pad being arranged at a periphery of the opening portion, the second connection pad being arranged to be adjacent to the first connection pad, a resin portion formed inside the opening portion of the wiring substrate, a first wire buried in the resin portion and having one end connected to the first connection pad and the other end constituting a first contact terminal protruding from a lower face of the resin portion, and a second wire buried in the resin portion and having one end connected to the second connection pad and the other end constituting a second contact terminal protruding from a lower face of the resin portion.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: October 18, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Ryo Fukasawa, Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Mitsuhiro Aizawa
  • Patent number: 9460983
    Abstract: A thermal interface material includes a metal foil, which has a first surface and an opposite second surface, and a plurality of rod conductors each having a side surface extending in a thickness direction of the metal foil. The rod conductors are arranged on at least one of the first and second surfaces of the metal foil in a planar direction that is perpendicular to the thickness direction. A resin layer covers at least the first surface and the second surface of the metal foil and the side surfaces of the rod conductors.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: October 4, 2016
    Assignee: Shinko Electric Industries Co., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Patent number: 9459289
    Abstract: A probe card includes a frame-shaped wiring substrate having interlayer insulation layers and a wiring layer that are alternately stacked. A cavity is defined in a central portion of the wiring substrate. A first insulation layer is arranged in the cavity so that a frame-shaped clearance exists between an outer side surface of the first insulation layer and an inner side surface of the wiring substrate as viewed from above. The cavity is filled with a second insulation layer. A contact terminal projecting from a lower surface of the first insulation layer is electrically connected to the wiring layer by a conductive wire. Elasticity of the second insulation layer is smaller than elasticity of each interlayer insulation layer.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: October 4, 2016
    Assignee: Shinko Electric Industries Co., LTD.
    Inventors: Michio Horiuchi, Ryo Fukasawa, Yuichi Matsuda, Yasue Tokutake
  • Patent number: 9373587
    Abstract: An electronic component device, includes, a plurality of wiring layers including a component connection pad in a center part and an external connection pad in a periphery, an insulating layer formed on the wiring layers, and the insulating layer in which the component connection pad and the external connection pad are exposed, a frame member arranged on the insulating layer, and the frame member in which an opening portion is provided in an area of the center part in which the component connection pad is arranged, and a connection hole is provided on the external connection pad, an electronic component arranged in the opening portion of the frame member and connected to the component connection pad, a sealing resin formed in the opening portion of the frame member and sealing the electronic component, and a metal bonding material formed on the external connection pad in the connection hole.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: June 21, 2016
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio Horiuchi, Ryo Fukasawa, Yuichi Matsuda, Yasue Tokutake
  • Patent number: 9202781
    Abstract: A wiring substrate includes a core layer, first and second wiring layers, and a first insulating layer. The core layer has one and another surfaces and includes a plate-shaped member formed of an aluminum oxide and multiple linear conductors penetrating the plate-shaped member in a thickness direction of the plate-shaped member. The first wiring layer is formed on the one surface of the core layer. The second wiring layer is formed on the other surface of the core layer. The first insulating layer has a same thickness as the first wiring layer and is formed in an area of the one surface of the core layer on which the first wiring layer is not formed. The first and second wiring layers are positioned superposing each other in a plan view. The first and second wiring layers are electrically connected by way of the multiple linear conductors.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: December 1, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuko Karasawa, Kazue Ban, Ryo Fukasawa, Yuichi Matsuda, Michio Horiuchi, Yasue Tokutake
  • Patent number: 9204544
    Abstract: A wiring substrate includes, an insulating substrate in which a plurality of penetration conductors are provided, the penetration conductors penetrating in a thickness direction of the insulating substrate, a first connection pad arranged on one face of the insulating substrate, a second connection pad arranged to correspond to the first connection pad on other face of the insulating substrate, a first metal layer arranged to surround the first connection pad, a second metal layer arranged to correspond to the first metal layer, the second metal layer surrounding the second connection pad, the plurality of penetration conductors connecting the first connection pad and the second connection pad, and connecting the first metal layer and the second metal layer, and an elastic body formed in a part of the insulating substrate between the first and second connection pads, and the first and second metal layers.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: December 1, 2015
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio Horiuchi, Ryo Fukasawa, Yuichi Matsuda, Yasue Tokutake
  • Publication number: 20150137849
    Abstract: A probe card includes a first insulation layer, a contact terminal arranged on the first insulation layer, and a wiring pattern arranged on an upper surface of the first insulation layer. The wiring pattern includes a rewire connected to the contact terminal and a first pad connected to the rewire. The probe card further includes a wiring substrate. The wiring substrate includes an interlayer insulation layer, a wiring layer, and a cavity defined in central portions of the interlayer insulation layer and the wiring layer. The wiring substrate is spaced apart from the first insulation layer arranged in the cavity. The cavity is filled with a second insulation layer. A conductive wire is arranged in the second insulation layer to electrically connect the first contact terminal and the wiring layer. The second insulation layer has a lower elasticity than the interlayer insulation layer.
    Type: Application
    Filed: October 16, 2014
    Publication date: May 21, 2015
    Applicant: Shinko Electric Industries Co., LTD.
    Inventors: Michio Horiuchi, Ryo Fukasawa, Yuichi Matsuda, Yasue Tokutake
  • Patent number: 9029041
    Abstract: To an internal vessel that houses cells of a solid oxide fuel cell, an external vessel is further disposed. In the internal vessel, a plurality of planar cells is disposed vertically with a gap between the cells, a mixed gas of a fuel and air is descended from top down through the gap having a predetermined width between the cells, and, at a bottom portion of the housing space, the mixed gas is burned to generate electricity.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: May 12, 2015
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Shigeaki Suganuma, Jun Yoshiike, Fumimasa Katagiri
  • Patent number: 9006586
    Abstract: One embodiment provides a wiring substrate including: a core substrate having an insulative base member, the insulative base member having a first surface and a second surface, a plurality of linear conductors penetrating through the insulative base member from the first surface to the second surface; an inorganic material layer joined to at least one of the first surface and the second surface of the insulative base member; and a penetration line penetrating through the inorganic material layer, wherein one end of the penetration line is electrically connected to a corresponding part of the linear conductors, without intervention of a bump.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: April 14, 2015
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Tomoo Yamasaki
  • Publication number: 20150022230
    Abstract: A probe card includes a wiring substrate including an opening portion, a first connection pad, and a second connection pad arranged in an opposite area to the first connection pad, a resin portion formed in the opening portion, a first wire buried in the resin portion, in which one end is connected to the first connection pad and other end constitutes a first contact terminal, and a second wire buried in the resin portion, in which one end is connected to the second connection pad and other end constitutes a second contact terminal, wherein the first and second wires extend on one line, and the first and second contact terminals are arranged on the one line, and the first and second contact terminals are gathered to be separated such that the first and second contact terminals touch one electrode pad of a text object with a pair.
    Type: Application
    Filed: July 10, 2014
    Publication date: January 22, 2015
    Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
  • Publication number: 20150022229
    Abstract: A probe card, includes, a wiring substrate having an opening portion and including a first connection pad and a second connection pad, the first connection pad being arranged at a periphery of the opening portion, the second connection pad being arranged to be adjacent to the first connection pad, a resin portion formed inside the opening portion of the wiring substrate, a first wire buried in the resin portion and having one end connected to the first connection pad and the other end constituting a first contact terminal protruding from a lower face of the resin portion, and a second wire buried in the resin portion and having one end connected to the second connection pad and the other end constituting a second contact terminal protruding from the lower face of the resin portion, wherein diameters of the first contact terminal and the second contact terminal are equal to diameters of the first wire and the second wire in the resin portion, and the first contact terminal and the second contact terminal are g
    Type: Application
    Filed: July 10, 2014
    Publication date: January 22, 2015
    Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
  • Publication number: 20140347833
    Abstract: An electronic component device, includes, a plurality of wiring layers including a component connection pad in a center part and an external connection pad in a periphery, an insulating layer formed on the wiring layers, and the insulating layer in which the component connection pad and the external connection pad are exposed, a frame member arranged on the insulating layer, and the frame member in which an opening portion is provided in an area of the center part in which the component connection pad is arranged, and a connection hole is provided on the external connection pad, an electronic component arranged in the opening portion of the frame member and connected to the component connection pad, a sealing resin formed in the opening portion of the frame member and sealing the electronic component, and a metal bonding material formed on the external connection pad in the connection hole.
    Type: Application
    Filed: April 24, 2014
    Publication date: November 27, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Ryo FUKASAWA, Yuichi MATSUDA, Yasue TOKUTAKE
  • Publication number: 20140262465
    Abstract: A wiring substrate includes, an insulating substrate in which a plurality of penetration conductors are provided, the penetration conductors penetrating in a thickness direction of the insulating substrate, a first connection pad arranged on one face of the insulating substrate, a second connection pad arranged to correspond to the first connection pad on other face of the insulating substrate, a first metal layer arranged to surround the first connection pad, a second metal layer arranged to correspond to the first metal layer, the second metal layer surrounding the second connection pad, the plurality of penetration conductors connecting the first connection pad and the second connection pad, and connecting the first metal layer and the second metal layer, and an elastic body formed in a part of the insulating substrate between the first and second connection pads, and the first and second metal layers.
    Type: Application
    Filed: March 10, 2014
    Publication date: September 18, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Michio HORIUCHI, Ryo FUKASAWA, Yuichi MATSUDA, Yasue TOKUTAKE
  • Publication number: 20140125372
    Abstract: A probe card includes a wiring substrate including an opening portion and a connection pad arranged on an upper face of the wiring substrate located on the periphery of the opening portion, a resin portion formed in the opening portion of the wiring substrate, and the resin portion formed of a material having elasticity, a contact terminal arranged to protrude from the lower face of the resin portion, and wire buried in the resin portion and connecting the contact terminal and the connection pad, wherein the contact terminal is formed of an end part of the wire, and is formed integrally with the wire.
    Type: Application
    Filed: October 28, 2013
    Publication date: May 8, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Ryo FUKASAWA, Michio HORIUCHI, Yasue TOKUTAKE, Yuichi MATSUDA, Mitsuhiro AIZAWA
  • Publication number: 20140117539
    Abstract: A wiring substrate includes a core layer, first and second wiring layers, and a first insulating layer. The core layer has one and another surfaces and includes a plate-shaped member formed of an aluminum oxide and multiple linear conductors penetrating the plate-shaped member in a thickness direction of the plate-shaped member. The first wiring layer is formed on the one surface of the core layer. The second wiring layer is formed on the other surface of the core layer. The first insulating layer has a same thickness as the first wiring layer and is formed in an area of the one surface of the core layer on which the first wiring layer is not formed. The first and second wiring layers are positioned superposing each other in a plan view. The first and second wiring layers are electrically connected by way of the multiple linear conductors.
    Type: Application
    Filed: October 28, 2013
    Publication date: May 1, 2014
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Yuko KARASAWA, Kazue Ban, Ryo Fukasawa, Yuichi Matsuda, Michio Horiuchi, Yasue Tokutake
  • Patent number: 8664764
    Abstract: One embodiment provides a semiconductor device having: a core substrate having first and second surfaces and an accommodation hole penetrating therethrough; a semiconductor element accommodated in the accommodation hole so that a front surface thereof is on the first surface side; a first metal film formed on a back surface of the semiconductor element; a second metal film formed on the second surface of the core substrate; an insulating layer covering the first and second metal films; and a third metal film formed on the insulating layer, via parts thereof penetrating through the insulating layer to respectively reach the first and second metal films.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: March 4, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda
  • Patent number: 8638542
    Abstract: A capacitor includes a dielectric substrate and a large number of filamentous conductors formed to penetrate through the dielectric substrate in a thickness direction thereof. An electrode is connected to only respective one ends of a plurality of filamentous conductors constituting one of groups each composed of a plurality of filamentous conductors. The electrode is disposed in at least one position on each of both surfaces of the dielectric substrate, or in at least two positions on one of the surfaces. Further, an insulating layer is formed on each of both surfaces of the dielectric substrate so as to cover regions between the electrodes, and a conductor layer is formed on the corresponding insulating layer integrally with a desired number of electrodes.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: January 28, 2014
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda, Yukio Shimizu, Tomoo Yamasaki, Yuta Sakaguchi
  • Publication number: 20130081796
    Abstract: A thermal interface material includes a metal foil, which has a first surface and an opposite second surface, and a plurality of rod conductors each having a side surface extending in a thickness direction of the metal foil. The rod conductors are arranged on at least one of the first and second surfaces of the metal foil in a planar direction that is perpendicular to the thickness direction. A resin layer covers at least the first surface and the second surface of the metal foil and the side surfaces of the rod conductors.
    Type: Application
    Filed: September 13, 2012
    Publication date: April 4, 2013
    Applicant: Shinko Electric Industries Co., LTD.
    Inventors: Michio Horiuchi, Yasue Tokutake, Yuichi Matsuda