Patents by Inventor Yasufumi Miyoshi
Yasufumi Miyoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11710753Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: GrantFiled: February 3, 2022Date of Patent: July 25, 2023Assignee: Sony Group CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Publication number: 20230143387Abstract: An imaging device includes a plurality of imaging elements, wherein each of the plurality of imaging elements includes: a plurality of pixels containing impurities of a first conductivity type; an element separation wall surrounding the plurality of pixels and provided so as to penetrate a semiconductor substrate; an on-chip lens provided above a light receiving surface of the semiconductor substrate so as to be shared by the plurality of pixels; and a first separation portion provided in a region surrounded by the element separation wall and separating the plurality of pixels, the first separation portion is provided so as to extend in a thickness direction of the semiconductor substrate, and a first diffusion region containing impurities of a second conductivity type opposite to the first conductivity type is provided in a region positioned around the first separation portion and extending in the thickness direction of the semiconductor substrate.Type: ApplicationFiled: March 26, 2021Publication date: May 11, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Akira MATSUMOTO, Koichiro ZAITSU, Keiji NISHIDA, Mizuki NISHIDA, Kazutaka IZUKASHI, Daisuke ITO, Yasufumi MIYOSHI, Junpei YAMAMOTO, Yusuke TANAKA, Yasushi HAMAMOTO
-
Publication number: 20220344386Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: ApplicationFiled: July 6, 2022Publication date: October 27, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI
-
Patent number: 11424281Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: GrantFiled: August 7, 2020Date of Patent: August 23, 2022Assignee: Sony Semiconductor Solutions CorporationInventors: Jun Ogi, Yoshiaki Tashiro, Takahiro Toyoshima, Yorito Sakano, Yusuke Oike, Hongbo Zhu, Keiichi Nakazawa, Yukari Takeya, Atsushi Okuyama, Yasufumi Miyoshi, Ryosuke Matsumoto, Atsushi Horiuchi
-
Publication number: 20220157870Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: ApplicationFiled: February 3, 2022Publication date: May 19, 2022Applicant: Sony Group CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Patent number: 11282881Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: GrantFiled: February 5, 2020Date of Patent: March 22, 2022Assignee: Sony CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Publication number: 20210384250Abstract: Groove portions are provided between adjacent photoelectric conversion portions, and sidewall surfaces and bottom surfaces of the groove portions are covered with a first fixed charge film, and open ends of the groove portions are closed by a second fixed charge film with voids inside of the groove portions.Type: ApplicationFiled: August 20, 2019Publication date: December 9, 2021Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Itaru OSHIYAMA, Shinichiro NOUDO, Yasufumi MIYOSHI
-
Patent number: 11018110Abstract: The present technology relates to a semiconductor device, a manufacturing method, and a solid-state imaging device which are capable of suppressing a decrease in bonding strength and preventing a poor electrical connection or peeling when two substrates are bonded to each other. Provided is a semiconductor device, including: a first substrate including a first electrode including a metal; and a second substrate bonded to the first substrate and including a second electrode including a metal. An acute-angled concavo-convex portion is formed on a side surface of a groove in which the first electrode is formed and a side surface of a groove in which the second electrode metal-bonded to the first electrode is formed. The present technology can be, for example, applied to a solid-state imaging device such as a CMOS image sensor.Type: GrantFiled: October 10, 2017Date of Patent: May 25, 2021Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Akiko Hirata, Tadayuki Kimura, Yasufumi Miyoshi, Katsunori Hiramatsu
-
Publication number: 20200365629Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: ApplicationFiled: August 7, 2020Publication date: November 19, 2020Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI
-
Patent number: 10777597Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: GrantFiled: March 20, 2018Date of Patent: September 15, 2020Assignee: Sony Semiconductor Solutions CorporationInventors: Jun Ogi, Yoshiaki Tashiro, Takahiro Toyoshima, Yorito Sakano, Yusuke Oike, Hongbo Zhu, Keiichi Nakazawa, Yukari Takeya, Atsushi Okuyama, Yasufumi Miyoshi, Ryosuke Matsumoto, Atsushi Horiuchi
-
Publication number: 20200176498Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: ApplicationFiled: February 5, 2020Publication date: June 4, 2020Applicant: Sony CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Patent number: 10600836Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: GrantFiled: May 22, 2018Date of Patent: March 24, 2020Assignee: Sony CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Publication number: 20200035643Abstract: The present technology relates to a semiconductor device, a manufacturing method, and a solid-state imaging device which are capable of suppressing a decrease in bonding strength and preventing a poor electrical connection or peeling when two substrates are bonded to each other. Provided is a semiconductor device, including: a first substrate including a first electrode including a metal; and a second substrate bonded to the first substrate and including a second electrode including a metal. An acute-angled concavo-convex portion is formed on a side surface of a groove in which the first electrode is formed and a side surface of a groove in which the second electrode metal-bonded to the first electrode is formed. The present technology can be, for example, applied to a solid-state imaging device such as a CMOS image sensor.Type: ApplicationFiled: October 10, 2017Publication date: January 30, 2020Inventors: AKIKO HIRATA, TADAYUKI KIMURA, YASUFUMI MIYOSHI, KATSUNORI HIRAMATSU
-
Publication number: 20190157323Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.Type: ApplicationFiled: March 20, 2018Publication date: May 23, 2019Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI
-
Publication number: 20180269246Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: ApplicationFiled: May 22, 2018Publication date: September 20, 2018Applicant: Sony CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Patent number: 9985064Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: GrantFiled: June 29, 2017Date of Patent: May 29, 2018Assignee: Sony CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Publication number: 20170301714Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: ApplicationFiled: June 29, 2017Publication date: October 19, 2017Applicant: Sony CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Patent number: 9728571Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: GrantFiled: November 18, 2016Date of Patent: August 8, 2017Assignee: Sony CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Publication number: 20170069669Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: ApplicationFiled: November 18, 2016Publication date: March 9, 2017Applicant: Sony CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi
-
Patent number: 9536919Abstract: A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.Type: GrantFiled: July 6, 2016Date of Patent: January 3, 2017Assignee: Sony CorporationInventors: Atsushi Kawashima, Katsunori Hiramatsu, Yasufumi Miyoshi