Abstract: There is provided a group of testing apparatuses that realizes high-level testing and high quality medical treatment by conducting tests using apparatuses and facilities that are located in a distributed condition. A distributed testing apparatus is configured to be connectable to a network system to which a host testing apparatus is connected, wherein the distributed testing apparatus has a testing part that assays genetic information of a specimen, a transmission part that transmits test results information of the testing part and a specimen ID corresponding to the specimen to the host testing apparatus through the network, a receiver part that receives through the network assessment information from the host testing apparatus that corresponds to the transmitted test results information, and an output part that outputs the received information.

Abstract: An electronic module which is detachably mounted on electronic equipment. The electronic module includes a board having a heat generator mounted on a surface thereof, and a cooling jacket which is integrally attached to the electronic module. The cooling jacket is thermally coupled to the heat generator and has a passage of a cooling fluid therewithin.

Abstract: The present invention provides an analytical chip that is easy to handle, inexpensive, and for which the extraction of gene from a sample and analysis thereof can be automated to one process, and a small-sized and portable analytical apparatus equipped therewith.

Abstract: A program for automatically designing a logic circuit used for a method of designing a pass transistor circuit, by which the number of required transistors, delay time, power consumption and chip area of the pass transistor circuit is reduced.

Abstract: In the structure of an electronic apparatus, in which cooling of an heat-generating element is achieved through circulation of a liquid, in particular, for providing the structure of being high in cooling performance and reliability, wherein a heat-radiation pipe 9 is connected to a heat-radiation plate 10 disposed in a rear surface of a display 2, while thermally connecting a water-cooling jacket 8 with the heat-generating element 7, thereby circulating a coolant liquid between the water-cooling jacket 8 and the heat-radiation pipe 9 by means of a liquid driving device 11. The water-cooling jacket 8 can be formed in one body of a jacket base and a flow passage therein through the die-cast forming thereof, or can be constructed in one body with the water-cooling jacket and the flow passage of piping, through connection between the jacket base and the metal pipe.

Abstract: A plurality of electronic apparatuses, each apparatus having a closed loop cooling system, are installed in a cabinet having another closed loop fluid cooling system. Each of the closed loop fluid cooling systems includes a heat receiver and a pump. A projection is mounted on the electronic apparatus and a switching valve is arranged on the cabinet to stop or start circulation of a cooling fluid.

Abstract: A peripheral device is connected to an information processing device, and in the event that an interruption job is input from the information processing device while the peripheral device is processing a job by executing one of multiple device control programs holding the functions of multiple devices engines of the peripheral device and managing jobs with the device engines, another device control program different from the device control program being executed is selected and the interruption job is executed. Accordingly, a user-friendly multifunctional peripheral device can be provided.

Abstract: This is a method for more accurately calculating delay times in an electronic circuit device wherein signal arrival times on a victim wire and a plurality of aggressor wires adjacent thereto dynamically vary dependent on an input signal pattern by analyzing values of crosstalk-deriving delay degradation occurring between those wires. By utilizing delay degradation information searchable according to relative signal arrival times between the victim wire and the aggressor wires and adding delay degradations arising between the victim wire and the aggressor wires, calculated at every signal arrival time on the victim wire, the total delay degradation in the presence of a plurality of aggressor wires is calculated. Designing of a high-speed and large-scale electronic circuit device is facilitated and, because a superfluous margin regarding delay times can be eliminated, such electronic circuit devices can be efficiently designed and manufactured.

Abstract: An analytical chip comprising

Abstract: A method for designing an electronic logic circuit device for reducing delay time degradation due to crosstalk between a wire in question and a wire adjacent thereto and for preventing the increase of designing work in case signal arrival time of each of the wire in question and the adjacent wire is dynamically changed according to the input pattern. Delay time degradations is calculated from range of relative signal arrival time (relative window) of the wire in question and the adjacent wire, and when there is violation of design constraint, delay time degradation is reduced by preventing the relative window from touching a curve of delay time degradation.

Abstract: An object of the present invention is to provide a multi-function peripheral which is easy for a user to operate. To achieve the object, according to the present invention, there is provided a peripheral connected to an information processing apparatus, which inputs and analyzes a job script constituted of packet data from the information processing apparatus, and subsequently generates an appropriate job file in accordance with the content of the job script.

Abstract: A plurality of electronic apparatuses, each apparatus having a closed loop cooling system, are installed in a cabinet having another closed loop fluid cooling system. Each of the closed loop fluid cooling systems includes a heat receiver and a pump. A projection is mounted on the electronic apparatus and a switching valve is arranged on the cabinet to stop or start circulation of a cooling fluid.

Abstract: There is provided an information processing apparatus which is easy for a user to operate. In the information processing apparatus, it is judged based on a function obtained from a peripheral whether or not a job script can be issued to the peripheral, and a job issuance processing is controlled in accordance with a judgment result.

Abstract: This application proposes a new logic circuit including the 1st selector (S1) in which the control input S is controlled by the first input signal (IN1), the input I1 or I0 is controlled by the second input signal (IN2), and the output O is connected to the first node (N1), and the 3rd selector (S3) in which the control input S is controlled by the first node (N1), the input I1 is controlled by the third input signal (IN3), the input I0 is controlled by the first input signal (IN1), and the output is connected to the first output signal (OUT1).

Abstract: A pass-transistor logic circuit configuration that can form a high-speed chip in a small area with short wire length. In a selector circuit PMOS and NMOS transistors with different gate signals but with the same drain outputs are arranged, respectively, so their diffusion layers are shared. The PMOS and NMOS are staggered so that their gates are almost in line. With this arrangement, wires connecting drains of the PMOS and NMOS and wires connecting sources of the PMOS and NMOS do not intersect each other, so they can be wired with only the first wiring layer. Further, gate input signals can be wired with only polysilicon wires without crossing each other. The pass-transistor logic circuit is made to pass through the signal buffers before or after it is connected to the selector. This can make a compact, fast circuit.

Abstract: There is provided an information processing apparatus which is easy for a user to operate. In the information processing apparatus, it is judged based on a function obtained from a peripheral whether or not a job script can be issued to the peripheral, and a job issuance processing is controlled in accordance with a judgment result.

Abstract: The invention provides an analgesic anti-inflammatory patch of a hydrophobic type for topical application containing, in a Pressure Sensitive Adhesive (PSA), diclofenac sodium, pyrrolidone or a derivative thereof, a polyhydric alcohol fatty acid ester, and an organic acid.

Abstract: There is provided an information processing apparatus which is easy for a user to operate. In the information processing apparatus, it is judged based on a function obtained from a peripheral whether or not a job script can be issued to the peripheral, and a job issuance processing is controlled in accordance with a judgment result.

Abstract: This application proposes a new logic circuit including the 1st selector (S1) in which the control input S is controlled by the first input signal (IN1), the input I1 or I0 is controlled by the second input signal (IN2), and the output O is connected to the first node (N1), and the 3rd selector (S3) in which the control input S is controlled by the first node (N1), the input I1 is controlled by the third input signal (IN3), the input I0 is controlled by the first input signal (IN1), and the output is connected to the first output signal (OUT1).

Abstract: The semiconductor integrated circuit enjoys a high performance and can be produced at a low production cost and within a short time. A cell has an internal circuit connection such that an output terminal is connected to a plurality of input terminals through source-drain paths of active devices connected in the tree form, and gate electrodes of the active devices are connected to other input terminals. Two such cells having the same internal circuit connection, the same disposition of the internal circuit devices and the same disposition of the input/output terminals are disposed on the same chip, and mutually different logics can be accomplished by changing the form of application of input signals from outside the cells to the input terminals. A chip area of an integrated circuit designed by CAD using a cell library can be reduced and a high speed circuit operation can be attained. The present invention provides remarkable effect for improving performance of an ASIC, a microprocessor, etc.