Abstract: The present invention provides a semiconductor device and a method for manufacturing a semiconductor device. The method comprises: Preparing a semiconductor chip 6 with a first electrode layer 21 formed on an element-forming surface 7. Prepared a support member 30 having a conductor 31 formed on a pattern-forming surface 33. The first electrode layer 21 is bonded to the conductor 31 by a solder, and thus the semiconductor chip 6 is fixed on the support member 30. While the semiconductor chip 6 is fixed on the support member 30, the semiconductor chip 6 is coated by the sealing resin 3 to form a sealing structure 46. By removing the support member 30 from the sealing structure 46, the conductor 31 formed on the support member 30 is transferred to the sealing structure 46. The conductor 31 transferred to the sealing structure 46 is an external electrode exposed from the sealing structure 46.

Abstract: Provided is a magnetism detection device by which it is possible to achieve a reduction in size and an increase in accuracy. A magnetism detection device includes: a magneto-impedance element; a magnetic field direction changing body; and a substrate that is formed of a semiconductor material and has an element arrangement recessed portion bottom surface and a back surface that face mutually opposite sides in a thickness direction, and a through-hole that reaches the element arrangement recessed portion bottom surface and the back surface and has a cross-sectional dimension that increases toward the main surface starting from the element arrangement recessed portion bottom surface. The magneto-impedance element is mounted on the element arrangement recessed portion bottom surface, and the magnetic field direction changing body is accommodated in the through-hole.

Abstract: A semiconductor device includes a substrate that is made of a semiconductor material and has a main surface formed with a recess. The semiconductor device also includes a wiring layer formed on the substrate, an electronic element housed in the recess, and a sealing resin covering at least a part of the electronic element.

Abstract: A compact and refined chip resistor, with which a plurality of types of required resistance values can be accommodated readily with the same design structure, was desired. The chip resistor is arranged to have a resistor network on a substrate. The resistor network includes a plurality of resistor bodies arrayed in a matrix and having an equal resistance value. A plurality of types of resistance units are respectively arranged by one or a plurality of the resistor bodies being connected electrically. The plurality of types of resistance units are connected in a predetermined mode using connection conductor films and fuse films. By selectively fusing a fuse film, a resistance unit can be electrically incorporated into the resistor network or electrically separated from the resistor network to make the resistance value of the resistor network the required resistance value.

Abstract: [Theme] A compact and refined chip resistor, with which a plurality of types of required resistance values can be accommodated readily with the same design structure, was desired. [Solution Means] A chip resistor 10 is arranged to have a resistor network 14 on a substrate. The resistor network 14 includes a plurality of resistor bodies R arrayed in a matrix and having an equal resistance value. A plurality of types of resistance units are respectively arranged by one or a plurality of the resistor bodies R being connected electrically. The plurality of types of resistance units are connected in a predetermined mode using connection conductor films C and fuse films F. By selectively fusing a fuse film F, a resistance unit can be electrically incorporated into the resistor network 14 or electrically separated from the resistor network to make the resistance value of the resistor network 14 the required resistance value.

Abstract: An alternating current generation system is provided. In the system, in a rotor, a plurality of detection subject portions are arrayed along a circumferential direction in correspondence to reversal states of the magnetic poles in a plurality of magnetized portions. A detecting unit is disposed opposing the rotor so as to generate an output signal corresponding to passage state of the detection subject portions. A phase control unit outputs, to a power converter, a control signal to perform phase control of switching elements depending on the rotation phase of the rotor, based on the output signal from the detecting unit.

Abstract: A semiconductor device is provided with a substrate made of a semiconductor material, an interconnect layer, at least one electronic element, and a sealing resin. The substrate has a main surface and a pair of lateral surfaces that are orthogonal to the main surface and face in opposite directions to each other. A recessed portion that is recessed from the main surface and has an opening portion that opens on at least one of the pair of lateral surfaces is formed in the substrate. The interconnect layer is formed on the substrate. The electronic element is an orientation sensor, for example, and is accommodated in the recessed portion of the substrate. The sealing resin covers the electronic element.

Abstract: [Theme] To provide a chip capacitor capable of easily and rapidly accommodating a plurality of types of capacitance values using a common design and a method for manufacturing the chip capacitor. [Solution] A chip capacitor 1 includes a substrate 2, a first external electrode 3, a second external electrode 4, capacitor elements C1 to C19, and fuses F1 to F9 disposed on the substrate 2. The capacitor elements C1 to C19 respectively include a first electrode film 11, a first capacitance film 12 on the first electrode film 11, a second electrode film 13 disposed on the first capacitance film 12 and facing the first electrode film 11, a second capacitance film 17 on the second electrode film 13, and a third electrode film 16 disposed on the second capacitance film 17 and facing the second electrode film 13 and are connected between the first external electrode 3 and the second external electrode 4.

Abstract: A semiconductor device includes a substrate that is made of a semiconductor material and has a main surface formed with a recess. The semiconductor device also includes a wiring layer formed on the substrate, an electronic element housed in the recess, and a sealing resin covering at least a part of the electronic element.

Abstract: [Theme] A compact and refined chip resistor, with which a plurality of types of required resistance values can be accommodated readily with the same design structure, was desired. [Solution Means] A chip resistor 10 is arranged to have a resistor network 14 on a substrate. The resistor network 14 includes a plurality of resistor bodies R arrayed in a matrix and having an equal resistance value. A plurality of types of resistance units are respectively arranged by one or a plurality of the resistor bodies R being connected electrically. The plurality of types of resistance units are connected in a predetermined mode using connection conductor films C and fuse films F. By selectively fusing a fuse film F, a resistance unit can be electrically incorporated into the resistor network 14 or electrically separated from the resistor network to make the resistance value of the resistor network 14 the required resistance value.

Abstract: The acceleration sensor according to the present invention includes a circuit chip having a prescribed circuit built into a front surface thereof; a sensor chip bonded to the front surface of the circuit chip; and a resin package for sealing the circuit chip and the sensor chip, while the sensor chip includes: a membrane arranged to oppose to the front surface of the circuit chip and having a plurality of openings; a piezoresistor formed on a surface of the membrane opposed to the circuit chip; a support section provided on a side opposite to the circuit chip with respect to the membrane and supporting a peripheral edge portion of the membrane; and a weight section provided on the side opposite to the circuit chip with respect to the membrane and integrally held on a central portion of the membrane.

Abstract: The acceleration sensor according to the present invention includes a circuit chip having a prescribed circuit built into a front surface thereof; a sensor chip bonded to the front surface of the circuit chip; and a resin package for sealing the circuit chip and the sensor chip, while the sensor chip includes: a membrane arranged to oppose to the front surface of the circuit chip and having a plurality of openings; a piezoresistor formed on a surface of the membrane opposed to the circuit chip; a support section provided on a side opposite to the circuit chip with respect to the membrane and supporting a peripheral edge portion of the membrane; and a weight section provided on the side opposite to the circuit chip with respect to the membrane and integrally held on a central portion of the membrane.

Abstract: The acceleration sensor according to the present invention includes a circuit chip having a prescribed circuit built into a front surface thereof; a sensor chip bonded to the front surface of the circuit chip; and a resin package for sealing the circuit chip and the sensor chip, while the sensor chip includes: a membrane arranged to oppose to the front surface of the circuit chip and having a plurality of openings; a piezoresistor formed on a surface of the membrane opposed to the circuit chip; a support section provided on a side opposite to the circuit chip with respect to the membrane and supporting a peripheral edge portion of the membrane; and a weight section provided on the side opposite to the circuit chip with respect to the membrane and integrally held on a central portion of the membrane.

Abstract: The acceleration sensor according to the present invention includes a circuit chip having a prescribed circuit built into a front surface thereof; a sensor chip bonded to the front surface of the circuit chip; and a resin package for sealing the circuit chip and the sensor chip, while the sensor chip includes: a membrane arranged to oppose to the front surface of the circuit chip and having a plurality of openings; a piezoresistor formed on a surface of the membrane opposed to the circuit chip; a support section provided on a side opposite to the circuit chip with respect to the membrane and supporting a peripheral edge portion of the membrane; and a weight section provided on the side opposite to the circuit chip with respect to the membrane and integrally held on a central portion of the membrane.

Abstract: Single-phase currents at two frequencies f.alpha. and f.beta. (f.alpha.<n.multidot.fs<f.beta.) of non-integral multiples of a system fundamental wave frequency fs sandwiching an targeted harmonic (frequency n.multidot.fs) are injected between two phases of a three-phase power system as interharmonic currents. A frequency analysis of measurement current and measurement voltage of each phase in the system is carried out and a positive-phase-sequence current I1, a positive-phase-sequence voltage V1, a negative-phase-sequence current I2, and a negative-phase-sequence voltage V2 are detected for each of the two frequencies f.alpha. and f.beta. in the system based on injecting of the interharmonic currents. Positive-phase-sequence and negative-phase-sequence admittances Y1 and Y2 or positive-phase-sequence and negative-phase-sequence impedances Z1 and Z2 are found for each of the frequencies f.alpha. and f.beta. in the system as Y1=I1/V1 and Y2=I2/V2 or Z1=V1/I1 and Z2=V2/I2.