Patents by Inventor Yasuhiro Isobe
Yasuhiro Isobe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230031562Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on tType: ApplicationFiled: October 18, 2022Publication date: February 2, 2023Inventors: Toru Sugiyama, Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi, Tetsuya Ohno, Naonori Hosokawa, Masaaki Onomura, Masaaki Iwai
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Patent number: 11508647Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor, a normally-on transistor, a first diode, and a Zener diode; a first terminal provided on the semiconductor package; a plurality of second terminals provided on the semiconductor package, and the second terminals being lined up in a first direction; a third terminal provided on the semiconductor package; a plurality of fourth terminals provided on the semiconductor package; and a plurality of fifth terminals provided on the semiconductor package, and the fifth terminals being lined up in the first direction.Type: GrantFiled: March 10, 2021Date of Patent: November 22, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Toru Sugiyama, Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi, Tetsuya Ohno, Naonori Hosokawa, Masaaki Onomura, Masaaki Iwai
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Publication number: 20220310490Abstract: A semiconductor device has a first wiring extending in a first direction on a nitride semiconductor layer. A source electrode is electrically connected to the first wiring and extends in a second direction. A drain electrode extends in the second direction and includes a first and second portion extending in the second direction, spaced from each other in the first direction. An element isolation region is in the second nitride semiconductor layer between the first and second portions. A third portion extends in the second direction on the first and second portions. A gate electrode extends in the second direction on the second nitride semiconductor layer between the source electrode and the drain electrode. The portion includes holes therein aligned with each other along the second direction with the spacing between adjacent holes in the second direction increasing with increasing distance in the second direction from the first wiring.Type: ApplicationFiled: September 2, 2021Publication date: September 29, 2022Inventors: Akira YOSHIOKA, Hung HUNG, Yasuhiro ISOBE, Toru SUGIYAMA, Hitoshi KOBAYASHI
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Publication number: 20220302294Abstract: A semiconductor device of an embodiment includes: a semiconductor layer including an element region and an element isolation region; a first insulation film provided on the semiconductor layer; a first electrode provided on the first insulation film and extending in a first direction; a second electrode provided on the semiconductor layer, arranged in a second direction intersecting with the first direction, and extending in the first direction; a third electrode provided on the semiconductor layer, arranged in the second direction, and extending in the first direction; second insulation films provided between the first insulation film and the semiconductor layer, and interposing the third electrode in the second direction; a first field plate electrode provided on the first electrode and connected to the first electrode; a second field plate electrode provided on the first field plate electrode and connected to the second electrode; and a third field plate electrode provided on the third electrode and connecType: ApplicationFiled: September 9, 2021Publication date: September 22, 2022Inventors: Hitoshi KOBAYASHI, Yasuhiro ISOBE, Hung HUNG
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Patent number: 11448535Abstract: In order to accurately calculate an estimated flow rate by a dynamic constant volume method, a flow rate calculation system including a tank into which fluid flows, an inflow line through which the fluid flows into the tank, and a pressure sensor that detects the pressure inside the tank is adapted to include: a pressure change data storage part that stores pressure change data indicating a temporal change in the pressure detected by the pressure sensor during an inflow period; a flow rate calculation part that calculates the estimated flow rate during the inflow period based on a pressure change rate; and a flow rate correction part that, on the basis of first pressure detected by the pressure sensor after a predetermined time has elapsed after the inflow period and second pressure included in the pressure change data and higher than the first pressure, corrects the estimated flow rate.Type: GrantFiled: February 25, 2020Date of Patent: September 20, 2022Assignee: HORIBA STEC, Co., Ltd.Inventors: Masanori Terasaka, Koji Imamura, Osamu Horinouchi, Yasuhiro Isobe
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Publication number: 20220293745Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer provided on the first nitride semiconductor layer, the second nitride semiconductor layer having a band gap larger than the first nitride semiconductor layer, a first electrode provided on the second nitride semiconductor layer, a second electrode provided on the second nitride semiconductor layer, a first insulating film provided between the first electrode and the second electrode on the second nitride semiconductor layer, the first insulating film being in connect with the second nitride semiconductor layer and including a first insulating material, a second insulating film provided on the second nitride semiconductor layer between the first electrode and the first insulating film, on the first insulating film, and on the second nitride semiconductor layer between the first insulating film and the second electrode, the second insulating film including a second insulating material, a third electrode proType: ApplicationFiled: September 7, 2021Publication date: September 15, 2022Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA, Toru SUGIYAMA, Masaaki ONOMURA
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Publication number: 20220140731Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is denoType: ApplicationFiled: January 19, 2022Publication date: May 5, 2022Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Akira YOSHIOKA, Toru SUGIYAMA, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA, Hung HUNG, Yasuhiro ISOBE
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Patent number: 11290100Abstract: Provided is a semiconductor device including a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode, a fourth electrode, and a second control electrode, a first capacitor having a first end and a second end, a Zener diode having a first anode and a first cathode, a first resistor having a third end and a fourth end, a first diode having a second anode and a second cathode, a second resistor having a fifth end and a sixth end, a second diode having a third anode and a third cathode, and a second capacitor having a seventh end and an eighth end.Type: GrantFiled: September 4, 2020Date of Patent: March 29, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hitoshi Kobayashi, Tetsuya Ohno
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Publication number: 20220093747Abstract: A semiconductor device has a first and a second nitride semiconductor layer and a first and a second electrode thereon. A gate electrode is between the first and second electrodes. A gate field plate is on the gate electrode. A first field plate is above a position between the gate field plate and the second electrode. A second field plate is between the first field plate and the gate field plate. A distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to the portion of the gate field plate that protrudes the most towards the second electrode. The distance from the first nitride semiconductor layer to the second field plate is shorter than a distance from the first nitride semiconductor layer to an end surface of the first field plate on a first electrode side.Type: ApplicationFiled: March 3, 2021Publication date: March 24, 2022Inventors: Tetsuya OHNO, Akira Yoshioka, Toru Sugiyama, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi
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Publication number: 20220085175Abstract: A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.Type: ApplicationFiled: March 2, 2021Publication date: March 17, 2022Inventors: Akira YOSHIOKA, Yasuhiro ISOBE, Hung HUNG, Hitoshi KOBAYASHI, Tetsuya OHNO, Toru SUGIYAMA
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Publication number: 20220084916Abstract: A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on tType: ApplicationFiled: March 10, 2021Publication date: March 17, 2022Inventors: Toru Sugiyama, Akira Yoshioka, Hung Hung, Yasuhiro Isobe, Hitoshi Kobayashi, Tetsuya Ohno, Naonori Hosokawa, Masaaki Onomura, Masaaki Iwai
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Publication number: 20220077131Abstract: A semiconductor device according to an embodiment includes: a first nitride semiconductor layer having a first surface and a second surface; a first source electrode provided on the first surface; a first drain electrode provided on the first surface; a first gate electrode provided on the first surface between the first source electrode and the first drain electrode; a second nitride semiconductor layer having a third surface and a fourth surface, the third surface being provided on the second surface and facing the second surface, and the second nitride semiconductor layer having a smaller band gap than the first nitride semiconductor layer; and a first semiconductor device having a fifth surface provided on the fourth surface and facing the fourth surface with a size equal to or smaller than a size of the fourth surface, the first semiconductor device including a first semiconductor material having a smaller band gap than the second nitride semiconductor layer.Type: ApplicationFiled: September 7, 2021Publication date: March 10, 2022Inventors: Yasuhiro ISOBE, Hung HUNG, Akira YOSHIOKA, Toru SUGIYAMA, Hitoshi KOBAYASHI, Tetsuya OHNO, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA
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Patent number: 11264899Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is denoType: GrantFiled: January 17, 2020Date of Patent: March 1, 2022Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hung Hung, Yasuhiro Isobe
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Patent number: 11251298Abstract: A semiconductor device of an embodiment includes: a first nitride semiconductor layer of a first conductive type; a second nitride semiconductor layer which is the first conductive type and is provided on the first nitride semiconductor layer; a third nitride semiconductor layer which is a second conductive type and is provided on the second nitride semiconductor layer; a fourth nitride semiconductor layer which is the first conductive type and is provided on the third nitride semiconductor layer; and a first electrode provided in a trench provided in the second nitride semiconductor layer, the third nitride semiconductor layer, and the fourth nitride semiconductor layer, via a first insulating film.Type: GrantFiled: February 25, 2020Date of Patent: February 15, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Yasuhiro Isobe, Hung Hung, Masaaki Onomura
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Patent number: 11162883Abstract: The present invention makes it possible to easily obtain a compressibility factor that is a characteristic of a fluid, and thereby dramatically improves the accuracy of flow rate measurement by an ROR system or the like. The invention is adapted to include: a chamber having a constant volume; a flow rate controller connected to the chamber so as to make it possible to introduce or lead a fluid into or out of the chamber at a constant flow rate; and an information processor adapted to calculate a compressibility factor depending on the pressure of the fluid on the basis of time changes in pressure inside the chamber when the fluid is introduced into the chamber at the same flow rate as each other through the flow rate controller under two different pressure conditions inside the chamber.Type: GrantFiled: December 13, 2017Date of Patent: November 2, 2021Assignee: HORIBA STEC, Co., Ltd.Inventor: Yasuhiro Isobe
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Publication number: 20210223090Abstract: In order to calibrate a flow rate instrument, the following is provided: introducing a fluid controlled by a flow rate control instrument to a certain set flow rate into a container via a piping member and calculating a first time rate of change in pressure in the container; introducing a fluid controlled by the flow rate control instrument to the set flow rate into a container via a piping member while making any of a capacity of the container into which the fluid is introduced, a number of containers into which the fluid is introduced, a temperature of the fluid, and a type of the fluid different, and calculating a second time rate of change in pressure in the container; and calculating a capacity of the piping member based on the first time rate of change in pressure and the second time rate of change in pressure.Type: ApplicationFiled: June 10, 2019Publication date: July 22, 2021Inventor: Yasuhiro ISOBE
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Publication number: 20210194475Abstract: Provided is a semiconductor device including: a normally-off transistor having a first electrode, a second electrode, and a first control electrode; a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode; a first capacitor having a first end and a second end electrically connected to the second control electrode; a Zener diode having a first anode and a first cathode, the first anode being electrically connected to the second end and the second control electrode, and the first cathode being electrically connected to the third electrode; a first resistor having a third end and a fourth end electrically connected to the first control electrode; a first diode having a second anode and a second cathode, the second anode being electrically connected to the third end; a second resistor having a fifth end electrically connected to the second cathode and a sixth end electrically connected to the fourth end and the first contType: ApplicationFiled: September 4, 2020Publication date: June 24, 2021Inventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hitoshi Kobayashi, Tetsuya Ohno
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Patent number: 10998433Abstract: A semiconductor device of an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer placed on the first nitride semiconductor layer; a first electrode placed on the second nitride semiconductor layer; a second electrode placed on the first nitride semiconductor layer; a gate electrode placed between the first electrode and the second electrode; a first field plate electrode placed on the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode; and a second field plate electrode provided on an upper side of the first field plate electrode, the second field plate electrode being placed on a side of the second electrode compared to the first field plate electrode.Type: GrantFiled: September 3, 2019Date of Patent: May 4, 2021Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Hung Hung, Yasuhiro Isobe, Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura
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Publication number: 20210083577Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is denoType: ApplicationFiled: January 17, 2020Publication date: March 18, 2021Applicants: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Akira YOSHIOKA, Toru SUGIYAMA, Masaaki IWAI, Naonori HOSOKAWA, Masaaki ONOMURA, Hung HUNG, Yasuhiro ISOBE
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Publication number: 20210083102Abstract: A semiconductor device of an embodiment includes: a first nitride semiconductor layer of a first conductive type; a second nitride semiconductor layer which is the first conductive type and is provided on the first nitride semiconductor layer; a third nitride semiconductor layer which is a second conductive type and is provided on the second nitride semiconductor layer; a fourth nitride semiconductor layer which is the first conductive type and is provided on the third nitride semiconductor layer; and a first electrode provided in a trench provided in the second nitride semiconductor layer, the third nitride semiconductor layer, and the fourth nitride semiconductor layer, via a first insulating film.Type: ApplicationFiled: February 25, 2020Publication date: March 18, 2021Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Yasuhiro ISOBE, Hung Hung, Masaaki Onomura