Patents by Inventor Yasuhiro Sugawara

Yasuhiro Sugawara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6576946
    Abstract: Capacitors are stretched over a plurality of memory cells in the direction of a bit line in order to effectively utilize spaces between adjacent cells. In addition, by creating a cubic structure of each capacitor by adoption of a self-matching technique, the structure can be utilized more effectively. As a result, it is possible to assure a sufficient capacitor capacitance in spite of a limitation imposed by the fabrication technology and obtain an assurance of sufficient space between cells in a shrunk area of a memory cell accompanying high-scale integration and miniaturization of a semiconductor device.
    Type: Grant
    Filed: July 20, 1999
    Date of Patent: June 10, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Misuzu Kanai, Yuzuru Ohji, Takuya Fukuda, Shinpei Iijima, Ryouichi Furukawa, Yasuhiro Sugawara, Hideharu Yahata
  • Patent number: 6544834
    Abstract: An integrated semiconductor device has an improved reliability and is adapted to a higher degree of integration without reducing the accumulated electric charge of each information storage capacity element. The semiconductor device is provided with a DRAM having memory cells, each comprising an information storage capacity element C connected in series to a memory cell selection MISFET Qs formed on a main surface of a semiconductor substrate 1 and having a lower electrode 54, a capacity insulating film 58 and an upper electrode 59. The lower electrode 54 is made of ruthenium film oriented in a particular plane bearing, e.g., a (002) plane, and the capacity insulating film 58 is made of a polycrystalline tantalum film obtained by thermally treating an amorphous tantalum oxide film containing crystal of tantalum oxide in an as-deposited state for crystallization.
    Type: Grant
    Filed: December 19, 2000
    Date of Patent: April 8, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Yasuhiro Sugawara, Shinpei Iijima, Yuzuru Oji, Naruhiko Nakanishi, Misuzu Kanai, Masahiko Hiratani
  • Publication number: 20030038325
    Abstract: A first silicon film is so formed as to extend along the inner surface of trenches 52 formed in a silicon oxide film 50, an oxide film is formed on the surface of the first silicon film, and a second amorphous silicon film is further deposited. Heat-treatment is applied to the surface of the second amorphous silicon film for seeding silicon nuclei and for promoting grain growth, and a granular silicon crystal 57 is grown from the second amorphous silicon film. In this way, the resistance of a lower electrode 59 of a capacitance device can be lowered.
    Type: Application
    Filed: October 17, 2002
    Publication date: February 27, 2003
    Inventors: Yasuhiro Sugawara, Ryouichi Furukawa, Toshio Uemura, Akira Takamatsu, Hirohiko Yamamoto, Tadanori Yoshida, Masayuki Ishizaka, Shinpei Iijima, Yuzuru Ohji
  • Patent number: 6524927
    Abstract: A first silicon film is so formed as to extend along the inner surface of trenches 52 formed in a silicon oxide film 50, an oxide film is formed on the surface of the first silicon film, and a second amorphous silicon film is further deposited. Heat-treatment is applied to the surface of the second amorphous silicon film for seeding silicon nuclei and for promoting grain growth, and a granular silicon crystal 57 is grown from the second amorphous silicon film. In this way, the resistance of a lower electrode 59 of a capacitance device can be lowered.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: February 25, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Yasuhiro Sugawara, Ryouichi Furukawa, Toshio Uemura, Akira Takamatsu, Hirohiko Yamamoto, Tadanori Yoshida, Masayuki Ishizaka, Shinpei Iljima, Yuzuru Ohji
  • Patent number: 6507026
    Abstract: A planar X-ray detector has an X-ray charge conversion film converting an incident X-ray into electric charges, pixel electrodes provided on the X-ray charge conversion film corresponding to respective pixels arranged in an array, switching elements connected to the respective pixel electrodes, signal lines, each of which is connected to a column of switching elements, scanning lines, each of which transmits driving signals to a row of switching elements, and a common electrode provided on the surface of the X-ray charge conversion film opposite to the surface on which the pixel electrodes are provided. The X-ray charge conversion film contains an X-ray sensitive material made of inorganic-semiconductor particles, and a carrier transport material made of an organic semiconductor.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: January 14, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsushi Ikeda, Masaki Atsuta, Akira Kinno, Manabu Tanaka, Yasuhiro Sugawara
  • Publication number: 20020153491
    Abstract: An X-ray flat panel detector includes sensor elements constituted by a plurality of effective pixels that detect X-rays and a plurality of dummy pixels that are arranged adjacent to the effective pixel area and generate electrical signals irrelevant to X-rays, signal lines which read out electrical signals from the respective pixels, scanning lines which scan the respective pixels, a first electrostatic wiring line which distributes static electricity accumulated in the signal lines, and a second electrostatic wiring line which distributes static electricity accumulated in the scanning lines. A plurality of dummy pixels are classified into a DA area where noise superposed on the signal lines are removed and a DB area where noise superposed on the scanning lines are removed. The first and second electrostatic wiring lines are laid out around the sensor elements, and physically disconnected between the DA area and the DB area.
    Type: Application
    Filed: April 23, 2002
    Publication date: October 24, 2002
    Inventors: Yasuhiro Sugawara, Takayuki Tomisaki, Manabu Tanaka, Akira Tsukamoto
  • Publication number: 20020149044
    Abstract: A semiconductor integrated circuit device including a memory cell comprising a memory cell selecting MISFET Qs formed on the main surface of a semiconductor substrate 1 and an information storage capacitor C that is connected in series to said memory cell selecting MISFET Qs, and that have a lower electrode 54, a capacitor insulator 58 and an upper electrode 59, wherein the lower electrode 54 is made of a conductive material containing ruthenium dioxide (RuO2) as principle ingredient and the capacitor insulator 58 is made of crystalline tantalum pentoxide. Thus, the capacitance required for the memory cells of a 256 Mbits DRAM or those of a DRAM of a later generation can be secured.
    Type: Application
    Filed: June 5, 2002
    Publication date: October 17, 2002
    Inventors: Naruhiko Nakanishi, Nobuyoshi Kobayashi, Yuzuru Ohji, Sinpei Iijima, Yasuhiro Sugawara, Misuzu Kanai
  • Publication number: 20010008271
    Abstract: A planar X-ray detector has an X-ray charge conversion film converting an incident X-ray into electric charges, pixel electrodes provided on the X-ray charge conversion film corresponding to respective pixels arranged in an array, switching elements connected to the respective pixel electrodes, signal lines, each of which is connected to a column of switching elements, scanning lines, each of which transmits driving signals to a raw of switching elements, and a common electrode provided on the surface of the X-ray charge conversion film opposite to the surface on which the pixel electrodes are provided. The X-ray charge conversion film contains an X-ray sensitive material made of inorganic semiconductor particles, and a carrier transport material made of an organic semiconductor.
    Type: Application
    Filed: January 10, 2001
    Publication date: July 19, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mitsushi Ikeda, Masaki Atsuta, Akira Kinno, Manabu Tanaka, Yasuhiro Sugawara
  • Patent number: 6097197
    Abstract: A conductive cantilever having a conductive probe on its free end is supported by a piezoelectric element, which oscillates upon reception of an AC voltage from a first AC voltage supply unit. An AC voltage is applied between a conductive sample and the probe by a variable DC voltage supply unit and a second AC voltage supply unit. An AM demodulator demodulates a signal from a displacement meter at an angular frequency of the first AC voltage supply unit. A lowpass filter extracts a DC component from an output signal from the AM demodulator, and a synchronism detector extracts a component concerning to the angular frequency twice as high as that of the second AC voltage supply unit from the AM demodulator output signal. A Z controller controls a position of a tube scanner based on an output signal from the subtracter which subtracts an output signal of the synchronism detector from an output signal of the lowpass filter.
    Type: Grant
    Filed: August 6, 1997
    Date of Patent: August 1, 2000
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Katsuhiro Matsuyama, Nobuaki Sakai, Seizo Morita, Yasuhiro Sugawara
  • Patent number: 5655067
    Abstract: In an animation generating method wherein a component of an apparatus to be designed is defined by an instance of an object-oriented program and a figure is allocated to said instance on a computer, and further an animation method for varying a representation of said figure in connection with the operation of the instance is interactively generated, a designation is made of either a slot of said instance, or a method argument of a method effected to said instance, and further a designation is made of a figure attribute of a figure to be changed in an animation representation. In response to this, an animation method for changing the figure attribute is automatically generated with refererence to the slot of the instance, or the method argument of the method effected to the instance.
    Type: Grant
    Filed: August 1, 1994
    Date of Patent: August 5, 1997
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corporation
    Inventors: Hisashi Takahashi, Katsuhiko Yuura, Shoichi Kubo, Yasuhiro Sugawara
  • Patent number: 5296729
    Abstract: There is provided a technique capable of reducing the electrode resistance by widening the effective area of an electrode in a cell for a standard potential supply connected to the memory cell. There is also provided a technique capable of reducing the memory cell area by reducing the area necessary for separation between the electrode in a cell for the standard potential supply and adjacent other electrodes. Two transfer MOS transistors of a first conductivity type and two driver MOS transistors are provided. A conductive layer for fixing the source potential of the driver MOS transistors to standard potential is so disposed above the transfer and driver MOS transistors as to the wholly cover the memory cell. Separation is carried out by using a photo-mask having an optically transparent substrate provided within the same transmissive portion with a pattern of a plurality of so-called phase shifter regions for inversion of the phase of transmitting light.
    Type: Grant
    Filed: October 25, 1991
    Date of Patent: March 22, 1994
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Toshiaki Yamanaka, Norio Hasegawa, Toshihiko Tanaka, Takashi Hashimoto, Koichiro Ishibashi, Naotaka Hashimoto, Akihiro Shimizu, Yasuhiro Sugawara, Tokuo Kure, Shimpei Iijima, Takashi Nishida, Eiji Takeda
  • Patent number: 5289004
    Abstract: A scanning probe microscope comprises a cantilever having a conductive probe positioned near a sample, an actuator for moving the sample to and away from the probe, a circuit for applying a bias voltage between the probe and sample to produce a tunnel current therebetween, a circuit for detecting the produced tunnel current, a circuit for detecting the amount of displacement of the probe resultant from interatomic forces acting between atomics of the probe and sample, thereby producing signals, a circuit for providing the actuator for feedback in response to the output signals from the circuit to retain constant the distance between the probe and sample, thereby causing the actuator to move the sample, a circuit for forming an STS image data from the detected tunnel current, a circuit for forming an STM image data from the detected tunnel current, and a circuit for forming an AFM image data. Thus, the STS, STP and AFM images are separately obtained simultaneously.
    Type: Grant
    Filed: April 10, 1992
    Date of Patent: February 22, 1994
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Takao Okada, Akira Yagi, Yasuhiro Sugawara, Seizo Morita, Tsugiko Takase