Patents by Inventor Yasuhiro Takai
Yasuhiro Takai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7660544Abstract: In one embodiment of the invention, in an image forming apparatus that reverses the front and back of recording paper by performing switchback transport of the recording paper to perform duplex printing of the recording paper, the image forming apparatus is provided with a control means that, when performing duplex printing of the recording paper, forms a void area at a leading end and a trailing end of the recording paper, the void area preventing curling of the recording paper around a roller.Type: GrantFiled: July 9, 2007Date of Patent: February 9, 2010Assignee: Sharp Kabushiki KaishaInventors: Masahiko Fujita, Tadasu Taniguchi, Norichika Katsura, Yasunobu Ohkawa, Yasuhiro Takai
-
Patent number: 7650087Abstract: The purpose is to provide a control method of driving toner containers for use in an apparatus including a plurality of toner containers each filled with toner and detachably mounted thereinto from a toner container covering structure; and a toner supply device for supplying toner to a developing unit while rotating the plurality of toner container. This method includes the step of detecting a first toner container whose toner has run out, among the plurality of toner containers. When the first toner container has been detected, this method makes a control including the steps of: opening the toner container covering structure; stopping the rotational motion of the first toner container; and continuing the rotational motion of a second toner container or containers other than the first toner container.Type: GrantFiled: July 10, 2007Date of Patent: January 19, 2010Assignee: Sharp Kabushiki KaishaInventors: Jinichi Nagata, Yasunobu Ohkawa, Yasuhiro Takai
-
Patent number: 7642826Abstract: A DLL circuit comprising: delay circuits which output first and second delayed clock signals obtained by delaying the reference clock signal by a delay times selected according to control signals; an interpolation circuit which interpolates a phase difference between the delayed clock signals to output an internal clock signal; an output circuit which generates a predetermined signal; a dummy output circuit which has the same transmission characteristics as the output circuit and outputs a feedback clock signal having the same phase as the predetermined signal; a phase comparison circuit which compares phases of the reference clock signal and the feedback clock signal; delay control circuits which controls the control signals in a direction where both phases are equal; wherein the delay time of the second delayed clock signal is larger than the first delayed clock signal by an amount equivalent to one cycle of the reference clock signal.Type: GrantFiled: March 6, 2007Date of Patent: January 5, 2010Assignee: Elpida Memory, Inc.Inventor: Yasuhiro Takai
-
Publication number: 20090289676Abstract: A DLL circuit includes a coarse delay adjustment circuit and a fine delay adjustment circuit, which further includes a first fine delay circuit and a second fine delay circuit serving as an interpolation circuit. The coarse delay adjustment circuit delays a reference clock signal by a plurality of delay stages so as to provide the first fine delay circuit with two phase signals having the phase difference of two delay stages, which are then converted into two delay signals having the phase difference of one delay stage. The delay signals are subjected to interpolation, thus producing an output clock signal. Due to a reduction of the phase difference in the first fine delay circuit, it is possible to reduce the minimum operation cycle of the interpolation circuit and to thereby increase the maximum operation frequency of the DLL circuit.Type: ApplicationFiled: May 21, 2009Publication date: November 26, 2009Inventor: Yasuhiro Takai
-
Publication number: 20090289689Abstract: A signal output circuit adapted to a selector circuit is constituted of an inverter circuit which activates propagation of an input signal therethrough in an active level of a control signal and which inactivates it in an inactive level of the control signal, and a control circuit which maintains the input terminal of the inverter circuit at a predetermined potential irrespective of the level of the input signal in the inactive level of the control signal. This achieves high-speed and high-precision propagation of the input signal. The selector circuit is formed using a plurality of signal output circuits so as to selectively output one of first and second input signals in response to the control signal.Type: ApplicationFiled: May 20, 2009Publication date: November 26, 2009Applicant: Elpida Memory, Inc.Inventor: Yasuhiro Takai
-
Publication number: 20090289679Abstract: A duty correction circuit is formed using at least one delay circuit, which is constituted of a first inverter including three transistors of different conduction types and a second inverter including three other transistors of different conduction types and which delays and adjusts an input clock signal at the leading-edge/trailing-edge timing so as to convert it into an output clock signal based on a first or second bias voltage produced by a bias circuit detecting the duty ratio of the output clock signal. The duty correction circuit decreases the high-level period of the output clock signal having a high duty ratio based on the first bias voltage. Alternatively, the duty correction circuit increases the high-level period of the output clock signal having a low duty ratio based on the second bias voltage.Type: ApplicationFiled: May 18, 2009Publication date: November 26, 2009Applicant: ELPIDA MEMORY, INC.Inventors: Koji Kuroki, Yasuhiro Takai
-
Patent number: 7622960Abstract: A phase comparing circuit includes a first storage circuit for reading an external clock signal based on a control clock signal; first and second inverters for inverting a signal from the first storage circuit based respectively on first and second threshold levels; third and fourth inverters for inverting respective signals output from the first and second inverters; a delay circuit for delaying the control clock signal by a specific time; a coincidence control circuit for setting the delayed control clock signal to be active when the signals from the third and fourth inverters coincide with each other, and setting it to be inactive when the signals from the third and fourth inverters do not coincide with each other; and a second storage circuit for reading a signal output form the first storage circuit when the delayed control clock signal is active, and outputting the read signal as the control signal.Type: GrantFiled: March 5, 2008Date of Patent: November 24, 2009Assignee: Elpida Memory, Inc.Inventor: Yasuhiro Takai
-
Patent number: 7609984Abstract: The fixing device includes a pair of rotating bodies which conveys a recording medium between a nip; a heating unit which heats at least one of the rotating bodies; and a temperature detection unit which detects a temperature of at least one of the rotating bodies. The temperature detection unit detects a temperature change until an image forming apparatus is normally operated since the heating unit starts the heating, and the temperature change is stored. It is judged that the image forming apparatus is in an abnormal state when the temperature detection unit detects a temperature change different from the temperature change in the normal operation. A temperature control unit stops passage of current through the heating unit when it is judged that the image forming apparatus is in the abnormal state.Type: GrantFiled: January 19, 2007Date of Patent: October 27, 2009Assignee: Sharp Kabushiki KaishaInventors: Kohji Aoki, Toyoaki Nanba, Yoshinobu Tateishi, Yasuhiro Takai
-
Patent number: 7597323Abstract: A paper feeder comprises an acquiring device, a driving roller, driven rollers, a driven roller supporter, a driver, and a controller. The acquiring device acquires thickness information on a sheet of paper. The driving roller rotates by being supplied with torque. The driven rollers rotate with the driving roller when in compressive contact with the driving roller. The driven roller supporter so supports the driven rollers that each of them can rotate under a different rotational load. The driver changes the position of the driven roller supporter relative to the driving roller. The controller selects one of the driven rollers on the basis of the thickness information and so activates the driver as to bring the selected roller into compressive contact with the driving roller.Type: GrantFiled: July 24, 2007Date of Patent: October 6, 2009Assignee: Sharp Kabushiki KaishaInventors: Tadasu Taniguchi, Norichika Katsura, Masahiko Fujita, Yasunobu Ohkawa, Masaya Asakawa, Yasuhiro Takai
-
Patent number: 7599647Abstract: In an image forming apparatus of the present invention, a scorotron charging device has a meshed grid electrode which is meshed more coarsely in a high-speed apparatus than a meshed grid electrode in a low-speed apparatus according to a circumferential velocity of a photoreceptor. With this arrangement, it is possible to charge the photoreceptor at a predetermined potential in the high-speed apparatus, without increase of the amount of ozone generation and upsizing of the image forming apparatus.Type: GrantFiled: October 26, 2006Date of Patent: October 6, 2009Assignee: Sharp Kabushiki KaishaInventors: Toshiki Takiguchi, Tatsuya Inoue, Hirokazu Yamauchi, Kazuhiro Matsuyama, Yasuhiro Takai
-
Patent number: 7570896Abstract: In a fixing apparatus of the present invention, an end section fixing control temperature changing section selects an end section fixing control temperature in accordance with the number of paper sheets that have been processed in one continuous printing process. A sub-heater on/off determining section turns on or off a sub-heater in accordance with a temperature detected by an end section temperature sensor and the end section fixing control temperature selected by the end section fixing control temperature changing section. This prevents the occurrence of fixing failure even in continuous printing with respect to large-size paper sheets in an arrangement in which a temperature sensor is disposed outside a maximum-size sheet passing region at an end section of a fixing roller and controls energization of a heater which is disposed corresponding to the end section of the fixing roller in accordance with a temperature detected by the temperature sensor.Type: GrantFiled: February 23, 2007Date of Patent: August 4, 2009Assignee: Sharp Kabushiki KaishaInventors: Toshiya Mikita, Atsushi Ide, Kohji Aoki, Yasuhiro Takai
-
Publication number: 20090180341Abstract: Disclosed is a semiconductor device including a first clock generator that generates a first clock signal having a first period from an input clock signal, a second clock generator that generates a second clock signal having a second period from the input clock signal, and a timing generator that receives the first clock signal, the second clock signal, an activation signal from a command decoder and a selection signal for selecting the delay time from a timing register to produce a timing signal delayed as from activation of the activation signal by a delay equal to a sum of a time equal to a preset number m prescribed by the selection signal times the first period and a time equal to another preset number n prescribed by the selection signal times the second period. The timing register holds the values of m and n. These values are set in the timing register in an initialization sequence at the time of a mode register set command.Type: ApplicationFiled: December 17, 2008Publication date: July 16, 2009Inventors: Akira Ide, Yasuhiro Takai, Tomonori Sekiguchi, Riichiro Takemura, Satoru Akiyama, Hiroaki Nakaya
-
Patent number: 7561840Abstract: First eccentric cams for abutting an inner circumferential surface of an intermediate image transferring belt, second eccentric cams for rotating as a unit with the first eccentric cams, cam followers for abutting a circumferential surface of the second eccentric cam, and transmitting members for holding image transferring rollers, moving in response to the cam followers are disposed within a loop-shaped moving path formed by an intermediate image transferring belt, which is stretched across a driving roller and a driven roller. The vertical position of the image transferring rollers, which are held by the transmitting members, changes in accordance with the abutting state of the first eccentric cams with respect to an inner circumferential surface of the intermediate image transferring belt.Type: GrantFiled: October 1, 2004Date of Patent: July 14, 2009Assignee: Sharp Kabushiki KaishaInventors: Shigenori Morimoto, Masanori Yamada, Yasuhiro Takai
-
Publication number: 20090146716Abstract: A timing control circuit DLY1 receives clock signal CKa with period T1 and activation signal ACT and outputs fine timing signal FT with delay of m*T1+tda measured from the clock signal where m denotes a non-negative integer and tda denotes delay in the analog delay element. The timing control circuit DLY1 comprises a coarse delay circuit CD and a fine delay circuit FD. The coarse delay circuit CD comprises a counter for counting a rising edge of the clock signal CKa after receiving activation signal ACT and outputs coarse timing signal CT with delay of m*T1 measured from a rising edge of the clock signal CKa. The fine delay circuit FD comprises a plurality of analog delay elements and outputs fine delay timing signal FT with delay of tda measured from the coarse timing signal CT. Variation in delay of timing signal is reduced.Type: ApplicationFiled: December 5, 2008Publication date: June 11, 2009Inventors: Akira Ide, Yasuhiro Takai, Akira Kotabe, Tomonori Sekiguchi, Riichiro Takemura, Satoru Akiyama
-
Patent number: 7536122Abstract: A toner supply device which includes: a multiple number of toner bottles; and a toner supply assembly mounting mechanism having the toner bottles mounted thereon and feeding toner discharged from the toner bottles to a developing unit and is controlled so as to supply toner to the developing unit in accordance with the amount of toner consumed in the process of printing of the developing unit, further includes: micro switches which each detect the amount of toner left in the toner storing portion with toner filled therein; and a controller for controlling the operation of the toner supply device, which selects one of the toner bottles to be used for supply of toner to a toner feed device, based on the amounts of toner in the multiple toner bottles, which are detected by the micro switches.Type: GrantFiled: March 2, 2007Date of Patent: May 19, 2009Assignee: Sharp Kabushiki KaishaInventors: Yasunobu Ohkawa, Yasuhiro Takai
-
Publication number: 20090102524Abstract: Disclosed is a timing control circuit that receives a first clock having a period T1, a group of second clocks of L different phases spaced apart from each other at substantially equal intervals and selection signals m, n supplied thereto and generates a fine timing signal delayed from the rising edge of the first clock signal by a delay td of approximately td=m·T1+n·(T2/L). The timing control circuit includes a coarse delay circuit and a fine delay circuit. The coarse delay circuit includes a counter for counting a rising edge of the first clock signal after an activate signal is activated and generates a coarse timing signal whose amount of delay from the first clock signal is approximately m·T1.Type: ApplicationFiled: September 11, 2008Publication date: April 23, 2009Applicant: ELPIDA MEMORY, INCInventors: Akira Ide, Yasuhiro Takai, Tomonori Sekiguchi, Riichiro Takemura, Satoru Akiyama, Hiroaki Nakaya
-
Patent number: 7520504Abstract: A paper processing device includes a processing unit, a paper ejection roller, a sorting mechanism, a paper overlapping mechanism, and a control unit. The processing unit performs predetermined processing upon sheets of paper being conveyed one at a time along a paper conveyance direction. The roller discharges the sheets in the paper conveyance direction, after completion of processing by the processing unit. The sorting mechanism shifts the roller to and fro between an initial position and a sorting position in a direction orthogonal to the paper conveyance direction. The overlapping mechanism superimposes, between the processing unit and the roller in the paper conveyance direction, a predetermined number of sheets of paper upon which processing has been completed. The control unit superimposes a predetermined number of sheets of paper by operating the overlapping mechanism, before shifting the roller from the initial position to the sorting position with the sorting mechanism.Type: GrantFiled: November 1, 2006Date of Patent: April 21, 2009Assignee: Sharp Kabushiki KaishaInventors: Yasushi Matsutomo, Haruo Sayama, Kiwamu Morita, Michihiro Yamashita, Yuriko Kamei, Yasuhiro Takai
-
Patent number: 7519306Abstract: A fixing control section of a fixing apparatus according to the present invention includes an end section priority temperature control mode. In the end section priority temperature control mode, the fixing control section temporarily turns off a main heater heating a center section of a fixing roller among a plurarity of heaters disposed inside the fixing roller in a case where a surface temperature of the end section of the fixing roller has reached a preset upper-limit fixing temperature, even if the surface temperature of the center section of the fixing roller is lower than a preset fixing temperature. As a result, destruction of the fixing roller can be prevented by a simple arrangement in the fixing apparatus which includes a plurarity of the heaters disposed inside the fixing roller.Type: GrantFiled: February 27, 2007Date of Patent: April 14, 2009Assignee: Sharp Kabushiki KaishaInventors: Noriko Inoue, Atsushi Ide, Kohji Aoki, Yasuhiro Takai
-
Publication number: 20090086551Abstract: Disclosed is a semiconductor device in which In case a data group output from a first output pin in a first word configuration is output from the first output pin and a second output pin in a second word configuration, and a data group output from a third output pin in a first word configuration is output from the third output pin and a fourth output pin in a second word configuration, the second output pin is arranged adjacent to the first output pin, and the fourth output pin is arranged adjacent to the third output pin.Type: ApplicationFiled: September 30, 2008Publication date: April 2, 2009Inventors: Akira Ide, Yasuhiro Takai, Riichiro Takemura, Tomonori Sekiguchi
-
Publication number: 20090066390Abstract: Disclosed is a timing control circuit which receives a first clock having a period T1 and a group of second clocks of L different phases (where L is a positive integer) spaced apart from each other at substantially equal intervals and which generates a fine timing signal delayed from the rising edge of the first clock by a delay td of approximately td=m·T1+n·(T2/L), where m and n are non-negative integers. The timing control circuit has a coarse delay circuit and a fine delay circuit. The coarse delay circuit counts the rising edges of the first clock after an activate signal is activated and generates a coarse timing signal delayed from the first clock by approximately m·T1. The fine delay circuit has a circuit which, after the activate signal is activated, detects a second clock, which has a rising edge that immediately follows the rising edge of the first clock, from among the group of L-phase second clocks.Type: ApplicationFiled: September 5, 2008Publication date: March 12, 2009Applicant: ELPIDA MEMORY, INC.Inventors: Akira IDE, Yasuhiro TAKAI, Tomonori SEKIGUCHI, Riichiro TAKEMURA, Satoru AKIYAMA, Hiroaki NAKAYA