Patents by Inventor Yasuhiro Takase
Yasuhiro Takase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7697224Abstract: An embodiment in accordance with the present invention enables storing in a memory, multi-bit data corresponding to analog signals read from a medium before being converted to single-bit data as recorded data. In an embodiment of the present invention, an AD converter is configured to convert analog signals from a magnetic disk to multi-bit data. A buffer circuit holds successively multi-bit data transferred from the AD converter toward a Viterbi decoder, and outputs the held plural multi-bit data in parallel. A SRAM for ECC is used for storing multi-bit data transferred from the buffer circuit.Type: GrantFiled: December 13, 2006Date of Patent: April 13, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Fuminori Sai, Yasuhiro Takase, Christopher Taylor
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Patent number: 7530009Abstract: A data storage device comprising a disk storage medium containing user data in a plurality of sectors wherein each of the plurality of sectors comprises a subdivision of a track, a head for writing or reading the user data and error correcting means for correcting an error that occurs in the user data during the reading process. The error correcting means comprises a syndrome generator for generating syndromes on the basis of the user data, a Euclid circuit, a chien search circuit and a verification circuit, and makes the error correction using a first error correcting code appended to each of a plurality of sectors and a second error correcting code appended to said sector for every block composed of a predetermined number of sectors.Type: GrantFiled: September 8, 2006Date of Patent: May 5, 2009Assignee: International Business Machines CorporationInventors: Katsuhiko Katoh, Takashi Kuroda, Hiroshi Uchiike, Yasuhiro Takase
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Publication number: 20080155379Abstract: An exclusive OR (XOR) of user data (sector) 0, user data (sector) 1 and user data (sector) 2 is performed to provide virtual user data, thereby giving rise to a correlation of the sectors 0 to 2, and the virtual user data is appended with a second error correcting code C2 having a greater error correction capability than a first error correcting code C1, whereby an error uncorrectable with C1 is correctable with C2.Type: ApplicationFiled: October 15, 2007Publication date: June 26, 2008Inventors: Katsuhiko Katoh, Takashi Kuroda, Hiroshi Uchiike, Yasuhiro Takase
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Publication number: 20080144207Abstract: An embodiment in accordance with the present invention enables storing in a memory, multi-bit data corresponding to analog signals read from a medium before being converted to single-bit data as recorded data. In an embodiment of the present invention, an AD converter is configured to convert analog signals from a magnetic disk to multi-bit data. A buffer circuit holds successively multi-bit data transferred from the AD converter toward a Viterbi decoder, and outputs the held plural multi-bit data in parallel. A SRAM for ECC is used for storing multi-bit data transferred from the buffer circuit.Type: ApplicationFiled: December 13, 2006Publication date: June 19, 2008Applicant: Hitachi Global Storage Technologies Netherlands B. V.Inventors: Fuminori Sai, Yasuhiro Takase, Christopher Taylor
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Publication number: 20080141099Abstract: An exclusive OR (XOR) of user data (sector) 0, user data (sector) 1 and user data (sector) 2 is performed to provide virtual user data, thereby giving rise to a correlation of the sectors 0 to 2, and the virtual user data is appended with a second error correcting code C2 having a greater error correction capability than a first error correcting code C1, whereby an error uncorrectable with C1 is correctable with C2.Type: ApplicationFiled: October 15, 2007Publication date: June 12, 2008Inventors: Katsuhiko Katoh, Takashi Kuroda, Hiroshi Uchiike, Yasuhiro Takase
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Patent number: 7330015Abstract: The power generation controller, which is for regulating an output voltage of a vehicle generator or a battery voltage of a vehicle battery charged by the vehicle generator by controlling an excitation current flowing into an excitation winding of the vehicle generator, includes a switching element connected in series between an output terminal of the vehicle generator and the excitation winding, a voltage control circuit on/off controlling the switching element such that one of the output voltage of the vehicle generator and the battery voltage is kept at a target voltage, and a contact abnormality detector circuit detecting a voltage of the output terminal as the output voltage of the vehicle generator, and detecting abnormality in a contact state between the power generation controller and the output terminal on the basis of the detected output voltage of the vehicle generator.Type: GrantFiled: March 13, 2006Date of Patent: February 12, 2008Assignee: Denso CorporationInventors: Yasuhiro Takase, Tadatoshi Asada, Koji Tanaka
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Publication number: 20080025178Abstract: Embodiments of the present invention provide a data recording apparatus, recording medium and error detection method capable of detecting an error while a ratio of an error detecting code to a data string recorded in the recording medium is restrained. According to one embodiment, since a recording composite code CX smaller in size than the case where error detecting codes generated from data sectors are connected to the data sectors (small sectors) D0 to D7 is added to data string, enough capacity is ensured to record the user data on a magnetic disk.Type: ApplicationFiled: July 25, 2007Publication date: January 31, 2008Applicant: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Yasuhiro Takase, Yoshiteru Ishida
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Publication number: 20080016429Abstract: Embodiments in accordance with the present invention increase the reliability of a data storage device, and to reduce the circuit size. According to one embodiment of the present invention, a hard disk drive (HDD) executes not only error correction processing of data to be written to a magnetic disk, but also error correction processing of data stored in the DRAM. In the HDD according to this embodiment, one SRAM is shared by both kinds of error correction processing. As a result of executing the error correction processing of the data stored in the DRAM, the reliability of the HDD is improved. In addition, by using the same SRAM for the two kinds of error correction processing that differ from each other, it is possible to suppress the increase in circuit size.Type: ApplicationFiled: April 12, 2007Publication date: January 17, 2008Applicant: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Kenichi Saneshige, Yasuhiro Takase, Haruo Andoh, Tomoharu Maeno
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Publication number: 20070022359Abstract: The exclusive OR (XOR) of user data (sector) 0, user data (sector) 1 and user data (sector) 2 is taken to have the virtual user data, thereby giving rise to a correlation of the sectors 0 to 2, and its virtual user data is appended with C2 having a greater error correction capability than C1, whereby an error uncorrectable with C1 is correctable with C2.Type: ApplicationFiled: September 8, 2006Publication date: January 25, 2007Inventors: Katsuhiko Katoh, Takashi Kuroda, Hiroshi Uchiike, Yasuhiro Takase
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Publication number: 20060232247Abstract: The power generation controller, which is for regulating an output voltage of a vehicle generator or a battery voltage of a vehicle battery charged by the vehicle generator by controlling an excitation current flowing into an excitation winding of the vehicle generator, includes a switching element connected in series between an output terminal of the vehicle generator and the excitation winding, a voltage control circuit on/off controlling the switching element such that one of the output voltage of the vehicle generator and the battery voltage is kept at a target voltage, and a contact abnormality detector circuit detecting a voltage of the output terminal as the output voltage of the vehicle generator, and detecting abnormality in a contact state between the power generation controller and the output terminal on the basis of the detected output voltage of the vehicle generator.Type: ApplicationFiled: March 13, 2006Publication date: October 19, 2006Applicant: Denso CorporationInventors: Yasuhiro Takase, Tadatoshi Asada, Koji Tanaka
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Patent number: 7107510Abstract: The exclusive OR (XOR) of user data (sector) 0, user data (sector) 1 and user data (sector) 2 is taken to have the virtual user data, thereby giving rise to a correlation of the sectors 0 to 2, and its virtual user data is appended with C2 having a greater error correction capability than C1, whereby an error uncorrectable with C1 is correctable with C2.Type: GrantFiled: April 10, 2003Date of Patent: September 12, 2006Assignee: International Business Machines CorporationInventors: Katsuhiko Katoh, Takashi Kuroda, Hiroshi Uchiike, Yasuhiro Takase
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Patent number: 7061247Abstract: A power generating system for a vehicle is configured to include a power generator, a voltage control device which controls an output voltage of the power generator, a battery which is charged by output power of the power generator, and an ECU which transmits a power generation suppression signal for suppressing power generation by the power generator when a predetermined condition is satisfied toward the voltage control device. The ECU detects a state of the battery, and inhibits transmission of the power generation suppression signal when quantity of this state is below a predetermined value.Type: GrantFiled: January 14, 2004Date of Patent: June 13, 2006Assignee: Denso CorporationInventors: Takatoshi Inokuchi, Yasuhiro Takase, Hiroshi Shibata, Makoto Taniguchi, Atsushi Ichikawa
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Patent number: 6912101Abstract: The present invention is a semiconductor device that includes a DRAM and an internal mask ROM that are implemented on a single integrated circuit substrate. The semiconductor further includes a terminal coupled to an external ROM and a selector for choosing an external ROM or an internal mask ROM for program code loading. If an external ROM is coupled to the aforementioned terminal, the external ROM is given precedence for use in the loading of the aforementioned program code. The control method of the present invention pertains to a semiconductor device including a DRAM, an internal mask ROM, a terminal coupled to an external ROM, a selector for choosing the first path led from the internal mask ROM or the second path led from the terminal, and a coupling determiner deciding whether or not the terminal is coupled to the external ROM.Type: GrantFiled: March 27, 2001Date of Patent: June 28, 2005Assignee: International Business Machines CorporationInventors: Masayuki Murakami, Tatsuya Sakai, Yasuhiro Takase
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Publication number: 20040145186Abstract: A power generating system for a vehicle is configured to include a power generator, a voltage control device which controls an output voltage of the power generator, a battery which is charged by output power of the power generator, and an ECU which transmits a power generation suppression signal for suppressing power generation by the power generator when a predetermined condition is satisfied toward the voltage control device. The ECU detects a state of the battery, and inhibits transmission of the power generation suppression signal when quantity of this state is below a predetermined value.Type: ApplicationFiled: January 14, 2004Publication date: July 29, 2004Applicant: DENSO CORPORATIONInventors: Takatoshi Inokuchi, Yasuhiro Takase, Hiroshi Shibata, Makoto Taniguchi, Atsushi Ichikawa
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Publication number: 20030218816Abstract: ObjetType: ApplicationFiled: April 10, 2003Publication date: November 27, 2003Applicant: International Business Machines CorporationInventors: Katsuhiko Katoh, Takashi Kuroda, Hiroshi Uchiike, yasuhiro Takase
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Patent number: 6429704Abstract: A power consumption reduction circuit includes a clock frequency downconverting circuit. The clock frequency downconverting circuit downconverts a frequency of a CK signal, which is inputted, when a POR signal inputted is asserted, and outputs the CK signal to an IC selection circuit. In addition, if the POR signal inputted is negated, the clock frequency downconverting circuit outputs the CK signal inputted as it is to the IC selection circuit. A signal outputted from the clock frequency downconverting circuit is supplied to a plurality of ICs through the IC selection circuit.Type: GrantFiled: September 28, 2000Date of Patent: August 6, 2002Assignee: International Business Machines CorporationInventors: Toshio Kanai, Masayuki Murakami, Yasuhiro Takase
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Publication number: 20010040750Abstract: The present invention is a semiconductor device that includes a DRAM and an internal mask ROM that are implemented on a single integrated circuit substrate. The semiconductor further includes a terminal coupled to an external ROM and a selector for choosing an external ROM or an internal mask ROM for program code loading. If an external ROM is coupled to the aforementioned terminal, the external ROM is given precedence for use in the loading of the aforementioned program code. The control method of the present invention pertains to a semiconductor device including a DRAM, an internal mask ROM, a terminal coupled to an external ROM, a selector for choosing the first path led from the internal mask ROM or the second path led from the terminal, and a coupling determiner deciding whether or not the terminal is coupled to the external ROM.Type: ApplicationFiled: March 27, 2001Publication date: November 15, 2001Inventors: Masayuki Murakami, Tatsuya Sakai, Yasuhiro Takase
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Patent number: 6043632Abstract: A permanent magnet made of ferrite magnet material used for a generator may be irreversibly demagnetized by a factor such as current supplied to a field coil, temperature of the permanent magnet and/or output current of an armature coil. When the field current exceeds a preset value, and also the output current exceeds a preset value, the field current is limited to prevent the irreversible demagnetization. Thus, the irreversible demagnetization of the permanent magnet can be prevented, while ensuring a sufficient amount of the output power. It is also effective that the field current or armature current is limited when the temperature of the permanent magnet is in a range of possible irreversible demagnetization.Type: GrantFiled: June 5, 1997Date of Patent: March 28, 2000Assignee: Denso CorporationInventors: Fuyuki Maehara, Yasuhiro Takase, Wakako Kanazawa, Tadatoshi Asada, Hiroaki Ishikawa, Toshinori Maruyama
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Patent number: 6014276Abstract: A servo mark detection device includes a synchronizing circuit, first and second shift registers, a frame pattern detection circuit, a control circuit, and a servo mark comparator. The synchronizing circuit detects a peak of the signal amplitude of a data pattern and outputs a synchronization data signal synchronized with a clock. The first shift register sequentially stores the synchronization data signal and outputs a latch data signal. The detection circuit determines the frame pattern of the latch data signal, outputs a determination data signal, determines a phase shift of the latch data signal with respect to the clock, and outputs a phase correction signal. The control circuit outputs a frame pulse signal at a predetermined clock period, outputs a frame pulse signal at a timing corrected with respect to the predetermined clock period on the basis of the phase correction signal, and outputs a check window signal when a predetermined number of frame pulse signals are output.Type: GrantFiled: December 22, 1997Date of Patent: January 11, 2000Assignee: NEC CorporationInventor: Yasuhiro Takase
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Patent number: 5767636Abstract: To provide a vehicle power generating apparatus capable of transmitting plural kinds of control signals from an external control device to a generated voltage control unit provided in a generator for power generation control while curbing increases in the size of apparatus or wiring required and without degrading the noise reduction characteristics, a generated voltage control device is normally disposed integrally with a generator for maintaining the generated voltage at a predetermined target level. For transmission of a vehicle condition signal from an external control device to the generated voltage control device, the vehicle condition signal is converted into a binary pulse train signal before being transmitted. The generated voltage control device holds the binary pulse train signal received or a vehicle condition signal decoded from the binary pulse signal until the next reception. Thereby, complicated power generation control can be achieved with a small amount of communications.Type: GrantFiled: January 30, 1996Date of Patent: June 16, 1998Assignee: Nippondenso Co., Ltd.Inventors: Wakako Kanazawa, Fuyuki Maehara, Yasuhiro Takase