Patents by Inventor Yasuhiro Yoshikawa

Yasuhiro Yoshikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090090987
    Abstract: An MEMS element (A1) includes a substrate (1), and a first electrode (2) formed on the substrate (1). The MEMS element (A1) further includes a second electrode (3) including a movable portion (31) spaced from the first electrode (2) and facing the first electrode. The movable portion (31) is formed with a plurality of through-holes (31a). Each of the through-holes (31a) may have a rectangular cross section.
    Type: Application
    Filed: May 19, 2006
    Publication date: April 9, 2009
    Applicant: ROHM CO., LTD.
    Inventors: Yasuhiro Yoshikawa, Hiroyuki Tajiri
  • Publication number: 20080237848
    Abstract: There is provided a semiconductor device which makes equalization of wirings between address system chips easy and reduce the influence of crosstalk noise and capacitive coupling noise among data system wirings for connecting the chips. There are mounted, on a module board, a plurality of stacked memory chips which a data processor chip simultaneously accesses. Address system bonding pads to which a plurality of memory chips correspond are commonly coupled by a wire to a bonding lead at one end of the module board wiring whose other end is coupled by a wire to an address system bonding pads of the data processor. Data system bonding pads of the data processor chip are individually coupled to data system bonding pads of the memory chip.
    Type: Application
    Filed: January 25, 2008
    Publication date: October 2, 2008
    Inventors: Yasuhiro Yoshikawa, Motoo Suwa, Kazuyuki Sakata
  • Publication number: 20070120245
    Abstract: Mutual inductance from an external output signal system to an external input signal system, in which parallel input/output operation is enabled, is reduced. A semiconductor integrated circuit has a plurality of external connection terminals facing a package substrate, and has an external input terminal and an external output terminal, in which parallel input/output operation is enabled, as part of the external connection terminals. The package substrate has a plurality of wiring layers for electrically connecting between the external connection terminals and module terminals corresponding to each other. A first wiring layer facing the semiconductor integrated circuit has a major wiring for connecting between the external input terminal and a module terminal corresponding to each other, and a second wiring layer in which the module terminals are formed has a major wiring for connecting between an external output terminal and a module terminal corresponding to each other.
    Type: Application
    Filed: November 27, 2006
    Publication date: May 31, 2007
    Inventors: Yasuhiro YOSHIKAWA, Motoo Suwa, Hiroshi Toyoshima
  • Patent number: 7164592
    Abstract: A wiring board includes a plurality of wiring layers, and one surface formed with a plurality of chip connecting electrodes and another surface formed with a plurality of external connecting electrodes of a semiconductor device. The wiring board has wiring layers and vias. The plurality of chip connecting electrodes include first chip connecting electrodes, each used for a first signal whose logic value changes, and second chip connecting electrodes, each used for a second signal that changes after a change timing of the first signal. A wiring layer in which wiring routing of paths extending from the first chip connecting electrodes to their corresponding first external connecting electrodes is performed, and a wiring layer in which wiring routing of paths extending from the second chip connecting electrodes disposed adjacent to the first chip connecting electrodes to their corresponding second external connecting electrodes is performed, are made different from each other.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: January 16, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Yasuhiro Yoshikawa, Motoo Suwa, Hiroaki Nambu
  • Publication number: 20050258532
    Abstract: A wiring board includes a plurality of wiring layers, and one surface formed with a plurality of chip connecting electrodes and another surface formed with a plurality of external connecting electrodes of a semiconductor device. The wiring board has wiring layers and vias. The plurality of chip connecting electrodes include first chip connecting electrodes, each used for a first signal whose logic value changes, and second chip connecting electrodes, each used for a second signal that changes after a change timing of the first signal. A wiring layer in which wiring routing of paths extending from the first chip connecting electrodes to their corresponding first external connecting electrodes is performed, and a wiring layer in which wiring routing of paths extending from the second chip connecting electrodes disposed adjacent to the first chip connecting electrodes to their corresponding second external connecting electrodes is performed, are made different from each other.
    Type: Application
    Filed: May 24, 2005
    Publication date: November 24, 2005
    Inventors: Yasuhiro Yoshikawa, Motoo Suwa, Hiroaki Nambu
  • Publication number: 20050230853
    Abstract: An LED chip mounting structure provided by the present invention includes a wiring board with a mounting pad (45R), an LED chip (10) with an electrode (12) facing the mounting pad (45R), a bump (47) disposed between the mounting pad (45R) and the electrode (10) to electrically connect the mounting pad (45R) to the electrode (10), and an adhesive member (7) for fixing the LED chip (10) to the wiring board (41).
    Type: Application
    Filed: June 20, 2003
    Publication date: October 20, 2005
    Applicant: Rohm Co., Ltd
    Inventor: Yasuhiro Yoshikawa
  • Patent number: 6646807
    Abstract: The present invention relates to a lens array unit fabrication process. A lens array forming step produces a first and a second lens arrays each having linearly-arranged first or second lenses. In a lens array connecting step, the first array is connected to the second array so that the first lenses are axially aligned with the second lenses. The connecting step includes providing of ultrasonic vibration by e.g. an ultrasonic horn. In the forming step, a resin casting is used in which lens array regions, each including linearly-arranged first or second lenses, are integrally formed in a direction perpendicular to the rows of lenses. In the forming step, a multiple-blade rotary cutter, provided with rotary blades disposed at a pitch corresponding to the transverse dimension of each lens array region, is used to simultaneously make cuts flanking the lens array regions.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: November 11, 2003
    Assignee: Rohm Co., Ltd.
    Inventors: Yasuhiro Yoshikawa, Motoshi Uehara, Tsutomu Hasegawa
  • Patent number: 6579125
    Abstract: A clip connector (A) includes an insulating housing (1) and a plurality of terminals (2) projecting from the housing (1). The housing (1) includes an outer surface (1a) for engaging a support member such as a printed board. The outer surface (1a) is irregular, including a plurality of projecting portions (12) and a plurality of retreating portions (13). Each of the terminals (2) includes a straight portion (20a) and a bent portion (20b). Each of the straight portion (20a) is formed with a through-hole (22) through which a resin for bonding the support member and the outer surface (1a) is applied.
    Type: Grant
    Filed: June 8, 2001
    Date of Patent: June 17, 2003
    Assignee: Rohm Co., Ltd.
    Inventors: Takaya Nagahata, Koji Nishi, Shigeyoshi Ono, Yasuhiro Yoshikawa, Yoshinobu Kishimoto, Koichi Wada
  • Publication number: 20030021034
    Abstract: The present invention relates to a lens array unit fabrication process. A lens array forming step produces a first and a second lens arrays each having linearly-arranged first or second lenses. In a lens array connecting step, the first array is connected to the second array so that the first lenses are axially aligned with the second lenses. The connecting step includes providing of ultrasonic vibration by e.g. an ultrasonic horn. In the forming step, a resin casting is used in which lens array regions, each including linearly-arranged first or second lenses, are integrally formed in a direction perpendicular to the rows of lenses. In the forming step, a multiple-blade rotary cutter, provided with rotary blades disposed at a pitch corresponding to the transverse dimension of each lens array region, is used to simultaneously make cuts flanking the lens array regions.
    Type: Application
    Filed: June 19, 2002
    Publication date: January 30, 2003
    Applicant: ROHM CO., LTD.
    Inventors: Yasuhiro Yoshikawa, Motoshi Uehara, Tsutomu Hasegawa
  • Patent number: 6429887
    Abstract: The thermal printhead according to the present invention includes an elongated rectangular substrate including an attaching surface and a non-attaching surface, and a heat sink plate attached to the attaching surface of the substrate. The non-attaching surface of the substrate is provided with a common electrode, a plurality of individual electrodes and a heating resistor. The heating resistor is covered with an insulating protective layer and an opaque conductive protective layer. The thermal printhead includes a positioning indicia. In the method of making the thermal printhead according to the present invention, an image of the positioning indicia is taken by an image pick-up device and imaged on a display of a monitor. Two reference lines are set on the display of the monitor. Positioning of the substrate relative to the heat sink plate is performed by moving the substrate so that the reference line of the positioning indicia coincides with the reference line on the display of the monitor.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: August 6, 2002
    Assignee: Rohm Co., Ltd.
    Inventors: Shinobu Obata, Yasuhiro Yoshikawa
  • Patent number: 6404453
    Abstract: A thermal printhead includes a primary substrate upon which a heating resistor, drive ICs, etc. are provided. The printhead also includes a secondary substrate for carrying e.g. a connector for a flexible cable. A plurality of clip pins are used for establishing electrical connection between the two substrates. Each clip pin is provided with a straight lead portion which is formed with a bend-facilitating part disposed between relatively rigid parts.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: June 11, 2002
    Assignee: Rohm Co. Ltd.
    Inventors: Yasuhiro Yoshikawa, Shinobu Obata
  • Patent number: 6392685
    Abstract: A drive IC chip (A) has a primary surface (10) which includes a corner (11a) at which a first and a second pads (3a, 3b) are provided so that their respective centers (Oa, Ob) are deviate positionally from each other in both directions x, y. With this structure, even if two wires for electric connection are extended from the first and the second pads (3a, 3b) either in the x direction or in the y direction, it is possible to advantageously prevent the wires from becoming too close to each other into shorting contact.
    Type: Grant
    Filed: August 21, 2000
    Date of Patent: May 21, 2002
    Assignee: Rohm Co. Ltd.
    Inventors: Takaya Nagahata, Koji Nishi, Yasuhiro Yoshikawa
  • Patent number: 6317150
    Abstract: A protection cover for a thermal printhead includes an elongated body and two bosses formed on the lower surface of the elongated body. These bosses are arranged to slant with each other when the cover is fixed to the thermal printhead. Thus, the protection cover, which is originally flat, is caused to warp so that its central portion is raised above its end portions.
    Type: Grant
    Filed: April 5, 2000
    Date of Patent: November 13, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Shigeyoshi Ono, Takaya Nagahata, Yasuhiro Yoshikawa
  • Patent number: 6307580
    Abstract: A method of making a thermal printhead including a primary substrate and an auxiliary substrate adjacent to the primary substrate. The method comprises the following steps. First, at least one positioning cutout is formed in either one or both of the primary and auxiliary substrates. The positioning cutout is formed at an edge of the selected substrate. Then, the primary and auxiliary substrates are positioned to each other by using a position-adjusting device provided with an upright pin fitted into the positioning cutout. Then, the electrical connection is established between the first and the second substrates via clip pins.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: October 23, 2001
    Assignee: : Rohm Co., Ltd.
    Inventor: Yasuhiro Yoshikawa
  • Publication number: 20010022608
    Abstract: The thermal printhead according to the present invention includes an elongated rectangular substrate including an attaching surface and a non-attaching surface, and a heat sink plate attached to the attaching surface of the substrate. The non-attaching surface of the substrate is provided with a common electrode, a plurality of individual electrodes and a heating resistor. The heating resistor is covered with an insulating protective layer and an opaque conductive protective layer. The thermal printhead includes a positioning indicia. In the method of making the thermal printhead according to the present invention, an image of the positioning indicia is taken by an image pick-up device and imaged on a display of a monitor. Two reference lines are set on the display of the monitor. Positioning of the substrate relative to the heat sink plate is performed by moving the substrate so that the reference line of the positioning indicia coincides with the reference line on the display of the monitor.
    Type: Application
    Filed: April 20, 2001
    Publication date: September 20, 2001
    Inventors: Shinobu Obata, Yasuhiro Yoshikawa
  • Patent number: 6236422
    Abstract: A protective cover (9) is provided which is used for a thermal printhead including a heat sink plate (1) formed with a plurality of fixing holes (10), a head substrate (2), and a circuit board (3). The heat sink plate (1) is formed with a groove (1a) which divides the upper surface of the heat sink plate (1) into a first region (1b) and a second region (1c). The head substrate (2) is provided with a heating resistor (4) and drive ICs (5). The drive ICs (5) are covered with a coating resin layer (6). The circuit board (3) is formed with through-holes (11). The protective cover (9) includes a main body (9a) having an obverse surface and a reverse surface, and a plurality of pins (12) extending from the reverse surface. Each of the pins (12) is formed with a slit (12a), which facilitates press-fitting of the pin (12) into a respective one of the fixing holes (10).
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: May 22, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Takaya Nagahata, Yasuhiro Yoshikawa, Eiji Yokoyama
  • Patent number: 5266834
    Abstract: A package is provided for achieving higher packing density and higher circuit integration of memories, in particular, a structure is provided having a plurality of thin, surface mount packages which are stacked up. Each of the laminated packages includes a semiconductor pellet, leads fixed to the front surface of the pellet, a radiating plate fixed to the rear surface of the same, and a resin mold member. To achieve a stabilized laminated structure, the mold member is shaped into a convex form on the front side of the pellet and into a concave form on the rear side of the same, so that the concave portion of one package can engage with the convex portion of another package.
    Type: Grant
    Filed: July 21, 1992
    Date of Patent: November 30, 1993
    Assignees: Hitachi Ltd., Hitachi VSLI Engineering Corp.
    Inventors: Kunihiko Nishi, Michio Tanimoto, Toshihiro Yasuhara, Katsuhiro Tabata, Yasuhiro Yoshikawa, Isao Akima, Souichi Kunito, Toshio Nosaka, Hideaki Nakamura
  • Patent number: 5075453
    Abstract: A process for producing an aryloxy-substituted phosphazene derivative represented by the formula(N.dbd.P).sub.n (OAr).sub.l Cl.sub.m-l R.sup.1.sub.p (III)which comprises reacting a chlorophosphazene derivative represented by the general formula(N.dbd.P).sub.n Cl.sub.m R.sup.1.sub.p (I)with, a hydroxy aryl compound represented by the general formulaHOAr (II)whereR.sup.1 represents hydroxy group, NH.sub.2 group, --OR.sup.4 group, --SR.sup.4 group or ##STR1## group, where R.sup.4, R.sup.5 and R.sup.6 represent independently an alkyl group, an alkenyl group, alkynyl group or an aryl group or one of R.sup.5 or R.sup.6 may be hydrogen or R.sup.5 and R.sup.
    Type: Grant
    Filed: August 29, 1989
    Date of Patent: December 24, 1991
    Assignee: Nippon Soda Co., Ltd.
    Inventors: Shinichiro Ueyama, Kazuhiko Fujikawa, Yasuhiro Yoshikawa, Tetsuhiko Okamoto, Masayuki Furukawa, Tadaichi Nishikawa
  • Patent number: 5003058
    Abstract: A DNA coding for an entire or a part of an antigen protein of the rinderpest virus; a protein for the production of the DNA comprising the steps of preparing an mRNA from the rinderpest virus, preparing a cDNA library from the mRNA, selecting a cDNA coding for the target protein from the cDNA library, and cloning the selected cDNA in a cloning vector; and a protein for the production of the antigen protein of the rinderpest virus comprising the steps of transfecting a vector containing the DNA coding for the target protein into animal cells, culturing the animal cells to produce the antigen protein, and recovering the target protein from the cell culture.
    Type: Grant
    Filed: August 28, 1987
    Date of Patent: March 26, 1991
    Assignee: Toa Nenryo Kogyo Kabushiki Kaisha
    Inventors: Kazuya Yamanouchi, Yasuhiro Yoshikawa, Masanobu Sugimoto
  • Patent number: 4880905
    Abstract: Various kinds of organophosphazene polymers are produced by reacting dichlorophosphezene polymer with hydroxy compounds using a tertiary amine such as triethyl amine as an acid acceptor in the presence of pyridine derivative such as 4-dimethylaminopyridine as a catalyst under mild reaction conditions to substitute substantially all the chlorine atoms with organic groups.
    Type: Grant
    Filed: November 14, 1988
    Date of Patent: November 14, 1989
    Assignee: Nippon Soda Co., Ltd.
    Inventors: Shinichiro Ueyama, Yasuhiro Yoshikawa, Tetsuhiko Okamoto