Patents by Inventor Yasuhiro Yoshimura
Yasuhiro Yoshimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180375075Abstract: A battery case enables a battery cell to be placed in a continuously pressured state without increasing the complexity of the battery module manufacturing process. Specifically, the battery case has: a plastic first accommodation unit and second accommodation unit in which a laminated body of a battery cell is accommodated; a UD tape integrally positioned on a first side wall, a second side wall, and a third side wall, which form the first accommodation unit; and a UD tape integrally positioned on the first side wall, which form the second accommodation unit. The UD tapes are configured, in particular, to be positioned straddling the third side walls from the second side walls across the first side wall.Type: ApplicationFiled: December 8, 2016Publication date: December 27, 2018Applicants: TOYODA IRON WORKS CO., LTD., TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yasuhiro YOSHIMURA, Hideaki SAKAI, Yasuhiro SONE, Minoru TAKENAKA, Atsushi YAMANAKA, Yusuke SUZUKI, Shogo TOMIHIRA
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Patent number: 10148920Abstract: In an optical module and a scanning-type image display device, a reduction in heat insulating effect due to a natural convection generated between the optical module and a case is suppressed to alleviate laser overheating and thermal expansion or contraction of each component and obtain a stable projection image quality. In an optical module that couples laser beams from a plurality of laser beam sources 1a, 1b, 1c and irradiates the laser beams to a desired position, a cover that covers the optical module is provided, a second cover is provided in a space between the optical module and the cover, and a projecting part is provided on a surface of the second cover facing the optical module.Type: GrantFiled: February 10, 2016Date of Patent: December 4, 2018Assignee: Hitachi-LG Data Storage, Inc.Inventors: Yasuhiro Yoshimura, Ayano Otsubo, Seiichi Katou, Hiroshi Ogasawara, Tatsuya Yamasaki, Kenji Watabe
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Patent number: 9964635Abstract: Both controlling damage when assembling an ultrasonic probe using a chip formed with a capacitive ultrasonic transducer and securing operational reliability are achieved. In a semiconductor substrate on which the capacitive ultrasonic transducer (CMUT) is formed on a first primary surface, a protective film is formed on the surface of the ultrasonic transducer which is formed on the first primary surface of the semiconductor substrate which is then thinned by polishing a second primary surface opposite to the first primary surface of the semiconductor substrate, an ultrasonic transducer chip is cutout of the semiconductor substrate, a sound absorbing material is provided on the surface opposite to the surface formed with the ultrasonic transducer, and the protective film formed on the surface of the ultrasonic transducer is removed.Type: GrantFiled: November 29, 2013Date of Patent: May 8, 2018Assignee: HITACHI, LTD.Inventors: Shuntaro Machida, Akifumi Sako, Taiichi Takezaki, Yasuhiro Yoshimura, Tatsuya Nagata, Naoaki Yamashita, Hiroki Tanaka
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Publication number: 20180007325Abstract: To provide an optical module and a scan-type image projection display device at low power consumption in a configuration of enhancing a heat radiation property with excellent assembly performance. An optical module for coupling and irradiating laser beams from a plurality of laser diodes, and onto a desired position is characterized in that a first protruded part corresponding to a first laser holder for holding a first laser diode 1a and a second protruded part corresponding to a second laser holder for holding a second laser diode are provided on a base for placing the optical module thereon, and heat conductive materials are provided between the first protruded part and the first laser holder and between the second protruded part and the second laser holder, respectively.Type: ApplicationFiled: January 4, 2016Publication date: January 4, 2018Applicant: HITACHI-LG DATA STORAGE, INC.Inventors: Seiichi KATOU, Ayano OTSUBO, Tatsuya YAMASAKI, Hiroshi OGASAWARA, Kenji WATABE, Yasuhiro YOSHIMURA
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Patent number: 9846145Abstract: Provided are: an ultrasound probe with excellent characteristic stability; and ultrasound equipment that uses the ultrasound probe. The ultrasound probe has an ultrasonic transmitting and receiving element provided with a substrate, an insulating film formed on the substrate, a cavity formed between the substrate and the insulating film, and a pair of electrodes disposed parallel to the substrate so as to sandwich the cavity. The ultrasound probe is characterized in that the ultrasonic transmitting and receiving element has a beam part with a multilayer structure formed by laminating films made of materials different in stress, the beam part being disposed on the electrode distant from the substrate out of the pair of electrodes, and the beam part is formed by laminating a film that applies tensile stress and a film that applies compressive stress.Type: GrantFiled: February 13, 2013Date of Patent: December 19, 2017Assignee: Hitachi, Ltd.Inventors: Yasuhiro Yoshimura, Tatsuya Nagata, Akifumi Sako
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Publication number: 20170359556Abstract: In an optical module and a scanning-type image display device, a reduction in heat insulating effect due to a natural convection generated between the optical module and a case is suppressed to alleviate laser overheating and thermal expansion or contraction of each component and obtain a stable projection image quality. In an optical module that couples laser beams from a plurality of laser beam sources 1a, 1b, 1c and irradiates the laser beams to a desired position, a cover that covers the optical module is provided, a second cover is provided in a space between the optical module and the cover, and a projecting part is provided on a surface of the second cover facing the optical module.Type: ApplicationFiled: February 10, 2016Publication date: December 14, 2017Applicant: HITACHI-LG DATA STORAGE, INC.Inventors: Yasuhiro YOSHIMURA, Ayano OTSUBO, Seiichi KATOU, Hiroshi OGASAWARA, Tatsuya YAMASAKI, Kenji WATABE
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Publication number: 20170291192Abstract: A structure that prevents a substrate from being warped is provided on a region or a location other than a membrane that determines the characteristics of a CMUT. In a CMUT in a structure in which a first conductive layer and a second conductive layer are provided sandwiching a cavity on a substrate, for example, as a warpage prevention structure, a warpage prevention layer that prevents the substrate from being warped is provided between the substrate and the first conductive film. When the insulating film disposed between the cavity and the first conductive film and the insulating film disposed between the cavity and the second conductive film are silicon oxide films, the warpage prevention layer includes a silicon nitride film.Type: ApplicationFiled: April 21, 2015Publication date: October 12, 2017Inventors: Shuntaro MACHIDA, Daisuke RYUZAKI, Tatsuya NAGATA, Naoaki YAMASHITA, Yuko HANAOKA, Yasuhiro YOSHIMURA
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Publication number: 20170228902Abstract: Provided is an information processing apparatus including: a PDL analysis unit that acquires an output resolution of input PDL data when a tile drawing instruction is included in the PDL data, and calculates a drawing size of a tile drawing based on the tile drawing instruction and the output resolution; an average color calculation unit that calculates an average color of the tile drawing based on the tile drawing instruction when the calculated drawing size is smaller than a predetermined value; and a rendering unit that renders the tile drawing instruction based on the calculated average color. The average color calculation unit calculates the average color based on a transparency level of a unit tile included in the tile drawing instruction.Type: ApplicationFiled: January 19, 2017Publication date: August 10, 2017Inventor: Yasuhiro Yoshimura
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Patent number: 9691739Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.Type: GrantFiled: March 4, 2016Date of Patent: June 27, 2017Assignee: Tessera Advanced Technologies, Inc.Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
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Patent number: 9538023Abstract: The communication unit of an information processing apparatus can perform a wireless communication with a terminal apparatus. A state identifier indicating the state of the information processing apparatus is obtained, and a device identifier for identifying the information processing apparatus and the state identifier are transmitted to the terminal apparatus through the communication unit. The terminal apparatus holds additional information corresponding to a state of an information processing apparatus which can be identified by the device identifier, and can display the additional information.Type: GrantFiled: April 9, 2014Date of Patent: January 3, 2017Assignee: CANON KABUSHIKI KAISHAInventors: Shigehiko Sato, Yasuhiro Yoshimura
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Publication number: 20160310105Abstract: In order to obtain a high-resolution ultrasound diagnostic image while reducing the back side reflection of a ultrasound irradiated to the side opposite to the ultrasound transmission direction of an ultrasound transmission/reception device, disclosed is an ultrasound probe, wherein a substrate is provided thereon with a cavity, insulation layers having the cavity therebetween, and an upper layer electrode and a lower layer electrode having the cavity and the insulation layers therebetween, so as to form an ultrasound vibration element, the substrate is held by a backing with a low-modulus member therebetween, and a direct voltage and a alternating voltage are applied between the electrodes to vibrate the ultrasound vibration element, and wherein a mechanical impedance by the substrate and the low-modulus member has a substantially equal value as an acoustic impedance of the backing.Type: ApplicationFiled: July 1, 2016Publication date: October 27, 2016Inventors: Yasuhiro YOSHIMURA, Tatsuya NAGATA, Akifumi SAKO
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Patent number: 9402598Abstract: In order to obtain a high-resolution ultrasound diagnostic image while reducing the back side reflection of a ultrasound irradiated to the side opposite to the ultrasound transmission direction of an ultrasound transmission/reception device, disclosed is an ultrasound probe, wherein a substrate is provided thereon with a cavity, insulation layers having the cavity therebetween, and an upper layer electrode and a lower layer electrode having the cavity and the insulation layers therebetween, so as to form an ultrasound vibration element, the substrate is held by a backing with a low-modulus member therebetween, and a direct voltage and a alternating voltage are applied between the electrodes to vibrate the ultrasound vibration element, and wherein a mechanical impedance by the substrate and the low-modulus member has a substantially equal value as an acoustic impedance of the backing.Type: GrantFiled: August 19, 2011Date of Patent: August 2, 2016Assignee: Hitachi Medical CorporationInventors: Yasuhiro Yoshimura, Tatsuya Nagata, Akifumi Sako
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Publication number: 20160196678Abstract: An information processing apparatus including an acquisition unit configured to acquire a plurality of vertices forming a one path included in a glyph path, a calculation unit configured to calculate a winding value relating to the one path, a determination unit configured to determine a shift direction of the one path based on the calculated winding value, and a movement unit configured to move positions of the plurality of vertices based on the determined shift direction.Type: ApplicationFiled: December 31, 2015Publication date: July 7, 2016Inventor: Yasuhiro Yoshimura
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Publication number: 20160190102Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.Type: ApplicationFiled: March 4, 2016Publication date: June 30, 2016Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
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Patent number: 9318418Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.Type: GrantFiled: May 19, 2015Date of Patent: April 19, 2016Assignee: TESSERA ADVANCED TECHNOLOGIES, INC.Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
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Publication number: 20150323657Abstract: Both controlling damage when assembling an ultrasonic probe using a chip formed with a capacitive ultrasonic transducer and securing operational reliability are achieved. In a semiconductor substrate on which the capacitive ultrasonic transducer (CMUT) is formed on a first primary surface, a protective film is formed on the surface of the ultrasonic transducer which is formed on the first primary surface of the semiconductor substrate which is then thinned by polishing a second primary surface opposite to the first primary surface of the semiconductor substrate, an ultrasonic transducer chip is cutout of the semiconductor substrate, a sound absorbing material is provided on the surface opposite to the surface formed with the ultrasonic transducer, and the protective film formed on the surface of the ultrasonic transducer is removed.Type: ApplicationFiled: November 29, 2013Publication date: November 12, 2015Inventors: Shuntaro MACHIDA, Akifumi SAKO, Taiichi TAKEZAKI, Yasuhiro YOSHIMURA, Tatsuya NAGATA, Naoaki YAMASHITA, Hiroki TANAKA
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Publication number: 20150255374Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a first semiconductor substrate having a first surface and a second surface opposite the first surface, a first insulating film formed on the first surface, a first hole formed in the first insulating film and partially extending into the first semiconductor substrate, a second hole formed in the second surface, a first electrode entirely filling the first hole, and a conductive film conformally formed in the second hole. The conductive film is electrically connected to a bottom surface of the first electrode and leaves a third hole in the first semiconductor substrate open. The third hole is configured to receive a second electrode of a second semiconductor substrate.Type: ApplicationFiled: May 19, 2015Publication date: September 10, 2015Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
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Patent number: 9076700Abstract: In a semiconductor device in which a plurality of semiconductor chips are stacked, performance is enhanced without deteriorating productivity. The semiconductor device has a plurality of elements, an interlayer insulating film, a pad, and a bump electrode electrically connected with the pad sequentially formed on a main surface of a silicon substrate and has a back-surface electrode formed on a back surface of the silicon substrate and electrically connected with the bump electrode. The bump electrode has a protruding portion penetrating through the pad and protruding toward the silicon substrate side. The back-surface electrode is formed so as to reach the protruding portion of the bump electrode from the back surface side of the silicon substrate toward the main surface side and to cover the inside of a back-surface electrode hole portion which does not reach the pad, so that the back-surface electrode is electrically connected with the bump electrode.Type: GrantFiled: August 20, 2014Date of Patent: July 7, 2015Assignee: Tessera Advanced Technologies, Inc.Inventors: Michihiro Kawashita, Yasuhiro Yoshimura, Naotaka Tanaka, Takahiro Naito, Takashi Akazawa
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Patent number: 8979146Abstract: A vehicle bumper beam including: a resin beam having an elongate body extending along a vehicle-width direction, two tubular shock-absorbing portions disposed at the beam body's opposite longitudinal end portions extending in front-rear direction, the beam body and shock-absorbing portions being formed with each other; a metal beam disposed outside the resin beam in the front-rear direction, fixedly fitted to the resin beam. Further, flat attachment portions, formed with inner end portions of the shock-absorbing portions in front-rear direction; bent portions bent in a crank extending from attachment portions outward in front-rear direction, the beam body being to attachment portions via bent portions, the metal beam fixedly fitted to an outer surface of the beam body's intermediate portion; metal beam's opposite end portions extending beyond bent portions covering the right and left sides, fixedly fitted to distal end portions; each space defined by shock-absorbing portion, metal beam and bent portion.Type: GrantFiled: July 5, 2012Date of Patent: March 17, 2015Assignee: Toyoda Iron Works Co., Ltd.Inventors: Mitsutoshi Kano, Yasuhiro Yoshimura
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Publication number: 20150011890Abstract: Provided are: an ultrasound probe with excellent characteristic stability; and ultrasound equipment that uses the ultrasound probe. The ultrasound probe has an ultrasonic transmitting and receiving element provided with a substrate, an insulating film formed on the substrate, a cavity formed between the substrate and the insulating film, and a pair of electrodes disposed parallel to the substrate so as to sandwich the cavity. The ultrasound probe is characterized in that the ultrasonic transmitting and receiving element has a beam part with a multilayer structure formed by laminating films made of materials different in stress, the beam part being disposed on the electrode distant from the substrate out of the pair of electrodes, and the beam part is formed by laminating a film that applies tensile stress and a film that applies compressive stress.Type: ApplicationFiled: February 13, 2013Publication date: January 8, 2015Inventors: Yasuhiro Yoshimura, Tatsuya Nagata, Akifumi Sako