Patents by Inventor Yasuhito Aruga
Yasuhito Aruga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250098063Abstract: According to one embodiment, a display device includes a substrate provided with a display area including a plurality of pixels, and an end portion region including a connection portion, a flexible wiring substrate including wiring lines and a flexible base, and a drive IC chip provided on the flexible wiring substrate, and a protective member extending from an end portion of the substrate and overlapping the wiring lines of the flexible wiring substrate, wherein the flexible wiring substrate is bent in a bend region, the drive IC chip opposes the display area, an elastic modulus of the protective member is 10 MPa or more and 20 MPa or less.Type: ApplicationFiled: September 13, 2024Publication date: March 20, 2025Applicant: Japan Display Inc.Inventors: Tatsuya IDE, Takeshi KASHIRO, Yasuhito ARUGA, Yasuhiro KITAMURA, Hiroyuki ONODERA, Kazuto TSURUOKA
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Publication number: 20250081817Abstract: According to one embodiment, a display device includes a substrate, a display area displaying an image, a surrounding area surrounding the display area, a display element arranged above the substrate, a first sealing layer formed of an inorganic material and covering the display element, a resin layer arranged on the first sealing layer, a second sealing layer formed of an inorganic material and covering the resin layer, a conductive pad arranged in the surrounding area, and a polarizer arranged above the second sealing layer. At least one of an end portion of the first sealing layer and an end portion of the second sealing layer is located closer to the pad than an end portion of the polarizer is.Type: ApplicationFiled: August 28, 2024Publication date: March 6, 2025Applicant: Japan Display Inc.Inventors: Hideyuki TAKAHASHI, Kazuyuki HARADA, Yasuhito ARUGA
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Patent number: 11668984Abstract: A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals in the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.Type: GrantFiled: April 7, 2022Date of Patent: June 6, 2023Assignee: Japan Display Inc.Inventors: Hideaki Abe, Yasuhito Aruga, Hiroyuki Onodera, Hiroki Kato, Yasushi Nakano, Hitoshi Kawaguchi, Keisuke Asada
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Publication number: 20220229324Abstract: A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals in the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.Type: ApplicationFiled: April 7, 2022Publication date: July 21, 2022Applicant: Japan Display Inc.Inventors: Hideaki ABE, Yasuhito ARUGA, Hiroyuki ONODERA, Hiroki KATO, Yasushi NAKANO, Hitoshi KAWAGUCHI, Keisuke ASADA
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Patent number: 11327373Abstract: A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals is the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.Type: GrantFiled: January 6, 2021Date of Patent: May 10, 2022Assignee: Japan Display Inc.Inventors: Hideaki Abe, Yasuhito Aruga, Hiroyuki Onodera, Hiroki Kato, Yasushi Nakano, Hitoshi Kawaguchi, Keisuke Asada
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Publication number: 20210157192Abstract: A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals is the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.Type: ApplicationFiled: January 6, 2021Publication date: May 27, 2021Applicant: Japan Display Inc.Inventors: Hideaki ABE, Yasuhito ARUGA, Hiroyuki ONODERA, Hiroki KATO, Yasushi NAKANO, Hitoshi KAWAGUCHI, Keisuke ASADA
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Patent number: 10921657Abstract: A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals in the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.Type: GrantFiled: February 7, 2019Date of Patent: February 16, 2021Assignee: Japan Display Inc.Inventors: Hideaki Abe, Yasuhito Aruga, Hiroyuki Onodera, Hiroki Kato, Yasushi Nakano, Hitoshi Kawaguchi, Keisuke Asada
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Publication number: 20190250447Abstract: A display device includes: a display panel including panel terminals; and a wiring substrate including first substrate terminals coupled to the panel terminals. The panel terminals include panel terminals arranged in a first region and panel terminals arranged in second regions sandwiching the first region. The first substrate terminals include first substrate terminals arranged in a third region and first substrate terminals arranged in fourth regions sandwiching the third region. A gap between panel terminals is substantially constant in the first and second regions. A first width of the panel terminals in the first region is different from a second width of the panel terminals in the second regions. A width of the first substrate terminals is substantially constant in the third and fourth regions. A first gap between first substrate terminals in the third region is different from a second gap between first substrate terminals in the fourth regions.Type: ApplicationFiled: February 7, 2019Publication date: August 15, 2019Applicant: Japan Display Inc.Inventors: Hideaki ABE, Yasuhito ARUGA, Hiroyuki ONODERA, Hiroki KATO, Yasushi NAKANO, Hitoshi KAWAGUCHI, Keisuke ASADA
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Patent number: 10288959Abstract: A terminal structure that keeps the resistance of its connecting portion small and secures mechanical reliability is to be achieved. A display device includes a display region and a terminal region. A terminal formed in the terminal region is formed with a terminal metal, a first oxide conductive film covering the end portion of the terminal metal, and a second oxide conductive film covering the first oxide conductive film and the terminal metal. The first oxide conductive film has an opening in the center part of the terminal.Type: GrantFiled: August 4, 2017Date of Patent: May 14, 2019Assignee: Japan Display Inc.Inventors: Motoharu Miyamoto, Hidetatsu Nakamura, Yasuhiro Kanaya, Yasushi Nakano, Yasuhito Aruga
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Publication number: 20190051593Abstract: According to one embodiment, a display device includes a first signal wiring disposed on an insulating substrate, a base substrate, a first connection wiring on the base substrate and a conductive adhesive member which electrically connects the first signal wiring and the first connection wiring, wherein the base substrate includes a first end surface overlapping the first signal wiring, the insulating substrate includes a second end surface overlapping the first connection wiring, the first connection wiring has a first width in a position overlapping the first end surface and a second width in a position overlapping the second end surface, and the first width is less than the second width.Type: ApplicationFiled: August 8, 2018Publication date: February 14, 2019Inventors: Hiroyuki Kimura, Yasuhito Aruga, Hideaki Abe, Hitoshi Kawaguchi
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Publication number: 20180046012Abstract: A terminal structure that keeps the resistance of its connecting portion small and secures mechanical reliability is to be achieved. A display device includes a display region and a terminal region. A terminal formed in the terminal region is formed with a terminal metal, a first oxide conductive film covering the end portion of the terminal metal, and a second oxide conductive film covering the first oxide conductive film and the terminal metal. The first oxide conductive film has an opening in the center part of the terminal.Type: ApplicationFiled: August 4, 2017Publication date: February 15, 2018Inventors: Motoharu MIYAMOTO, Hidetatsu NAKAMURA, Yasuhiro KANAYA, Yasushi NAKANO, Yasuhito ARUGA
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Patent number: 7888799Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: GrantFiled: May 10, 2010Date of Patent: February 15, 2011Assignee: Seiko Epson CorporationInventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
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Publication number: 20100252829Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: ApplicationFiled: May 10, 2010Publication date: October 7, 2010Applicant: SEIKO EPSON CORPORATIONInventors: Shuichi TANAKA, Haruki ITO, Yasuhito ARUGA, Ryohei TAMURA, Michiyoshi TAKANO
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Patent number: 7741712Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: GrantFiled: September 14, 2007Date of Patent: June 22, 2010Assignee: Seiko Epson CorporationInventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
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Patent number: 7567330Abstract: An electro-optical device includes a substrate having a display region; and an extending region extending from the display region. The extending region is provided with wiring lines, and at least some wiring lines, which are disposed to be adjacent to each other, are correspondingly disposed in a plurality of different layers.Type: GrantFiled: August 24, 2005Date of Patent: July 28, 2009Assignee: Seiko Epson CorporationInventors: Kazuyuki Yamada, Yasuhito Aruga
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Publication number: 20080272471Abstract: An electro-optical device includes an electro-optical panel having a substrate; a plurality of input terminals that are arranged in a first direction on the substrate; and a semiconductor device provided with a plurality of input bumps electrically connected to the input terminals through conductive organic members. The input terminals connected to the input bumps that are positioned substantially at the center of the semiconductor device in the first direction have allowable connection resistance values smaller than those of the other input terminals.Type: ApplicationFiled: June 25, 2008Publication date: November 6, 2008Applicant: SEIKO EPSON CORPORATIONInventors: Hiroyuki ONODERA, Yasuhito ARUGA
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Publication number: 20080012130Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: ApplicationFiled: September 14, 2007Publication date: January 17, 2008Applicant: SEIKO EPSON CORPORATIONInventors: Shuichi TANAKA, Haruki ITO, Yasuhito ARUGA, Ryohei TAMURA, Michiyoshi TAKANO
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Patent number: 7276792Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.Type: GrantFiled: May 13, 2005Date of Patent: October 2, 2007Assignee: Seiko Epson CorporationInventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
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Patent number: 7167227Abstract: A liquid crystal device comprises a pair of substrates 2a and 2b, liquid crystal L held between the substrates 2a and 2b, and an IC 13 mounted on an overhang section 2c of the substrate 2a. A terminal column 26a comprises a plurality of terminals 18 aligned in a direction away from the liquid crystal L. The terminal column 26a has, in the order of the closeness to the liquid crystal L, a first noneffective terminal region within a distance “A” from a first side of the IC, an effective terminal region X continuing from the first noneffective terminal region, and a second noneffective terminal region within a distance “B” from a second side of the IC, the second noneffective terminal region continuing from the effective terminal region. The distances A and B are adjusted to satisfy the relationship A>B.Type: GrantFiled: May 5, 2005Date of Patent: January 23, 2007Assignee: Seiko Epson CorporationInventors: Yasuhito Aruga, Ryosuke Imaseki
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Patent number: 7148427Abstract: A wiring substrate is formed of a plurality of metal wirings 14e formed on a substrate 7c. A guard wiring 29 fabricated of an electrically conductive oxide such as ITO is interposed between at least a pair of adjacent ones of a plurality of metal wirings 14e. When voltages V1, V2, V3, and V4 applied to the metal wirings 14e are related to be V1>V2>V3>V4, a guard wiring 29 is present between a metal wiring 14e functioning as an anode and a metal wiring 14e functioning as a cathode, and the anode metal wiring 14e is prevented from being corroded.Type: GrantFiled: October 24, 2001Date of Patent: December 12, 2006Assignee: Seiko Epson CorporationInventors: Yasuhito Aruga, Satoshi Yatabe, Kogo Endo, Norihito Harada