Patents by Inventor Yasuhito Aruga

Yasuhito Aruga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7015509
    Abstract: An electrooptic-device substrate includes a first IC-mounting area on which a first IC is mounted following a substrate edge of the electrooptic-device substrate, at least one second IC-mounting area on which a second IC is mounted, and a substrate-connection area to which a flexible substrate is connected, wherein the substrate-connection area is provided so as to be nearer the substrate edge than the first and second IC-mounting areas, and the electrooptic-device substrate includes a first wiring pattern extending from the first IC-mounting area to the substrate-connection area and a second wiring pattern that extending from the second IC-mounting area, between first pads formed in the first IC-mounting area and reaching the substrate-connection area.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: March 21, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Yasuhito Aruga
  • Publication number: 20060044504
    Abstract: An electro-optical device includes a substrate having a display region; and an extending region extending from the display region. The extending region is provided with wiring lines, and at least some wiring lines, which are disposed to be adjacent to each other, are correspondingly disposed in a plurality of different layers.
    Type: Application
    Filed: August 24, 2005
    Publication date: March 2, 2006
    Inventors: Kazuyuki Yamada, Yasuhito Aruga
  • Publication number: 20050275115
    Abstract: A semiconductor device in the first embodiment includes: an electrode pad and a resin projection, formed on an active surface; a conductive film deposited from a surface of the electrode pad to a surface of the resin projection; a resin bump formed with the resin projection and with the conductive film. The semiconductor device is conductively connected to the opposing substrate through the resin bump electrode. The testing electrode is formed with the conductive film that is extended and applied to the opposite side of the electrode pad across the resin projection.
    Type: Application
    Filed: May 13, 2005
    Publication date: December 15, 2005
    Inventors: Shuichi Tanaka, Haruki Ito, Yasuhito Aruga, Ryohei Tamura, Michiyoshi Takano
  • Patent number: 6963385
    Abstract: A liquid crystal device comprises a pair of substrates 2a and 2b, liquid crystal L held between the substrates 2a and 2b, and an IC 13 mounted on an overhang section 2c of the substrate 2a. A terminal column 26a comprises a plurality of terminals 18 aligned in a direction away from the liquid crystal L. The terminal column 26a has, in the order of the closeness to the liquid crystal L, a first noneffective terminal region within a distance “A” from a first side of the IC, an effective terminal region X continuing from the first noneffective terminal region, and a second noneffective terminal region within a distance “B” from a second side of the IC, the second noneffective terminal region continuing from the effective terminal region. The distances A and B are adjusted to satisfy the relationship A>B.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: November 8, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Yasuhito Aruga, Ryosuke Imaseki
  • Publication number: 20050195356
    Abstract: A liquid crystal device comprises a pair of substrates 2a and 2b, liquid crystal L held between the substrates 2a and 2b, and an IC 13 mounted on an overhang section 2c of the substrate 2a. A terminal column 26a comprises a plurality of terminals 18 aligned in a direction away from the liquid crystal L. The terminal column 26a has, in the order of the closeness to the liquid crystal L, a first noneffective terminal region within a distance “A” from a first side of the IC, an effective terminal region X continuing from the first noneffective terminal region, and a second noneffective terminal region within a distance “B” from a second side of the IC, the second noneffective terminal region continuing from the effective terminal region. The distances A and B are adjusted to satisfy the relationship A>B.
    Type: Application
    Filed: May 5, 2005
    Publication date: September 8, 2005
    Inventors: Yasuhito Aruga, Ryosuke Imaseki
  • Publication number: 20050092993
    Abstract: An electrooptic-device substrate includes a first IC-mounting area on which a first IC is mounted following a substrate edge of the electrooptic-device substrate, at least one second IC-mounting area on which a second IC is mounted, and a substrate-connection area to which a flexible substrate is connected, wherein the substrate-connection area is provided so as to be nearer the substrate edge than the first and second IC-mounting areas, and the electrooptic-device substrate includes a first wiring pattern extending from the first IC-mounting area to the substrate-connection area and a second wiring pattern that extending from the second IC-mounting area, between first pads formed in the first IC-mounting area and reaching the substrate-connection area.
    Type: Application
    Filed: September 23, 2004
    Publication date: May 5, 2005
    Inventor: Yasuhito Aruga
  • Patent number: 6888606
    Abstract: A liquid crystal device 1, that is, an electrooptic device, has a second electrode 11 provided so as to oppose a first electrode 10, and a liquid crystal provided between the first electrode 10 and the second electrode 11. This liquid crystal device 1 further has a first substrate 2 on which the first electrode 10 is provided and a wire 14 which is formed on the first substrate 2 and is electrically connected to the second electrode 11 at a conduction position 4a. Since the wire 14 extends inside the conduction position 4a, the picture frame region that is outside a sealing material 4 can be decreased.
    Type: Grant
    Filed: April 15, 2002
    Date of Patent: May 3, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Shoji Hinata, Yasuhito Aruga, Tadashi Tsuyuki
  • Patent number: 6853361
    Abstract: This present invention provides a liquid-crystal panel that presents a high-density wiring while maintaining reliability of the wiring. Odd-numbered scanning lines are connected to a first wiring group while even-numbered scanning lines are connected to a second wiring group. Each of the scanning lines is supplied with a scanning signal the polarity of which is inverted every horizontal scanning period. Among wirings forming the first wiring group and the second wiring group, a line-to-line voltage between any adjacent wirings becomes zero volt for a majority of the time. Accordingly, degradation of the wirings due to electrolytic corrosion is controlled even if the spacing between the wirings is narrowed.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: February 8, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Tadashi Tsuyuki, Yasuhito Aruga
  • Patent number: 6833900
    Abstract: In a liquid crystal display that includes a second substrate that supports a liquid crystal and data lines formed on the surface of the second substrate, a third insulating layer that covers the data lines is formed on the surface of the second substrate. On the surface of the third insulating layer, chip connecting wiring is formed over a covered region covered with a sealing material and the liquid crystal and the region other than the covered region. By connecting the chip connecting wiring to the data lines via contact holes formed within the covered region of the third insulating layer, corrosion of the wiring formed on the substrate is inhibited.
    Type: Grant
    Filed: February 8, 2002
    Date of Patent: December 21, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Yasuhito Aruga
  • Patent number: 6831841
    Abstract: A first driver IC is mounted in the area which includes one side of the panel substrate on an electro-optical panel, and the edge portion of the film base material on which a second driver IC is mounted is bonded to the vicinity of the one side of the above-mentioned panel substrate. Also, driver-controlling electronic components which each provides control signals to the first and second driver ICs are mounted on the same surface as the second driver IC in the film base material.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: December 14, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Eiji Oishi, Masanori Yumoto, Yasuhito Aruga
  • Patent number: 6657696
    Abstract: The shape of the picture frame area of the electro-optical device is to be made symmetrical. The IC chip on panel is mounted in the edge area, along one side of the panel substrate of the electro-optical panel. Additionally, the IC chip on base material is mounted on the base material joined to said panel substrate. Said IC chip on base material is mounted on the surface containing the panel joining part joined to said panel substrate.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: December 2, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Yasuhito Aruga
  • Patent number: 6621542
    Abstract: An electro-optic panel 100 has a first substrate 10 and a second substrate 20 opposing each other. The first substrate 10 has a protruding portion 12 formed so that an edge portion of the first substrate 10 protrudes toward the outside from an edge portion of the second substrate 20. The surface of the first substrate 10 opposing the second substrate 20 is formed to have an irregular surface 14. On the irregular surface 14 in the protruding portion 12 of the first substrate 10, a planarized layer is formed, and on the planarized layer 60, the mark (alignment mark 70) is formed. The electro-optic device includes the electro-optic panel 100. The electronic apparatus includes the electro-optic device.
    Type: Grant
    Filed: October 26, 2000
    Date of Patent: September 16, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Yasuhito Aruga
  • Patent number: 6519021
    Abstract: A wiring board (flexible wiring board) 400 for connection of an electro-optical panel is connected to an electro-optical panel (liquid crystal panel) 100 having a pair of opposed boards 200, 300. The wiring board (flexible wiring board) 400 for connection of the electro-optical panel comprises a first base material 412, wiring 414 having a predetermined pattern, and a second base material 416; a first terminal group 410 provided on the first base material 412; a second terminal group 420 provided on the second base material 416; and a third terminal group 430 provided on the first base material 412 or the second base material 416. The third terminal group 430 includes at least terminals electrically continuous to the first terminal group 410 and terminals electrically continuous to the second terminal group 420.
    Type: Grant
    Filed: January 17, 2000
    Date of Patent: February 11, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Yasuhito Aruga
  • Patent number: 6507384
    Abstract: Connection terminals connected to a scanning driver IC chip 32 are arranged on a short side of a wiring connection area 25A of a second substrate 25 in a liquid crystal display panel 21, and the connection terminals and connection terminals arranged on a long side of a wiring connection area 24A of a first substrate 24 are connected from the same direction with a single flexible printed wiring board 22. For this reason, convenience of the flexible printed wiring board 22 can be improved. In addition, it is possible to reduce the projection size of the wiring connection area of the first substrate 24, and the ratio of the display area in the whole liquid crystal panel 21 can be increased.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: January 14, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Kogo Endo, Eiji Oishi, Yasuhito Aruga
  • Publication number: 20020167623
    Abstract: A liquid crystal device comprises a pair of substrates 2a and 2b, liquid crystal L held between the substrates 2a and 2b, and an IC 13 mounted on an overhang section 2c of the substrate 2a. A terminal column 26a comprises a plurality of terminals 18 aligned in a direction away from the liquid crystal L. The terminal column 26a has, in the order of the closeness to the liquid crystal L, a first noneffective terminal region within a distance “A” from a first side of the IC, an effective terminal region X continuing from the first noneffective terminal region, and a second noneffective terminal region within a distance “B” from a second side of the IC, the second noneffective terminal region continuing from the effective terminal region. The distances A and B are adjusted to satisfy the relationship A>B.
    Type: Application
    Filed: May 8, 2002
    Publication date: November 14, 2002
    Inventors: Yasuhito Aruga, Ryosuke Imaseki
  • Publication number: 20020163614
    Abstract: A liquid crystal device 1, that is, an electrooptic device, has a second electrode 11 provided so as to oppose a first electrode 10, and a liquid crystal provided between the first electrode 10 and the second electrode 11. This liquid crystal device 1 further has a first substrate 2 on which the first electrode 10 is provided and a wire 14 which is formed on the first substrate 2 and is electrically connected to the second electrode 11 at a conduction position 4a. Since the wire 14 extends inside the conduction position 4a, the picture frame region that is outside a sealing material 4 can be decreased.
    Type: Application
    Filed: April 15, 2002
    Publication date: November 7, 2002
    Inventors: Shoji Hinata, Yasuhito Aruga, Tadashi Tsuyuki
  • Publication number: 20020135293
    Abstract: In a liquid crystal display comprising a second substrate 20 for carrying a liquid crystal 40 and data lines 22 formed on the surface of the second substrate, a third insulating layer 246 for covering the data lines 22 are formed on the surface of the second substrate 20. On the surface of the third insulating layer 246, chip connecting wiring 25 are formed over a covered region 61 covered with a sealing material 30 and the liquid crystal 40 and the region other than the covered region 61. By connecting the chip connecting wiring 25 to the data lines 22 via contact holes 25a formed within the covered region 61 of the third insulating layer 246, corrosion of the wiring formed on the substrate is inhibited.
    Type: Application
    Filed: February 8, 2002
    Publication date: September 26, 2002
    Applicant: Seiko Epson Corporation
    Inventor: Yasuhito Aruga
  • Publication number: 20020117328
    Abstract: A first driver IC is mounted in the area which includes one side of the panel substrate on an electro-optical panel, and the edge portion of the film base material on which a second driver IC is mounted is bonded to the vicinity of the one side of the above-mentioned panel substrate. Also, driver-controlling electronic components which each provides control signals to the first and second driver ICs are mounted on the same surface as the second driver IC in the film base material.
    Type: Application
    Filed: February 26, 2002
    Publication date: August 29, 2002
    Inventors: Eiji Oishi, Masanori Yumoto, Yasuhito Aruga
  • Publication number: 20020117669
    Abstract: The shape of the picture frame area of the electro-optical device is to be made symmetrical. The IC chip on panel is mounted in the edge area, along one side of the panel substrate of the electro-optical panel. Additionally, the IC chip on base material is mounted on the base material joined to said panel substrate. Said IC chip on base material is mounted on the surface containing the panel joining part joined to said panel substrate.
    Type: Application
    Filed: February 15, 2002
    Publication date: August 29, 2002
    Inventor: Yasuhito Aruga
  • Publication number: 20020089634
    Abstract: A wiring substrate is formed of a plurality of metal wirings 14e formed on a substrate 7c. A guard wiring 29 fabricated of an electrically conductive oxide such as ITO is interposed between at least a pair of adjacent ones of a plurality of metal wirings 14e. When voltages V1, V2, V3, and V4 applied to the metal wirings 14e are related to be V1>V2 >V3 >V4, a guard wiring 29 is present between a metal wiring 14e functioning as an anode and a metal wiring 14e functioning as a cathode, and the anode metal wiring 14e is prevented from being corroded.
    Type: Application
    Filed: October 24, 2001
    Publication date: July 11, 2002
    Inventors: Yasuhito Aruga, Satoshi Yatabe, Kogo Endo, Norihito Harada