Patents by Inventor Yasumasa Kasuya

Yasumasa Kasuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230298981
    Abstract: A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.
    Type: Application
    Filed: May 26, 2023
    Publication date: September 21, 2023
    Inventors: Hiroaki MATSUBARA, Yasumasa KASUYA
  • Patent number: 11699641
    Abstract: A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: July 11, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Hiroaki Matsubara, Yasumasa Kasuya
  • Publication number: 20220310491
    Abstract: An electronic device includes: an electronic element having an element obverse surface and an element reverse surface spaced apart from each other in a first direction, the element obverse surface being provided with an obverse-surface electrode; a resin member having a resin reverse surface facing in a same direction as the element reverse surface, the resin member covering the electronic element; and an electrically conductive member supporting the electronic element and electrically connected to the electronic element. The electrically conductive member has a first exposed region, a second exposed region and a third exposed region each of which is exposed from the resin reverse surface. The resin member has a first resin side surface and a second resin side surface connected to each other and standing up from the resin reverse surface. As viewed in the first direction, the first exposed region is located at a corner portion where the first resin side surface and the second resin side surface are connected.
    Type: Application
    Filed: June 25, 2020
    Publication date: September 29, 2022
    Inventors: Toshiro TSUCHIYAMA, Yasumasa KASUYA, Tatsuo YAMAZAKI
  • Publication number: 20220028763
    Abstract: A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.
    Type: Application
    Filed: October 12, 2021
    Publication date: January 27, 2022
    Inventors: Hiroaki MATSUBARA, Yasumasa KASUYA
  • Patent number: 11177198
    Abstract: A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: November 16, 2021
    Assignee: ROHM CO., LTD.
    Inventors: Hiroaki Matsubara, Yasumasa Kasuya
  • Patent number: 10832996
    Abstract: A power module includes a first die pad, a first switching element, a second die pad, a second switching element, an integrated circuit element, an encapsulation resin, and a lead frame assembly. The encapsulation resin encapsulates the first switching element, the second switching element, and the integrated circuit element. The lead frame assembly includes an outer lead and an inner lead. The lead frame assembly includes a first lead frame and a second lead frame. The first lead frame includes a first inner lead connected to the first die pad and a first outer lead connected to the first inner lead. The second lead frame includes a second inner lead connected to the second die pad and a second outer lead connected to the second inner lead.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: November 10, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Yasumasa Kasuya, Hiroaki Matsubara, Hiroshi Kumano, Toshio Nakajima, Shigeru Hirata, Yuji Ishimatsu
  • Patent number: 10790258
    Abstract: An electronic device includes an electronic element, a plurality of first sub-electrodes arrayed in a first direction, a plurality of second sub-electrodes arrayed in a second direction that is orthogonal to the first direction, a dummy electrode, and a sealing resin. The sealing resin has a resin back surface from which the plurality of first sub-electrodes, the plurality of second sub-electrodes and the dummy electrode are exposed. The plurality of second sub-electrodes are located further in the first direction than any of the plurality of first sub-electrodes. The plurality of first sub-electrodes are located further in the second direction than any of the plurality of second sub-electrodes. The dummy electrode is located further in the first direction than any of the plurality of first sub-electrodes, and is located further in the second direction than any of the plurality of second sub-electrodes.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: September 29, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Hiroaki Matsubara, Yasumasa Kasuya, Taro Nishioka
  • Publication number: 20200251410
    Abstract: A power module includes a first die pad, a first switching element, a second die pad, a second switching element, an integrated circuit element, an encapsulation resin, and a lead frame assembly. The encapsulation resin encapsulates the first switching element, the second switching element, and the integrated circuit element. The lead frame assembly includes an outer lead and an inner lead. The lead frame assembly includes a first lead frame and a second lead frame. The first lead frame includes a first inner lead connected to the first die pad and a first outer lead connected to the first inner lead. The second lead frame includes a second inner lead connected to the second die pad and a second outer lead connected to the second inner lead.
    Type: Application
    Filed: April 20, 2020
    Publication date: August 6, 2020
    Inventors: Yasumasa KASUYA, Hiroaki MATSUBARA, Hiroshi KUMANO, Toshio NAKAJIMA, Shigeru HIRATA, Yuji ISHIMATSU
  • Patent number: 10679928
    Abstract: A power module includes a first die pad, a first switching element, a second die pad, a second switching element, an integrated circuit element, an encapsulation resin, and a lead frame assembly. The encapsulation resin encapsulates the first switching element, the second switching element, and the integrated circuit element. The lead frame assembly includes an outer lead and an inner lead. The lead frame assembly includes a first lead frame and a second lead frame. The first lead frame includes a first inner lead connected to the first die pad and a first outer lead connected to the first inner lead. The second lead frame includes a second inner lead connected to the second die pad and a second outer lead connected to the second inner lead.
    Type: Grant
    Filed: August 1, 2017
    Date of Patent: June 9, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Yasumasa Kasuya, Hiroaki Matsubara, Hiroshi Kumano, Toshio Nakajima, Shigeru Hirata, Yuji Ishimatsu
  • Publication number: 20200066619
    Abstract: A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.
    Type: Application
    Filed: November 1, 2019
    Publication date: February 27, 2020
    Inventors: Hiroaki MATSUBARA, Yasumasa KASUYA
  • Patent number: 10497644
    Abstract: A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: December 3, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Hiroaki Matsubara, Yasumasa Kasuya
  • Patent number: 10366948
    Abstract: A semiconductor device 1 includes a semiconductor chip 2, a plurality of leads 4, disposed in a periphery of the semiconductor chip 2, and a sealing resin 5, sealing the semiconductor chip 2 and the leads 4 such that lower surfaces 18 and outer end surfaces 20 at sides opposite the semiconductor chip 2 of the leads 4 are exposed. Lead plating layers 21 arranged to improve solder wettability are formed on the lower surfaces 18 and the outer end surfaces 20 of the leads 4.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: July 30, 2019
    Assignee: ROHM CO., LTD.
    Inventor: Yasumasa Kasuya
  • Publication number: 20190157236
    Abstract: An electronic device includes an electronic element, a plurality of first sub-electrodes arrayed in a first direction, a plurality of second sub-electrodes arrayed in a second direction that is orthogonal to the first direction, a dummy electrode, and a sealing resin. The sealing resin has a resin back surface from which the plurality of first sub-electrodes, the plurality of second sub-electrodes and the dummy electrode are exposed. The plurality of second sub-electrodes are located further in the first direction than any of the plurality of first sub-electrodes. The plurality of first sub-electrodes are located further in the second direction than any of the plurality of second sub-electrodes. The dummy electrode is located further in the first direction than any of the plurality of first sub-electrodes, and is located further in the second direction than any of the plurality of second sub-electrodes.
    Type: Application
    Filed: December 12, 2018
    Publication date: May 23, 2019
    Inventors: Hiroaki MATSUBARA, Yasumasa KASUYA, Taro NISHIOKA
  • Patent number: 10192845
    Abstract: An electronic device includes an electronic element, a plurality of first sub-electrodes arrayed in a first direction, a plurality of second sub-electrodes arrayed in a second direction that is orthogonal to the first direction, a dummy electrode, and a sealing resin. The sealing resin has a resin back surface from which the plurality of first sub-electrodes, the plurality of second sub-electrodes and the dummy electrode are exposed. The plurality of second sub-electrodes are located further in the first direction than any of the plurality of first sub-electrodes. The plurality of first sub-electrodes are located further in the second direction than any of the plurality of second sub-electrodes. The dummy electrode is located further in the first direction than any of the plurality of first sub-electrodes, and is located further in the second direction than any of the plurality of second sub-electrodes.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: January 29, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Hiroaki Matsubara, Yasumasa Kasuya, Taro Nishioka
  • Patent number: 10163850
    Abstract: A semiconductor device according to the present invention includes a semiconductor chip, an electrode pad made of a metal material containing aluminum and formed on a top surface of the semiconductor chip, an electrode lead disposed at a periphery of the semiconductor chip, a bonding wire having a linearly-extending main body portion and having a pad bond portion and a lead bond portion formed at respective ends of the main body portion and respectively bonded to the electrode pad and the electrode lead, and a resin package sealing the semiconductor chip, the electrode lead, and the bonding wire, the bonding wire is made of copper, and the entire electrode pad and the entire pad bond portion are integrally covered by a water-impermeable film.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: December 25, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Motoharu Haga, Shingo Yoshida, Yasumasa Kasuya, Toichi Nagahara, Akihiro Kimura, Kenji Fujii
  • Publication number: 20180331025
    Abstract: A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.
    Type: Application
    Filed: July 25, 2018
    Publication date: November 15, 2018
    Inventors: Hiroaki MATSUBARA, Yasumasa KASUYA
  • Patent number: 10056318
    Abstract: A semiconductor device includes a semiconductor element circuit, a conductive support and a sealing resin. The conductive support includes a die pad, first terminals spaced in a first direction, second terminals spaced in the first direction and opposite to the first terminals in a second direction perpendicular to the first direction, and a support terminal connected to the die pad. The sealing resin encapsulates portions of the first and second terminals, a portion of the support terminal, the semiconductor element circuit and the die pad. The sealing resin has two first side surfaces spaced apart in the second direction and two second side surfaces spaced apart in the first direction. The first terminals and second terminals are exposed from the first side surfaces, while none of the elements of the conductive support is exposed from the second side surfaces.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: August 21, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Hiroaki Matsubara, Yasumasa Kasuya
  • Publication number: 20180182729
    Abstract: An electronic device includes an electronic element, a plurality of first sub-electrodes arrayed in a first direction, a plurality of second sub-electrodes arrayed in a second direction that is orthogonal to the first direction, a dummy electrode, and a sealing resin. The sealing resin has a resin back surface from which the plurality of first sub-electrodes, the plurality of second sub-electrodes and the dummy electrode are exposed. The plurality of second sub-electrodes are located further in the first direction than any of the plurality of first sub-electrodes. The plurality of first sub-electrodes are located further in the second direction than any of the plurality of second sub-electrodes. The dummy electrode is located further in the first direction than any of the plurality of first sub-electrodes, and is located further in the second direction than any of the plurality of second sub-electrodes.
    Type: Application
    Filed: February 26, 2018
    Publication date: June 28, 2018
    Inventors: Hiroaki MATSUBARA, Yasumasa KASUYA, Taro NISHIOKA
  • Patent number: 9991213
    Abstract: A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device (100) comprises a semiconductor chip (1) including a silicon substrate, a die pad (10) to which the semiconductor chip (1) is secured through a first solder layer (2), a resin-encapsulating layer (30) encapsulating the semiconductor chip (1), and lead terminals (21) electrically connected to the semiconductor chip (1) and including inner lead portion (21b) covered with the resin-encapsulating layer (30). The lead terminals (21) are made of copper or a copper alloy. The die pad (10) is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals (21).
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: June 5, 2018
    Assignee: Rohm Co., Ltd.
    Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
  • Patent number: D824866
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: August 7, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Hiroaki Matsubara, Yasumasa Kasuya, Shigeru Hirata