Patents by Inventor Yasumasa Kasuya
Yasumasa Kasuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150200181Abstract: A semiconductor device according to the present invention includes a semiconductor chip, an electrode pad made of a metal material containing aluminum and formed on a top surface of the semiconductor chip, an electrode lead disposed at a periphery of the semiconductor chip, a bonding wire having a linearly-extending main body portion and having a pad bond portion and a lead bond portion formed at respective ends of the main body portion and respectively bonded to the electrode pad and the electrode lead, and a resin package sealing the semiconductor chip, the electrode lead, and the bonding wire, the bonding wire is made of copper, and the entire electrode pad and the entire pad bond portion are integrally covered by a water-impermeable film.Type: ApplicationFiled: March 20, 2015Publication date: July 16, 2015Applicant: ROHM CO., LTD.Inventors: Motoharu HAGA, Shingo YOSHIDA, Yasumasa KASUYA, Toichi NAGAHARA, Akihiro KIMURA, Kenji FUJII
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Publication number: 20140332944Abstract: A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device (100) comprises a semiconductor chip (1) including a silicon substrate, a die pad (10) to which the semiconductor chip (1) is secured through a first solder layer (2), a resin-encapsulating layer (30) encapsulating the semiconductor chip (1), and lead terminals (21) electrically connected to the semiconductor chip (1) and including inner lead portion (21b) covered with the resin-encapsulating layer (30). The lead terminals (21) are made of copper or a copper alloy. The die pad (10) is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals (21).Type: ApplicationFiled: July 28, 2014Publication date: November 13, 2014Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
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Publication number: 20140312513Abstract: The semiconductor device can prevent damages on a semiconductor chip even when a soldering material is used for bonding the back surface of the semiconductor chip to the junction plane of a chip junction portion such as an island or a die pad. This semiconductor device includes a semiconductor chip and a chip junction portion having a junction plane that is bonded to the back surface of the semiconductor chip with a soldering material. The junction plane is smaller in size than the back surface of the semiconductor chip. This semiconductor device may further include a plurality of extending portions which extend respectively from the periphery of the junction plane to directions parallel with the junction plane.Type: ApplicationFiled: July 2, 2014Publication date: October 23, 2014Applicant: ROHM CO., LTD.Inventors: Yasumasa KASUYA, Motoharu HAGA, Hiroaki MATSUBARA
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Patent number: 8829660Abstract: A resin-sealed semiconductor device includes a semiconductor chip including a silicon substrate; a die pad on which the semiconductor chip is secured via a solder layer; a sealing resin layer sealing the semiconductor chip; and lead terminals connected electrically with the semiconductor chip. One end portion of the lead terminals is covered by the sealing resin layer. The die pad and the lead terminals are formed of copper and a copper alloy, and the die pad is formed with a thickness larger than a thickness of the lead terminals, which is a thickness of 0.25 mm or more.Type: GrantFiled: September 15, 2011Date of Patent: September 9, 2014Assignee: Rohm Co., Ltd.Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
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Patent number: 8810016Abstract: The semiconductor device can prevent damages on a semiconductor chip even when a soldering material is used for bonding the back surface of the semiconductor chip to the junction plane of a chip junction portion such as an island or a die pad. This semiconductor device includes a semiconductor chip and a chip junction portion having a junction plane that is bonded to the back surface of the semiconductor chip with a soldering material. The junction plane is smaller in size than the back surface of the semiconductor chip. This semiconductor device may further include a plurality of extending portions which extend respectively from the periphery of the junction plane to directions parallel with the junction plane.Type: GrantFiled: February 28, 2011Date of Patent: August 19, 2014Assignee: Rohm Co., Ltd.Inventors: Yasumasa Kasuya, Motoharu Haga, Hiroaki Matsubara
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Patent number: 8368234Abstract: A semiconductor device is provided in which a semiconductor chip is bonded to a substrate with a sufficiently increased bonding strength and cracking is assuredly prevented which may otherwise occur due to heat shock, heat cycle and the like. The semiconductor device includes a semiconductor chip and a substrate having a bonding area to which the semiconductor chip is bonded via a metal layer. The metal layer includes an Au—Sn—Ni alloy layer and a solder layer provided on the Au—Sn—Ni alloy layer. Undulations are formed in an interface between the Au—Sn—Ni alloy layer and the solder layer.Type: GrantFiled: January 24, 2011Date of Patent: February 5, 2013Assignee: Rohm Co., Ltd.Inventors: Motoharu Haga, Yasumasa Kasuya, Hiroaki Matsubara
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Patent number: 8350371Abstract: The semiconductor device according to the present invention includes a semiconductor chip, a solid plate to which the semiconductor chip is bonded, and a bonding member made of a BiSn-based material interposed between the semiconductor chip and the solid plate, while the bonding member has a heat conduction path made of Ag for improving heat conductivity between the semiconductor chip and the solid plate.Type: GrantFiled: April 23, 2010Date of Patent: January 8, 2013Assignee: Rohm Co., Ltd.Inventors: Motoharu Haga, Shoji Yasunaga, Yasumasa Kasuya
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Publication number: 20120153444Abstract: A semiconductor device according to the present invention includes a semiconductor chip, an electrode pad made of a metal material containing aluminum and formed on a top surface of the semiconductor chip, an electrode lead disposed at a periphery of the semiconductor chip, a bonding wire having a linearly-extending main body portion and having a pad bond portion and a lead bond portion formed at respective ends of the main body portion and respectively bonded to the electrode pad and the electrode lead, and a resin package sealing the semiconductor chip, the electrode lead, and the bonding wire, the bonding wire is made of copper, and the entire electrode pad and the entire pad bond portion are integrally covered by a water-impermeable film.Type: ApplicationFiled: June 17, 2010Publication date: June 21, 2012Applicant: ROHM CO., LTDInventors: Motoharu Haga, Shingo Yoshida, Yasumasa Kasuya, Toichi Nagahara, Akihiro Kimura, Kenji Fujii
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Patent number: 8115299Abstract: A semiconductor device and a lead frame capable of preventing development of defective mounting resulting from a burr and a method of manufacturing a semiconductor device with the lead frame are provided. The semiconductor device includes a semiconductor chip and a lead arranged on the periphery of the semiconductor chip to extend in a direction intersecting with the side surface of the semiconductor chip, so that at least an end portion on the side farther from the semiconductor chip is bonded to a mounting substrate. A groove opened on a surface bonded to the mounting substrate and an end face on the side farther from the semiconductor chip is formed in the lead over the full width in the width direction orthogonal to the thickness direction and along the end face. An embedded body made of solder is embedded in the groove.Type: GrantFiled: February 27, 2008Date of Patent: February 14, 2012Assignee: Rohm Co., Ltd.Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
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Publication number: 20120007247Abstract: A resin-sealed semiconductor device includes a semiconductor chip including a silicon substrate; a die pad on which the semiconductor chip is secured via a solder layer; a sealing resin layer sealing the semiconductor chip; and lead terminals connected electrically with the semiconductor chip. One end portion of the lead terminals is covered by the sealing resin layer. The die pad and the lead terminals are formed of copper and a copper alloy, and the die pad is formed with a thickness larger than a thickness of the lead terminals, which is a thickness of 0.25 mm or more.Type: ApplicationFiled: September 15, 2011Publication date: January 12, 2012Applicant: ROHM CO., LTD.Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
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Patent number: 8039934Abstract: A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device comprises a semiconductor chip including a silicon substrate, a die pad to which the semiconductor chip is secured through a first solder layer, a resin-encapsulating layer encapsulating the semiconductor chip, and lead terminals electrically connected to the semiconductor chip and including inner lead portion covered with the resin-encapsulating layer. The lead terminals are made of copper or a copper alloy. The die pad is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals.Type: GrantFiled: January 24, 2008Date of Patent: October 18, 2011Assignee: Rohm Co., Ltd.Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
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Patent number: 8022532Abstract: An interposer and a semiconductor device including the interposer, which can prevent thermal warpage of an insulative substrate. The interposer is provided with a semiconductor chip in a semiconductor device and may be disposed between the semiconductor chip and a mount board. The interposer includes: a substrate of an insulative resin; an island on one surface of the substrate to be bonded to a rear surface of the chip; a thermal pad on the other surface opposite the one surface opposed to the island with the intervention of the substrate; and a thermal via extending through the substrate from the one surface to the other surface to thermally connect the island to the thermal pad.Type: GrantFiled: June 2, 2006Date of Patent: September 20, 2011Assignee: Rohm Co., Ltd.Inventors: Yasumasa Kasuya, Sadamasa Fujii, Motoharu Haga
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Publication number: 20110156226Abstract: An interposer and a semiconductor device including the interposer are provided, which can prevent thermal warpage of an insulative substrate thereof. The interposer is provided with a semiconductor chip in a semiconductor device andmay be disposed between the semiconductor chip and a mount board. The interposer includes: a substrate of an insulative resin; an island on one surface of the substrate to be bonded to a rear surface of the chip; a thermal pad on the other surface opposite the one surface opposed to the island with the intervention of the substrate; and a thermal via extending through the substrate from the one surface to the other surface to thermally connect the island to the thermal pad.Type: ApplicationFiled: March 9, 2011Publication date: June 30, 2011Applicant: ROHM CO., LTD.Inventors: Yasumasa KASUYA, Sadamasa FUJII, Motoharu HAGA
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Publication number: 20110140256Abstract: The semiconductor device can prevent damages on a semiconductor chip even when a soldering material is used for bonding the back surface of the semiconductor chip to the junction plane of a chip junction portion such as an island or a die pad. This semiconductor device includes a semiconductor chip and a chip junction portion having a junction plane that is bonded to the back surface of the semiconductor chip with a soldering material. The junction plane is smaller in size than the back surface of the semiconductor chip. This semiconductor device may further include a plurality of extending portions which extend respectively from the periphery of the junction plane to directions parallel with the junction plane.Type: ApplicationFiled: February 28, 2011Publication date: June 16, 2011Applicant: ROHM CO., LTD.Inventors: Yasumasa KASUYA, Motoharu HAGA, Hiroaki MATSUBARA
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Publication number: 20110115089Abstract: A semiconductor device is provided in which a semiconductor chip is bonded to a substrate with a sufficiently increased bonding strength and cracking is assuredly prevented which may otherwise occur due to heat shock, heat cycle and the like. The semiconductor device includes a semiconductor chip and a substrate having a bonding area to which the semiconductor chip is bonded via a metal layer. The metal layer includes an Au—Sn—Ni alloy layer and a solder layer provided on the Au—Sn—Ni alloy layer. Undulations are formed in an interface between the Au—Sn—Ni alloy layer and the solder layer.Type: ApplicationFiled: January 24, 2011Publication date: May 19, 2011Applicant: ROHM CO., LTD.Inventors: Motoharu Haga, Yasumasa Kasuya, Hiroaki Matsubara
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Patent number: 7923834Abstract: An interposer and a semiconductor device including the interposer, which can prevent thermal warpage of an insulative substrate. The interposer is provided with a semiconductor chip in a semiconductor device and may be disposed between the semiconductor chip and a mount board. The interposer includes: a substrate of an insulative resin; an island on one surface of the substrate to be bonded to a rear surface of the chip; a thermal pad on the other surface opposite the one surface opposed to the island with the intervention of the substrate; and a thermal via extending through the substrate from the one surface to the other surface to thermally connect the island to the thermal pad.Type: GrantFiled: June 2, 2006Date of Patent: April 12, 2011Assignee: ROHM Co., Ltd.Inventors: Yasumasa Kasuya, Sadamasa Fujii, Motoharu Haga
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Patent number: 7902681Abstract: A semiconductor device is provided in which a semiconductor chip is bonded to a substrate with a sufficiently increased bonding strength and cracking is assuredly prevented which may otherwise occur due to heat shock, heat cycle and the like. The semiconductor device includes a semiconductor chip and a substrate having a bonding area to which the semiconductor chip is bonded via a metal layer. The metal layer includes an Au—Sn—Ni alloy layer and a solder layer provided on the Au—Sn—Ni alloy layer. Undulations are formed in an interface between the Au—Sn—Ni alloy layer and the solder layer.Type: GrantFiled: August 18, 2006Date of Patent: March 8, 2011Assignee: Rohm Co., Ltd.Inventors: Motoharu Haga, Yasumasa Kasuya, Hiroaki Matsubara
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Patent number: 7825498Abstract: A semiconductor device according to the present invention includes an island provided on one surface of a resin substrate, an external terminal provided on the other surface of the substrate, a thermal pad provided on the other surface of the substrate in opposed relation to the island, a heat conduction portion extending through the substrate from the one surface to the other surface to connect the island to the thermal pad in a thermally conductive manner, and a solder resist portion provided on the other surface of the substrate and having a heat dissipation opening which defines a gap with respect to an outer periphery of the thermal pad and a terminal opening which exposes the external terminal.Type: GrantFiled: September 20, 2007Date of Patent: November 2, 2010Assignee: Rohm Co., Ltd.Inventors: Motoharu Haga, Yasumasa Kasuya
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Publication number: 20100270666Abstract: The semiconductor device according to the present invention includes a semiconductor chip, a solid plate to which the semiconductor chip is bonded, and a bonding member made of a BiSn-based material interposed between the semiconductor chip and the solid plate, while the bonding member has a heat conduction path made of Ag for improving heat conductivity between the semiconductor chip and the solid plate.Type: ApplicationFiled: April 23, 2010Publication date: October 28, 2010Applicant: ROHM CO., LTD.Inventors: Motoharu Haga, Shoji Yasunaga, Yasumasa Kasuya
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Publication number: 20100013095Abstract: A semiconductor device is provided in which a semiconductor chip is bonded to a substrate with a sufficiently increased bonding strength and cracking is assuredly prevented which may otherwise occur due to heat shock, heat cycle and the like. The semiconductor device includes a semiconductor chip and a substrate having a bonding area to which the semiconductor chip is bonded via a metal layer. The metal layer includes an Au—Sn—Ni alloy layer and a solder layer provided on the Au—Sn—Ni alloy layer. Undulations are formed in an interface between the Au—Sn—Ni alloy layer and the solder layer.Type: ApplicationFiled: August 18, 2006Publication date: January 21, 2010Inventors: Motoharu Hada, Yasumasa Kasuya, Hiroaki Matsubara