Patents by Inventor Yasushi Maruyama

Yasushi Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8471314
    Abstract: A solid-state imaging device includes a substrate having a first surface and a second surface, light being incident on the second surface side; a wiring layer disposed on the first surface side; a photodetector formed in the substrate and including a first region of a first conductivity type; a transfer gate disposed on the first surface of the substrate and adjacent to the photodetector, the transfer gate transferring a signal charge accumulated in the photodetector; and at least one control gate disposed on the first surface of the substrate and superposed on the photodetector, the control gate controlling the potential of the photodetector in the vicinity of the first surface.
    Type: Grant
    Filed: February 11, 2010
    Date of Patent: June 25, 2013
    Assignee: Sony Corporation
    Inventors: Yasushi Maruyama, Tetsuji Yamaguchi, Takashi Ando, Susumu Hiyama, Yuko Ohgishi
  • Patent number: 8440499
    Abstract: A back-illuminated type solid-state image pickup device (1041) includes read circuits (Tr1, Tr2) formed on one surface of a semiconductor substrate (1042) to read a signal from a photo-electric conversion element (PD) formed on the semiconductor substrate (1042), in which electric charges (e) generated in a photo-electric conversion region (1052c1) formed under at least one portion of the read circuits (Tr1, Tr2) are collected to an electric charge accumulation region (1052a) formed on one surface side of the semiconductor substrate (1042) of the photo-electric conversion element (PD) by electric field formed within the photo-electric conversion element (PD). Thus, the solid-state image pickup device and the camera are able to make the size of pixel become very small without lowering a saturation electric charge amount (Qs) and sensitivity.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: May 14, 2013
    Assignee: Sony Corporation
    Inventors: Shin Iwabuchi, Kazuhide Yokota, Takeshi Yanagita, Yasushi Maruyama
  • Patent number: 8421178
    Abstract: A solid-state imaging device including an imaging area formed of a plurality of pixels arrayed in a two-dimensional matrix is provided. The solid-state imaging device includes: a photoelectric conversion portion including a charge accumulation region provided on a semiconductor substrate; a read transistor for reading electric charges from the photoelectric conversion portion; and a gettering site for separating metal impurities within the semiconductor substrate from at least the photoelectric conversion portion. The photoelectric conversion portion is provided on the surface side of the semiconductor substrate, and the gettering site is provided on the rear side away from the semiconductor substrate.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: April 16, 2013
    Assignee: Sony Corporation
    Inventor: Yasushi Maruyama
  • Patent number: 8413355
    Abstract: P type semiconductor well regions 8 and 9 for device separation are provided in an upper and lower two layer structure in conformity with the position of a high sensitivity type photodiode PD, and the first P type semiconductor well region 8 at the upper layer is provided in the state of being closer to the pixel side than an end portion of a LOCOS layer 1A, for limiting a dark current generated at the end portion of the LOCOS layer 1A. In addition, the second P type semiconductor well region 9 at the lower layer is formed in a narrow region receding from the photodiode PD, so that the depletion layer of the photodiode PD is prevented from being obstructed, and the depletion is secured in a sufficiently broad region, whereby enhancement of the sensitivity of the photodiode PD can be achieved.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: April 9, 2013
    Assignee: Sony Corporation
    Inventors: Hiroaki Fujita, Ryoji Suzuki, Nobuo Nakamura, Yasushi Maruyama
  • Patent number: 8309392
    Abstract: A back-illuminated type solid-state image pickup device (1041) includes read circuits (Tr1, Tr2) formed on one surface of a semiconductor substrate (1042) to read a signal from a photo-electric conversion element (PD) formed on the semiconductor substrate (1042), in which electric charges (e) generated in a photo-electric conversion region (1052c1) formed under at least one portion of the read circuits (Tr1, Tr2) are collected to an electric charge accumulation region (1052a) formed on one surface side of the semiconductor substrate (1042) of the photo-electric conversion element (PD) by electric field formed within the photo-electric conversion element (PD). Thus, the solid-state image pickup device and the camera are able to make the size of pixel become very small without lowering a saturation electric charge amount (Qs) and sensitivity.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: November 13, 2012
    Assignee: Sony Corporation
    Inventors: Shin Iwabuchi, Kazuhide Yokota, Takeshi Yanagita, Yasushi Maruyama
  • Publication number: 20120256284
    Abstract: An imaging device includes: an optical sensor including a light receiving unit capable of forming an object image; a seal material for protecting the light receiving unit of the optical sensor; an intermediate layer formed at least between the light receiving unit and an opposite surface of the seal material facing the light receiving unit; and a control film arranged between the intermediate layer and the opposite surface of the seal material, wherein, in the control film, a cutoff wavelength is shifted to a shortwave side in accordance with an incident angle of light which is obliquely incident on the film.
    Type: Application
    Filed: February 16, 2012
    Publication date: October 11, 2012
    Applicant: Sony Corporation
    Inventors: Hiroaki YUKAWA, Kensaku Maeda, Taizo Takachi, Yasushi Maruyama
  • Publication number: 20120147241
    Abstract: A solid-state imaging device includes a substrate with oppositely facing first surface and second surfaces, light being received through the second surface; a wiring layer on the first surface; a photodetector in the substrate; a charge accummulation region between the second surface and the photodetector; and an insulating layer over the second surface, the insulating layer have a region that is at least partially crystallized.
    Type: Application
    Filed: February 22, 2012
    Publication date: June 14, 2012
    Applicant: SONY CORPORATION
    Inventors: Tetsuji Yamaguchi, Yasushi Maruyama, Takashi Ando, Susumu Hiyama, Yuko Ohgishi
  • Publication number: 20120135559
    Abstract: A method for manufacturing a solid-state imaging device including: forming photo sensor portions in a silicon substrate; forming a wiring portion above said silicon substrate; bonding another substrate onto said wiring portion; removing said substrate in response to performing the bonding of the another substrate onto the wiring portion; and sequentially forming an anti-reflective coating on the silicon substrate, a color filter on the anti-reflective coating, and an on-chip lens.
    Type: Application
    Filed: February 6, 2012
    Publication date: May 31, 2012
    Applicant: SONY CORPORATION
    Inventors: Yasushi Maruyama, Hideshi Abe, Hiroyuki Mori
  • Patent number: 8183603
    Abstract: A solid-state imaging device includes a substrate having a first surface and a second surface, light being incident on the second surface side; a wiring layer disposed on the first surface side; a photodetector formed in the substrate and including a first region of a first conductivity type; a transfer gate disposed on the first surface of the substrate and adjacent to the photodetector, the transfer gate transferring a signal charge accumulated in the photodetector; and at least one control gate disposed on the first surface of the substrate and superposed on the photodetector, the control gate controlling the potential of the photodetector in the vicinity of the first surface.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: May 22, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuji Yamaguchi, Yasushi Maruyama, Takashi Ando, Susumu Hiyama, Yuko Ohgishi
  • Publication number: 20120113292
    Abstract: A solid-state imaging device includes pixel cells that are formed on a substrate having a first substrate surface side, on which light is irradiated, and a second substrate surface side, on which elements are formed, and separated by an adjacent cell group and an element separation layer for each of the pixel cells or with plural pixel cells as a unit. Each of the pixel cells has a first conductive well formed on the first substrate surface side and a second conductive well formed on the second substrate surface side. The first conductive well receives light from the first substrate surface side and has a photoelectric conversion function and a charge accumulation function for the received light. A transistor that detects accumulated charges in the first conductive well and has a threshold modulation function is formed in the second conductive well.
    Type: Application
    Filed: January 12, 2012
    Publication date: May 10, 2012
    Applicant: SONY CORPORATION
    Inventors: Isao Hirota, Kouichi Harada, Nobuhiro Karasawa, Yasushi Maruyama, Yoshikazu Nitta, Hiroyuki Terakago, Hajime Takashima, Hideo Nomura
  • Patent number: 8138065
    Abstract: A solid-state imaging device having a high sensitivity and a structure in which a miniaturized pixel is obtained, and a method for manufacturing the solid-state imaging device in which an interface is stable, a spectroscopic characteristic is excellent and which can be manufactured with a high yield ratio are provided. The solid-state imaging device includes at least a silicon layer formed with a photo sensor portion and a wiring layer formed on the front-surface side of the silicon layer, and in which light L is made to enter from the rear-surface side opposite to the front-surface side of the silicon layer and the thickness of the silicon layer 4 is 10 ?m or less.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: March 20, 2012
    Assignee: Sony Corporation
    Inventors: Yasushi Maruyama, Hideshi Abe, Hiroyuki Mori
  • Patent number: 8110856
    Abstract: A solid-state imaging device having a high sensitivity and a structure in which a miniaturized pixel is obtained, and a method for manufacturing the solid-state imaging device in which an interface is stable, a spectroscopic characteristic is excellent and which can be manufactured with a high yield ratio. The solid-state imaging device includes at least a silicon layer formed with a photo sensor portion and a wiring layer formed on the front-surface side of the silicon layer, and in which light L is made to enter from a rear-surface side. The thickness of the silicon layer 4 is 10 ?m or less.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: February 7, 2012
    Assignee: Sony Corporation
    Inventors: Yasushi Maruyama, Hideshi Abe, Hiroyuki Mori
  • Patent number: 8106983
    Abstract: A solid-state imaging device includes pixel cells that are formed on a substrate having a first substrate surface side, on which light is irradiated, and a second substrate surface side, on which elements are formed, and separated by an adjacent cell group and an element separation layer for each of the pixel cells or with plural pixel cells as a unit. Each of the pixel cells has a first conductive well formed on the first substrate surface side and a second conductive well formed on the second substrate surface side. The first conductive well receives light from the first substrate surface side and has a photoelectric conversion function and a charge accumulation function for the received light. A transistor that detects accumulated charges in the first conductive well and has a threshold modulation function is formed in the second conductive well.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: January 31, 2012
    Assignee: Sony Corporation
    Inventors: Isao Hirota, Kouichi Harada, Nobuhiro Karasawa, Yasushi Maruyama, Yoshikazu Nitta, Hiroyuki Terakago, Hajime Takashima, Hideo Nomura
  • Patent number: 8068156
    Abstract: A CMOS solid state imaging device capable of achieving a higher image quality while reducing the size and power consumption and increasing the number of pixels and speeds. The CMOS solid state imaging device includes a light-receiving portion that performs photoelectric conversion according to a quantity of received light, a transfer gate used to read out charges obtained through the photoelectric conversion in the light-receiving portion, and a peripheral transistor in a periphery of the light-receiving portion. A voltage applied to the transfer gate is set higher than a voltage applied to the peripheral transistor.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: November 29, 2011
    Assignee: Sony Corporation
    Inventor: Yasushi Maruyama
  • Publication number: 20110269258
    Abstract: A method for manufacturing a solid-state imaging device in which: photo sensor portions are formed in a silicon layer over a substrate, a first conductivity type region being included in the photo sensor portions and a second conductivity type region being formed in the silicon layer implanted from a rear-surface of the solid-state imaging device by ion implantation; a wiring portion is formed above the silicon layer; and a supporting substrate is bonded to the wiring portion, wherein, the solid-state imaging device is configured for receiving incident light via the rear-surface of the solid-state imaging device.
    Type: Application
    Filed: July 13, 2011
    Publication date: November 3, 2011
    Applicant: SONY CORPORATION
    Inventors: Yasushi Maruyama, Hideshi Abe, Hiroyuki Mori
  • Patent number: 8049293
    Abstract: A back-illuminated type solid-state image pickup device (1041) includes read circuits (Tr1, Tr2) formed on one surface of a semiconductor substrate (1042) to read a signal from a photo-electric conversion element (PD) formed on the semiconductor substrate (1042), in which electric charges (e) generated in a photo-electric conversion region (1052c1) formed under at least one portion of the read circuits (Tr1, Tr2) are collected to an electric charge accumulation region (1052a) formed on one surface side of the semiconductor substrate (1042) of the photo-electric conversion element (PD) by electric field formed within the photo-electric conversion element (PD). Thus, the solid-state image pickup device and the camera are able to make the size of pixel become very small without lowering a saturation electric charge amount (Qs) and sensitivity.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: November 1, 2011
    Assignee: Sony Corporation
    Inventors: Shin Iwabuchi, Kazuhide Yokota, Takeshi Yanagita, Yasushi Maruyama
  • Publication number: 20110250717
    Abstract: A solid-state imaging device having a high sensitivity and a structure in which a miniaturized pixel is obtained, and a method for manufacturing the solid-state imaging device in which an interface is stable, a spectroscopic characteristic is excellent and which can be manufactured with a high yield ratio are provided. The solid-state imaging device includes at least a silicon layer formed with a photo sensor portion and a wiring layer formed on the front-surface side of the silicon layer, and in which light L is made to enter from the rear-surface side opposite to the front-surface side of the silicon layer and the thickness of the silicon layer 4 is 10 ?m or less.
    Type: Application
    Filed: June 17, 2011
    Publication date: October 13, 2011
    Applicant: SONY CORPORATION
    Inventors: Yasushi MARUYAMA, Hideshi ABE, Hiroyuki MORI
  • Publication number: 20110234983
    Abstract: A substrate connection structure between a plurality of light modulating devices each having a flexible substrate extending in a predetermined direction and a circuit substrate connected with the light modulating devices, wherein the light modulating devices are arranged so that the direction of one flexible substrate extending from at least one of the light modulating devices is different from the directions of the other flexible substrates extending from the other light modulating devices, the substrate connection structure includes: a relay substrate which is connected with the one flexible substrate; and an extension flexible substrate which is connected with the relay substrate.
    Type: Application
    Filed: March 15, 2011
    Publication date: September 29, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Yasushi MARUYAMA, Susumu TAKATSU
  • Patent number: 8004056
    Abstract: A solid-state imaging device having a high sensitivity and a structure in which a miniaturized pixel is obtained, and a method for manufacturing the solid-state imaging device in which an interface is stable, a spectroscopic characteristic is excellent and which can be manufactured with a high yield ratio are provided. The solid-state imaging device includes at least a silicon layer formed with a photo sensor portion and a wiring layer formed on the front-surface side of the silicon layer, and in which light L is made to enter from the rear-surface side opposite to the front-surface side of the silicon layer and the thickness of the silicon layer 4 is 10 ?m or less.
    Type: Grant
    Filed: August 27, 2009
    Date of Patent: August 23, 2011
    Assignee: Sony Corporation
    Inventors: Yasushi Maruyama, Hideshi Abe, Hiroyuki Mori
  • Patent number: 8004019
    Abstract: P type semiconductor well regions 8 and 9 for device separation are provided in an upper and lower two layer structure in conformity with the position of a high sensitivity type photodiode PD, and the first P type semiconductor well region 8 at the upper layer is provided in the state of being closer to the pixel side than an end portion of a LOCOS layer 1A, for limiting a dark current generated at the end portion of the LOCOS layer 1A. In addition, the second P type semiconductor well region 9 at the lower layer is formed in a narrow region receding from the photodiode PD, so that the depletion layer of the photodiode PD is prevented from being obstructed, and the depletion is secured in a sufficiently broad region, whereby enhancement of the sensitivity of the photodiode PD can be achieved.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: August 23, 2011
    Assignee: Sony Corporation
    Inventors: Hiroaki Fujita, Ryoji Suzuki, Nobuo Nakamura, Yasushi Maruyama