Abstract: The TFT substrate includes (i) gate lines and data lines which are provided in a matrix manner, (ii) a plurality of pixel electrodes each of which has a side which extends in parallel with the gate lines and a side which extends in parallel with the data lines and is shorter than the side, (iii) storage capacitor lines extending in parallel with the gate lines, and (iv) connection lines which are electrically connected to the respective pixel electrodes. In at least one embodiment, the number of the storage capacitor lines is smaller than that of the gate lines. A single one of the storage capacitor lines overlap a plurality of connection lines which are electrically connected to respective of the plurality of pixel electrodes which are arranged in a direction in parallel with the data lines. The single one of the storage capacitor lines and the plurality of connection lines overlap each other via the insulating film so as to form storage capacitor elements.

Abstract: A liquid crystal display panel includes: an active matrix substrate (20a) having a plurality of switching elements (5), an insulating film that is formed to cover the switching elements (5) and has through holes (16a), and a plurality of pixel electrodes (17) formed on the insulating film to be connected to the switching elements (5) via the through holes (16a); and a counter substrate having photo-spacers (23a) configured to maintain the thickness of a liquid crystal layer. The panel includes a first pixel row having a plurality of pixels in a row in which the photo-spacers (23a) are placed to stand on one side of the corresponding through holes (16a), and a second pixel row having a plurality of pixels in a row in which the photo-spacers (23a) are placed to stand on the opposite side of the corresponding through holes (16a).

Abstract: A liquid crystal display device of a high image quality is provided in which occurrence of a leakage current between pixel electrodes is prevented. A liquid crystal display device of the present invention has a plurality of pixels 10, including a first pixel 10a and a second pixel 10b which are side by side along the first direction. The liquid crystal display device includes: a first substrate 60 which includes a first electrode 20a provided in the first pixel 10a and a second electrode 20b provided in the second pixel 10b; a second substrate 70 which is arranged so as to oppose the first substrate 60; and a liquid crystal layer 80 interposed between the first substrate 60 and the second substrate 70. The first electrode 20a includes a plurality of first branch portions 30a extending toward the second pixel 10b. The second electrode 20b includes a plurality of second branch portions 30b extending toward the first pixel 10a side.

Abstract: A liquid crystal display device 100 according to the present invention includes: a liquid crystal layer 32 interposed between first and second substrates 11, 21; a pixel electrode 10, which includes a reflective pixel electrode 10r and a transparent pixel electrode 10t; a counter electrode 22; an organic insulating layer 24a, which has been deposited on the counter electrode 22 to face the liquid crystal layer 32; and a columnar spacer 24b arranged between the first and second substrates 11 and 21. The organic insulating layer 24a covers only the reflecting region R selectively or the counter electrode 22 substantially entirely, and is thicker in the reflecting region R than in the transmitting region T. And the columnar spacer 24b is made of the same organic film as the organic insulating layer 24a.

Abstract: The present invention relates to a display device capable of improving display qualities.

Abstract: In an active-matrix display device using a three-terminal element (10) for a selection element (10) of a pixel (PIX), a conduction control terminal (11) of the three terminal element (10) is formed by using wiring (12) extended from a scanning signal line (GL) to the pixel (PIX) through the area of a pixel (PIX) other than the pixel (PIX) which is the pixel (PIX) selected by the (three) terminal element (10). This provides the realization of a display device which is hardly likely to produce a feed-through effect.

Abstract: A liquid crystal display device (10) of the present invention comprises a liquid crystal panel in which a plurality of pixel electrodes (2) are arranged, wherein: shapes of the pixel electrodes (2) are asymmetric, and the pixel electrodes (2) are categorized into plural types whose shapes are different from each other (that is, pixel electrodes A and pixel electrodes B). The liquid crystal panel is configured so that the pixel electrodes of the plural types (that is, pixel electrodes A and pixel electrodes B) are arranged in a regular manner, and the pixel electrodes of the plural types are populated with equal ratios. Thus, in the liquid crystal display device comprising pixel electrodes having a horizontally asymmetric shape viewed from an observer of the liquid crystal panel, a manner in which pixel electrodes of respective types are arranged is changed, thereby improving display quality.

Abstract: An active matrix liquid crystal display device is provided in which decrease in the aperture ratio is prevented, and deterioration in display quality is reduced by preventing liquid crystal molecules in a region of a pixel electrode which region faces a bus line from aligning in two or more directions. A liquid crystal panel in the active matrix liquid crystal display device includes a plurality of pixel electrodes (2) in array; and bus lines (42) arranged in a grid so as to surround each of the pixel electrodes (2), the pixel electrodes (2) each including a prominence (50) overlapping an adjacent one of the bus lines (42) in a top view, wherein the respective prominences (50) of each adjacent two of the pixel electrodes (2) facing each other across an adjacent one of the bus lines (42) overlap the bus line (42) at positions different from each other with respect to a direction in which the bus line (42) extends.

Abstract: The active-matrix substrate (100) of the present invention satisfies d2>d1 and d2+A1/2>d3+L1/2, where d1 is the length of the shortest line segment that connects together a channel region (134) and a gettering region (112) as measured by projecting the line segment onto a line that connects together the channel region (134) of a TFT (130) and a source contact portion, d2 is the distance from the channel region (134) to the source contact portion (132c), d3 is the distance from the channel region (134) to a first end portion (110a), L1 is the length of the first end portion (110a), and A1 is the length of the source contact portion (132c).

Abstract: In an active-matrix substrate (100) according to the present invention, a semiconductor layer (110) has a first gettering region (112) adjacent to the source region (132) of a first thin-film transistor (130), a second gettering region (114) adjacent to the drain region (146) of a second thin-film transistor (140), and a third gettering region (116) adjacent to any of the source and drain regions located between the respective channel regions (134 and 144) of the first and second thin-film transistors (130 and 140) among the source and drain regions of the thin-film transistors included in the thin-film transistor element (120).

Abstract: A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts.

Abstract: An image display device includes two data signal line drive circuits and two scan signal line drive circuits configured differently from each other. Different data signal line drive circuits and scan signal line drive circuit are compatible with different display formats. A display can be produced in the most suitable display format, and power consumption also can be reduced, by switch operating drive circuits according to the kind of input video and environmental conditions. Further, an image can be written over another image by writing video signals to signal lines with a time lag using a plurality of drive circuits; therefore, a superimposed display can be produced without externally processing the video signals. Thus, both a satisfactory image display and low power consumption can be achieved in an image display device.

Abstract: A control signal generating circuit CTL for controlling the writing into pixels PIX instructs a data signal line drive circuit SD2, which is for driving pixels in a non-display area, to write a voltage VB or a voltage VW which are for non-displaying, not only in the first frame but also once in a predetermined number of frames. In other words, the pixels in the display area is refreshed at intervals longer than those in the case of refreshing the pixels in each frame. Thus, even if the mobility of an active element is high and the leak current on the occasion of OFF-state is large, or even if a large amount of electric charge is accumulated because of the photoelectric effect due to the use of a backlight, it is possible to prevent unnecessary displaying on the display area, which is caused because the writing into the pixels in the display area influences on the pixels in the non-display area, and hence it is possible to improve the quality of partial displaying, while restraining the power consumption.

Abstract: An example control signal generating circuit CTL for controlling the writing into pixels PIX instructs a data signal line drive circuit SD2, which is for driving pixels in a non-display area, to write a voltage VB or a voltage VW which are for non-displaying, not only in the first frame but also once in a predetermined number of frames. In other words, the pixels in the display area are refreshed at intervals longer than those in the case of refreshing the pixels in each frame.

Abstract: An image display device includes two data signal line drive circuits and two scan signal line drive circuits configured differently from each other. Different data signal line drive circuits and scan signal line drive circuit are compatible with different display formats. A display can be produced in the most suitable display format, and power consumption also can be reduced, by switch operating drive circuits according to the kind of input video and environmental conditions. Further, an image can be written over another image by writing video signals to signal lines with a time lag using a plurality of drive circuits; therefore, a superimposed display can be produced without externally processing the video signals. Thus, both a satisfactory image display and low power consumption can be achieved in an image display device.

Abstract: In a shift register provided with flip-flops that operate in synchronism with a clock signal, and a switching means, which is opened and closed in response to an output of the preceding stage of each of the flip-flops, is installed. The clock signal is selectively inputted by the switching means, and the selected clock signal is inverted and used as a shift register output from each of the stages. Moreover, two kinds of clock signals, each of which has a duty ratio of not more than 50% and which have no overlapped portions in their low-level periods, are used so as to prevent the outputs of the shift-register from overlapping each other. Thus, it is possible to provide a shift register which is preferably used for a driving circuit of an image display device, can miniaturize the driving circuit, and can desirably change the pulse width of the output signal, and also to provide an image display device using such a shift register.

Abstract: A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts.

Abstract: An image display device includes two data signal line drive circuits and two scan signal line drive circuits configured differently from each other. Different data signal line drive circuits and scan signal line drive circuit are compatible with different display formats. A display can be produced in the most suitable display format, and power consumption also can be reduced, by switch operating drive circuits according to the kind of input video and environmental conditions. Further, an image can be written over another image by writing video signals to signal lines with a time lag using a plurality of drive circuits; therefore, a superimposed display can be produced without externally processing the video signals. Thus, both a satisfactory image display and low power consumption can be achieved in an image display device.

Abstract: Before a potential of counter electrode is changed, a potential holding circuit fixedly holds potentials of data signal lines S during a non-selective period of scanning signal lines G. This prevents the potentials of the data signal lines S from being an undesirably large potential, which is caused by coupling capacitors between the counter electrode and each data signal line S, whereby it is possible to supply to the pixel capacitor an electric charge corresponding to a gradation to be displayed, by using the relatively low potentials of the data signal lines S. This lowers a power supply voltage of a data signal driving circuit SD, thus reducing the electric power consumption. In short, with this arrangement, a liquid crystal display device can perform an opposed AC drive for line-inversion drive, frame-inversion drive and the like, by low power supply voltage of the data signal line driving circuit SD, thereby reducing the electric power consumption.

Abstract: An image display device includes two data signal line drive circuits and two scan signal line drive circuits configured differently from each other. Different data signal line drive circuits and scan signal line drive circuit are compatible with different display formats. A display can be produced in the most suitable display format, and power consumption also can be reduced, by switch operating drive circuits according to the kind of input video and environmental conditions. Further, an image can be written over another image by writing video signals to signal lines with a time lag using a plurality of drive circuits; therefore, a superimposed display can be produced without externally processing the video signals. Thus, both a satisfactory image display and low power consumption can be achieved in an image display device.