Patents by Inventor Yasuyuki Arai

Yasuyuki Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110165918
    Abstract: Although an organic resin substrate is highly effective at reducing the weight and improving the shock resistance of a display device, it is required to improve the moisture resistance of the organic resin substrate for the sake of maintaining the reliability of an EL element. Hard carbon films are formed to cover a surface of the organic resin substrate and outer surfaces of a sealing member. Typically, DLC (Diamond like Carbon) films are used as the carbon films. The DLC films have a construction where carbon atoms are bonded into an SP3 bond in terms of a short-distance order, although the films have an amorphous construction from a macroscopic viewpoint. The DLC films contain 95 to 70 atomic % carbon and 5 to 30 atomic % hydrogen, so that the DLC films are very hard and minute and have a superior gas barrier property and insulation performance.
    Type: Application
    Filed: March 14, 2011
    Publication date: July 7, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI
  • Patent number: 7974524
    Abstract: An object is to provide a method of activating impurity elements added to a semiconductor film, and a method of gettering, in a process of manufacturing a semiconductor device using a substrate having a low resistance to heat, such as glass, without changing the shape of the substrate, by using a short time heat treatment process. Another object is to provide a heat treatment apparatus that makes this type of heat treatment process possible. A unit for supplying a gas from the upstream side of a reaction chamber, a unit for heating the gas in the upstream side of the reaction chamber, a unit for holding a substrate to be processed in the downstream side of the reaction chamber, and a unit for circulating the gas from the downstream side of the reaction chamber to the upstream side are prepared. The amount of electric power used in heating the gas can be economized by circulating the gas used to heat the substrate to be processed.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: July 5, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Yasuyuki Arai
  • Patent number: 7973313
    Abstract: The present invention provides an ultrathin thin film integrated circuit and a thin film integrated circuit device including the thin film integrated circuit device. Accordingly, the design of a product is not spoilt while an integrated circuit formed from a silicon wafer, which is thick and produces irregularities on the surface of the product container. The thin film integrated circuit according to the present invention includes a semiconductor film as an active region (for example a channel region in a thin film transistor), unlike an integrated circuit formed from a conventional silicon wafer. The thin film integrated circuit according to the present invention is thin enough that the design is not spoilt even when a product such as a card or a container is equipped with the thin film integrated circuit.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: July 5, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuyuki Arai, Akira Ishikawa, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Yuko Tachimura
  • Patent number: 7972935
    Abstract: When single crystal semiconductor layers are transposed from a single crystal semiconductor substrate (a bond wafer), the single crystal semiconductor substrate is etched selectively (this step is also referred to as groove processing), and a plurality of single crystal semiconductor layers, which are being divided in size of manufactured semiconductor elements, are transposed to a different substrate (a base substrate). Thus, a plurality of island-shaped single crystal semiconductor layers (SOI layers) can be formed over the base substrate. Further, etching is performed on the single crystal semiconductor layers formed over the base substrate, and the shapes of the SOI layers are controlled precisely by being processed and modified.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: July 5, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Ikuko Kawamata, Yasuyuki Arai
  • Patent number: 7968890
    Abstract: By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: June 28, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yasuyuki Arai
  • Patent number: 7964429
    Abstract: A photoelectric conversion device which is excellent in photoelectric conversion characteristics is provided by effectively utilizing silicon semiconductor materials. The present invention relates to a method for manufacturing a photoelectric conversion device using a solar cell, in which a plurality of single crystal semiconductor substrates in each of which a damaged layer is formed at a predetermined depth is arranged over a supporting substrate having an insulating surface; a surface layer part of the single crystal semiconductor substrate is separated thinly using the damaged layer as a boundary so as to form a single crystal semiconductor layer over one surface of the supporting substrate; and the single crystal semiconductor layer is irradiated with a laser beam from a surface side which is exposed by separation of the single crystal semiconductor layer to planarize the surface of the single crystal semiconductor layer.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: June 21, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 7955907
    Abstract: An object of the invention is to provide a method for manufacturing a substrate having a film pattern such as an insulating film, a semiconductor film, or a conductive film with an easy process, and further, a semiconductor device and a television set having a high throughput or a high yield at low cost and a manufacturing method thereof. One feature of the invention is that a first film pattern is formed by a droplet discharge method, a photosensitive material is discharged or applied to the first film pattern, a mask pattern is formed by irradiating a region where the first film pattern and the photosensitive material are overlapped with a laser beam and by developing, and a second film pattern having a desired shape is formed by etching the first film pattern using the mask pattern as a mask.
    Type: Grant
    Filed: January 24, 2005
    Date of Patent: June 7, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hironobu Shoji, Yasuyuki Arai
  • Publication number: 20110124151
    Abstract: It is the gist of the present invention to provide a photovoltaic device in which a single crystal semiconductor layer provided over a substrate having an insulating surface or an insulating substrate is used as a photoelectric conversion layer, and the single crystal semiconductor layer is provided with a so-called SOI structure where the single crystal semiconductor layer is bonded to the substrate with an insulating layer interposed therebetween. As the single crystal semiconductor layer having a function as a photoelectric conversion layer, a single crystal semiconductor layer obtained by separation and transfer of an outer layer portion of a single crystal semiconductor substrate is used.
    Type: Application
    Filed: February 3, 2011
    Publication date: May 26, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI
  • Patent number: 7947981
    Abstract: It is an object to provide a display device including a thin film transistor which can operate at high speed and is driven at a low voltage in a drive circuit region, and a thin film transistor having high voltage-resistance and high reliability in a pixel region. Accordingly, it is an object to provide a high reliable display device which consumes less power. A display device including a pixel region and a drive circuit region over a substrate having an insulating surface is provided. A thin film transistor is provided in each of the pixel region and the drive circuit region. A channel formation region in a semiconductor layer of the thin film transistor provided in the drive circuit region is formed to be locally thin, and the thickness of the channel formation region is smaller than that in the pixel region.
    Type: Grant
    Filed: January 14, 2008
    Date of Patent: May 24, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Ikuko Kawamata, Yasuyuki Arai
  • Patent number: 7943287
    Abstract: An object is to provide a display device that can be manufactured with increased use efficiency of a material by a simplified manufacturing process and a manufacturing technique thereof. A light-absorbing layer is formed, an insulating layer is formed over the light-absorbing layer, the light-absorbing layer and the insulating layer are selectively irradiated with laser light, so that an irradiated region of the light-absorbing layer and an irradiated region of the insulating layer are removed, and accordingly an opening is formed in the light-absorbing layer and the insulating layer, and a conductive film is formed in the opening so as to be in contact with the light-absorbing film. The conductive film is formed in the opening so as to be in contact with the exposed light-absorbing layer, so that the light-absorbing layer and the conductive film are electrically connected to each other with the insulating layer interposed therebetween.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: May 17, 2011
    Assignee: Semiconductor Energy laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koichiro Tanaka, Hironobu Shoji, Yasuyuki Arai
  • Patent number: 7935958
    Abstract: The present invention provides a semiconductor device which has a storage element having a simple structure in which an organic compound layer is sandwiched between a pair of conductive layers and a manufacturing method of such a semiconductor device. With this characteristic, a semiconductor device having a storage circuit which is nonvolatile, additionally recordable, and easily manufactured and a manufacturing method of such a semiconductor device are provided. A semiconductor device according to the present invention has a plurality of field-effect transistors provided over an insulating layer and a plurality of storage elements provided over the plurality of field-effect transistors. Each of the plurality of field-effect transistors uses a single-crystal semiconductor layer as a channel portion and each of the plurality of storage elements is an element in which a first conductive layer, an organic compound layer, and a second conductive layer are stacked in order.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: May 3, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroko Abe, Yuji Iwaki, Mikio Yukawa, Shunpei Yamazaki, Yasuyuki Arai, Yasuko Watanabe, Yoshitaka Moriya
  • Patent number: 7928910
    Abstract: It is an object to provide a wireless chip which can increase a mechanical strength, and a wireless chip with a high durability. A wireless chip includes a transistor including a field-effect transistor, an antenna including a dielectric layer sandwiched between conductive layers, and a conductive layer connecting the chip and the antenna. Further, a wireless chip includes a transistor including a field-effect transistor, an antenna including a dielectric layer sandwiched between conductive layers, a sensor device, a conductive layer connecting the chip and the antenna, and a conductive layer connecting the chip and the sensor device. Moreover, a wireless chip includes a transistor including a field-effect transistor, an antenna including a dielectric layer sandwiched between conductive layers, a battery, a conductive layer connecting the chip and the antenna, and a conductive layer connecting the chip and the battery.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: April 19, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukie Suzuki, Yasuyuki Arai, Shunpei Yamazaki
  • Publication number: 20110086475
    Abstract: In order to form a plurality of semiconductor elements over an insulating surface, in one continuous semiconductor layer, an element region serving as a semiconductor element and an element isolation region having a function to electrically isolate element regions from each other by repetition of PN junctions. The element isolation region is formed by selective addition of an impurity element of at least one or more kinds of oxygen, nitrogen, and carbon and an impurity element that imparts an opposite conductivity type to that of the adjacent element region in order to electrically isolate elements from each other in one continuous semiconductor layer.
    Type: Application
    Filed: December 15, 2010
    Publication date: April 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI, Ikuko KAWAMATA
  • Patent number: 7923269
    Abstract: The concentration of oxygen, which causes problems such as decreases in brightness and dark spots through degradation of electrode materials, is lowered in an organic light emitting element having a layer made from an organic compound between a cathode and an anode, and in a light emitting device structured using the organic light emitting element. The average concentration of impurities contained in a layer made from an organic compound used in older to form an organic light emitting element having layers such as a hole injecting layer, a hole transporting layer, a light emitting layer, an electron transporting layer, and an electron injecting layer, is reduced to 5×1019/cm2 or less, preferably equal to or less than 1×1019/cm2, by removing the impurities with the present invention. Formation apparatuses are structured as stated in the specification in order to reduce the impurities in the organic compounds forming the organic light emitting elements.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: April 12, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Patent number: 7915611
    Abstract: In order to form a metal thin film, a silicide film, or the like between an upper-layer unit cell and a lower-layer unit cell in stacked-layer photoelectric conversion devices, a step of forming the thin film is additionally needed. Therefore, a problem such as decline in productivity of the photoelectric conversion devices occurs. A first unit cell including a single crystal semiconductor layer with a thickness of 10 ?m or less as a photoelectric conversion layer and a second unit cell including a non-single-crystal semiconductor layer as a photoelectric conversion layer, which is provided over the first unit cell, are at least included, and conductive clusters are dispersed between the unit cells. The conductive clusters are located between the lower-layer unit cell and the upper-layer unit cell to form an ohmic contact; thus, current flows between the both unit cells.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: March 29, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuyuki Arai
  • Publication number: 20110068438
    Abstract: In inlets used for ID tags and the like, a defective connection between an integrated circuit part and an antenna is suppressed by improvement of tolerance for a bending or a pressing pressure. The integrated circuit part includes a semiconductor chip and a multilayer substrate having a concave portion. The semiconductor chip is mounted on the bottom of the concave portion. The multilayer substrate includes a connection electrode at the top surface and a connection electrode connected to the semiconductor chip on the bottom of the concave portion. The connection electrode on the bottom of the concave portion is connected to the connection electrode at the top surface by a penetration electrode inside a multilayer substrate. By such a configuration, the semiconductor chip is connected to the antenna.
    Type: Application
    Filed: November 23, 2010
    Publication date: March 24, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI
  • Publication number: 20110062461
    Abstract: An organic EL display device of active matrix type wherein insulated-gate field effect transistors formed on a single-crystal semiconductor substrate are overlaid with an organic EL layer; characterized in that the single-crystal semiconductor substrate (413 in FIG. 4) is held in a vacant space (414) which is defined by a bed plate (401) and a cover plate (405) formed of an insulating material, and a packing material (404) for bonding the bed and cover plates; and that the vacant space (414) is filled with an inert gas and a drying agent, whereby the organic EL layer is prevented from oxidizing.
    Type: Application
    Filed: November 18, 2010
    Publication date: March 17, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI
  • Publication number: 20110057628
    Abstract: In the field of portable electronic devices in the future, portable electronic devices will be desired, which are smaller and more lightweight and can be used for a long time period by one-time charging, as apparent from provision of one-segment partial reception service “1-seg” of terrestrial digital broadcasting that covers the mobile objects such as a cellular phone. Therefore, the need for a power storage device is increased, which is small and lightweight and capable of being charged without receiving power from commercial power. The power storage device includes an antenna for receiving an electromagnetic wave, a capacitor for storing power, and a circuit for controlling store and supply of the power. When the antenna, the capacitor, and the control circuit are integrally formed and thinned, a structural body formed of ceramics or the like is partially used.
    Type: Application
    Filed: November 12, 2010
    Publication date: March 10, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yasuyuki ARAI
  • Patent number: 7903229
    Abstract: A method of fabricating a driver circuit for use with a passive matrix or active matrix electrooptical display device such as a liquid crystal display. The driver circuit occupies less space than heretofore. A circuit (stick crystal) having a length substantially equal to the length of one side of the matrix of the display device is used as the driver circuit. The circuit is bonded to one substrate of the display device, and then the terminals of the circuit are connected with the terminals of the display device. Subsequently, the substrate of the driver circuit is removed. This makes the configuration of the circuit much simpler than the configuration of the circuit heretofore required by the TAB method or COG method, because conducting lines are not laid in a complex manner. The driver circuit can be formed on a large-area substrate such as a glass substrate. The display device can be formed on a lightweight material having a high shock resistance such as a plastic substrate.
    Type: Grant
    Filed: November 4, 2008
    Date of Patent: March 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuhiko Takemura, Setsuo Nakajima, Yasuyuki Arai
  • Publication number: 20110039402
    Abstract: A microcrystalline semiconductor film with high crystallinity is manufactured. In addition, a thin film transistor with excellent electric characteristics and high reliability, and a display device including the thin film transistor are manufactured with high productivity. A deposition gas containing silicon or germanium is introduced from an electrode including a plurality of projecting portions provided in a treatment chamber of a plasma CVD apparatus, glow discharge is caused by supplying high-frequency power, and thereby crystal particles are formed over a substrate, and a microcrystalline semiconductor film is formed over the crystal particles by a plasma CVD method.
    Type: Application
    Filed: August 2, 2010
    Publication date: February 17, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Yukie SUZUKI, Yasuyuki ARAI, Takayuki INOUE, Erumu KIKUCHI