Patents by Inventor Yasuyuki Kojima
Yasuyuki Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6734641Abstract: A device for turning on light allowing the brightness of an inverter-type illumination apparatus to be adjusted without having to install an additional oscillation circuit. The device comprises an active converter which generates a DC voltage from the commercial AC voltage and an inverter which switches the generated DC voltage, includes a capacitor connected in parallel with a discharge tube to be lighted, and supplies a high-frequency current to the discharge tube via a resonance circuit whose resonance frequency is determined according to the equivalent impedance of the discharge tube. The active converter has a triac adjusting the DC voltage, and switching elements of the inverter perform self-oscillation under control of the phase of the resonance current flowing through the resonance circuit.Type: GrantFiled: February 20, 2003Date of Patent: May 11, 2004Assignee: Hitachi, Ltd.Inventors: Hiroyuki Shoji, Hideki Miyazaki, Yasuyuki Kojima, Kenji Kawabata
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Publication number: 20030201523Abstract: Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on a plurality of semiconductor chips. A driver circuit for signal transmission or receiver circuit for signal receipt formed on the semiconductor chips are electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing the plurality of semiconductor chips to be received within either a single package or a single module. Using this arrangement, a semiconductor device is capable of achieving both dielectricity and size reduction.Type: ApplicationFiled: May 22, 2003Publication date: October 30, 2003Inventors: Noboru Akiyama, Minehiro Nemoto, Seigou Yukutake, Yasuyuki Kojima, Kazuyuki Kamegaki
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Publication number: 20030169808Abstract: A communication system is provided including a transceiver and an application controller to transmit and receive signals through the transceiver. An isolator which insulates and separates the transceiver and application controller includes primary and secondary side circuits insulated from each other on a substrate and a capacitive insulating means to transfer signals between the primary and second sides while insulating and separating the primary side circuit from the secondary side circuit.Type: ApplicationFiled: March 4, 2003Publication date: September 11, 2003Inventors: Seigoh Yukutake, Yasuyuki Kojima, Minehiro Nemoto, Masatsugu Amishiro, Takayuki Iwasaki, Shinichiro Mitani, Katsuhiro Furukawa, Chiyoshi Kamada, Atsuo Watanabe, Takayuki Oouchi, Nobuyasu Kanekawa
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Patent number: 6611051Abstract: Wire bonding or printed wiring board leads or, alternatively, lead frames or equivalents thereof are used to electrically connect external electrodes of high withstand voltage capacitors formed on a plurality of semiconductor chips. A driver circuit for signal transmission or receiver circuit for signal receipt formed on the semiconductor chips are electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing the plurality of semiconductor chips to be received within either a single package or a single module. Using this arrangement, a semiconductor device is capable of achieving both dielectricity and size reduction.Type: GrantFiled: September 28, 2001Date of Patent: August 26, 2003Assignee: Hitachi, Ltd.Inventors: Noboru Akiyama, Minehiro Nemoto, Seigou Yukutake, Yasuyuki Kojima, Kazuyuki Kamegaki
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Patent number: 6603807Abstract: An isolator is made monolithic by forming a capacitive insulating barrier using an interlayer insulation film on the semiconductor substrate to miniaturize the modem device by the monolithic isolator.Type: GrantFiled: February 26, 1999Date of Patent: August 5, 2003Assignee: Hitachi, Ltd.Inventors: Seigoh Yukutake, Yasuyuki Kojima, Minehiro Nemoto, Masatsugu Amishiro, Takayuki Iwasaki, Shinichiro Mitani, Katsuhiro Furukawa, Chiyoshi Kamada, Atsuo Watanabe, Takayuki Oouchi, Nobuyasu Kanekawa
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Publication number: 20030127997Abstract: A device for turning on light allowing the brightness of an inverter-type illumination apparatus to be adjusted without having to install an additional oscillation circuit. The device comprises an active converter which generates a DC voltage from the commercial AC voltage and an inverter which switches the generated DC voltage, includes a capacitor connected in parallel with a discharge tube to be lighted, and supplies a high-frequency current to the discharge tube via a resonance circuit whose resonance frequency is determined according to the equivalent impedance of the discharge tube. The active converter has a triac adjusting the DC voltage, and switching elements of the inverter perform self-oscillation under control of the phase of the resonance current flowing through the resonance circuit.Type: ApplicationFiled: February 20, 2003Publication date: July 10, 2003Inventors: Hiroyuki Shoji, Hideki Miyazaki, Yasuyuki Kojima, Kenji Kawabata
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Patent number: 6570343Abstract: A device for turning on light allowing the brightness of an inverter-type illumination apparatus to be adjusted without having to install an additional oscillation circuit. The device comprises an active converter which generates a DC voltage from the commercial AC voltage and an inverter which switches the generated DC voltage, includes a capacitor connected in parallel with a discharge tube to be lighted, and supplies a high-frequency current to the discharge tube via a resonance circuit whose resonance frequency is determined according to the equivalent impedance of the discharge tube. The active converter has a triac adjusting the DC voltage, and switching elements of the inverter perform self-oscillation under control of the phase of the resonance current flowing through the resonance circuit.Type: GrantFiled: September 1, 2000Date of Patent: May 27, 2003Assignee: Hitachi, Ltd.Inventors: Hiroyuki Shoji, Hideki Miyazaki, Yasuyuki Kojima, Kenji Kawabata
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Publication number: 20030046324Abstract: A plurality of tasks are managed by being classified into a communication task group, a control task group, and a management task group for management. An execution order of the plurality of tasks is switched by a group unit and, in accordance with a switched task group, information obtained from a LAN or information obtained from each device is processed by a CPU.Type: ApplicationFiled: March 20, 2002Publication date: March 6, 2003Inventors: Shoji Suzuki, Kunihiko Tsunedomi, Satoru Funaki, Masahiko Saito, Yasuyuki Kojima, Takanori Yokoyama, Atsushi Ito
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Publication number: 20020198851Abstract: A communication system to which a method for charging a user based on the fact that the user got advertisement information from a base station and dropped in at a shop associated with the advertisement information can be applied and a method for calculating an advertisement fee. A server system has a communication section transmitting and receiving data via a network, a storage section storing advertisement information, a storage section storing information relating to a base station therein, and a storage section storing information about an advertiser as customer information. The system transmits advertisement information requested by an advertiser to distribute it to a base station specified by the advertiser and calculates an advertisement fee charged to the advertiser based on a customer history received from an exclusive device installed at the shop associated with the advertisement.Type: ApplicationFiled: August 20, 2001Publication date: December 26, 2002Inventors: Koji Hashimoto, Masahiko Saito, Shigeru Matsuo, Yasuyuki Kojima
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Patent number: 6476750Abstract: The hardware of an over-sampling A/D and D/A converter is provided, which hardware is capable of being operated with either kind of software: one corresponding to a first method in which the over-sampling ratio is fixed and the other corresponding to a second method in which the over-sampling ratio is variable. The value N3 written on the pseudo-frequency-dividing-ratio-register 11 and the value N4 written on the pseudo-over-sampling-ratio-register 21 are converted through a user interface into the frequency dividing ratio N1 by the conversion circuit 12 and the converted result is written in the frequency-dividing-ratio-register 10.Type: GrantFiled: February 9, 2000Date of Patent: November 5, 2002Assignee: Hitachi, Ltd.Inventors: Nobuyasu Kanekawa, Yasuyuki Kojima, Seigou Yukutake, Minehiro Nemoto, Kazuhisa Takami, Takayuki Iwasaki, Yusuke Takeuchi, Katsuhiro Furukawa
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Publication number: 20020153165Abstract: There is disclosed a method of narrowing a focus of a powerful electromagnetic wave such as excimer laser toward a capacitor formed in a glass substrate, and adjusting and trimming a change amount of crystallized glass formed in this portion in a limited manner. A capacity value can be trimmed without influencing an outer configuration and other peripheral components, a circuit board whose property is unchanged and whose dispersion is little can be manufactured, and the capacity value can more precisely be adjusted by trimming an exclusive-use capacitor.Type: ApplicationFiled: August 29, 2001Publication date: October 24, 2002Inventors: Yasuyuki Kojima, Seigou Yukutake, Noboru Akiyama, Takao Miwa, Takashi Naito, Toshiya Sato
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Publication number: 20020125555Abstract: Wire bonding or printed wiring board leads or alternatively lead frames or equivalents thereof are used to electrically connect among external electrodes of high withstand voltage capacitors as formed on a plurality of semiconductor chips. A driver circuitry for signal transmission or receiver circuitry for signal receipt being formed on the semiconductor chips is electrically connected with substrate-side electrodes of said high withstand voltage capacitors, causing said plurality of semiconductor chips to be received within either a single package or a single module. Whereby a semiconductor device is capable of achieving both dielectricity and size reduction.Type: ApplicationFiled: September 28, 2001Publication date: September 12, 2002Inventors: Noboru Akiyama, Minehiro Nemoto, Seigou Yukutake, Yasuyuki Kojima, Kazuyuki Kamegaki
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Patent number: 6445055Abstract: A circuit region 2 on a main surface of an SOI substrate, and a isolating region 9b defined by insulating isolation trenches 4a and 4b are connected by a wiring resistor, or a diffused resistor 11a in the SOI substrate. The isolating region 9b and an intermediate region 9 are connected by a wiring resistor, or a diffused resistor 11b in the SOI substrate. Furthermore, a circuit region 3 on a main surface of an SOI substrate, and a isolating region 9c defined by insulating isolation trenches 4c and 4d are connected by a wiring resistor, or a diffused resistor 11d in the SOI substrate. The isolating region 9c and an intermediate region 9 are connected by a wiring resistor, or a diffused resistor 11c in the SOI substrate. As a result, distribution of voltage applied between the circuit regions 2 and 3 by the wiring resistors or the diffused resistors 11a to 11d can increase the withstand voltage of a semiconductor integrated circuit.Type: GrantFiled: August 9, 2001Date of Patent: September 3, 2002Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Takayuki Iwasakii, Yusuke Takeuchi, Yoshiaki Yuyama, Shinichi Tanabe, Koki Sakai, Minehiro Nemoto, Seigo Yukutake, Yasuyuki Kojima, Atsuo Watanabe, Mitsuaki Horiuchi
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Publication number: 20020117750Abstract: In a semiconductor device, an imbedded insulating layer is formed in a semiconductor substrate. A plurality of electric circuits are formed on the imbedded insulating layer so as to be insulated each other, and are capacitively coupled through the semiconductor substrate. Wiring layers are formed on the electric circuits, and include inside electrodes which are capacitively coupled to the electric circuits. The electric circuits are connected through capacitors which are formed through the semiconductor substrate, and through capacitors which are formed through the electrodes.Type: ApplicationFiled: September 28, 2001Publication date: August 29, 2002Inventors: Yasuyuki Kojima, Seigou Yukutake, Minehiro Nemoto, Nobuyasu Kanekawa, Noboru Akiyama
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Patent number: 6437825Abstract: An image signal processing apparatus to realize signal processing system and apparatus constitution, where an image signal inputted using a photoelectric conversion element such as a CCD or a contact type image sensor is obtained in circuit constitution of small scale with high picture quality. In order to solve the problems, data width of a signal referred to in a shading corrector, an MTF corrector and an error diffusion circuit is made b+f+j≦8 per one pixel. Or error component commonly possessed by plural pixels (N pixels) in the error diffusion circuit is made b+f+j′≦8, data width per one pixel being made j′=j/N. Image signal processing is realized in this constitution, thereby data width of a signal referred to in respective signal processings is reduced, and an image signal satisfying accuracy of signal processing sufficiently and having high picture quality can be obtained.Type: GrantFiled: December 3, 1997Date of Patent: August 20, 2002Assignee: Hitachi, Ltd.Inventors: Tatsuki Inuzuka, Toshiaki Nakamura, Shinichi Shinoda, Yasuyuki Kojima
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Patent number: 6407432Abstract: A small sized semiconductor device having a high insulating performance between a primary side circuit and a secondary side circuit is realized. A circuit region 2, plural first and second terminal electrodes 5 connected to the circuit region 3, and an insulation-separation region 4 for separating electrically the first terminal electrodes from the second terminal electrodes, and for transmitting signals between the first and the second terminal electrodes are formed onto a semiconductor chip 1, and the insulation-separation region 4 is provided between the first and second terminal electrodes. The interval between the first and the second terminal electrodes on the same semiconductor chip can be separated with high insulating performance.Type: GrantFiled: December 29, 1999Date of Patent: June 18, 2002Assignee: Hitachi, Ltd.Inventors: Minehiro Nemoto, Yasuyuki Kojima, Nobuyasu Kanekawa, Seigou Yukutake, Katsuhiro Furukawa
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Patent number: 6389063Abstract: The signal x to be transmitted is converted to the redundant code f(x) by the redundancy coder 6 and transmitted via the isolating capacitor 2 of the isolator 50. When the signal f(x) redundancy-coded and transmitted is the coded word f(xi), the decoder 7 outputs xi which is inferred as an equivalent original signal and when an error occurs and the signal f(x) does not match the coded word f(xi), the decoder 7 corrects the error and outputs xi which is inferred as an original signal.Type: GrantFiled: October 30, 1998Date of Patent: May 14, 2002Assignee: Hitachi, Ltd.Inventors: Nobuyasu Kanekawa, Kazuo Kato, Yasuyuki Kojima, Seigoh Yukitake
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Publication number: 20020017686Abstract: A circuit region 2 on a main surface of an SOI substrate, and a isolating region 9b defined by insulating isolation trenches 4a and 4b are connected by a wiring resistor, or a diffused resistor 11a in the SOI substrate. The isolating region 9b and an intermediate region 9 are connected by a wiring resistor, or a diffused resistor 11b in the SOI substrate. Furthermore, a circuit region 3 on a main surface of an SOI substrate, and a isolating region 9c defined by insulating isolation trenches 4c and 4d are connected by a wiring resistor, or a diffused resistor lid in the SOI substrate. The isolating region 9c and an intermediate region 9 are connected by a wiring resistor, or a diffused resistor 11c in the SOI substrate. As a result, distribution of voltage applied between the circuit regions 2 and 3 by the wiring resistors or the diffused resistors 1a to 11d can increase the withstand voltage of a semiconductor integrated circuit.Type: ApplicationFiled: August 9, 2001Publication date: February 14, 2002Inventors: Takayuki Iwasakii, Yusuke Takeuchi, Yoshiaki Yuyama, Shinichi Tanabe, Koki Sakai, Minehiro Nemoto, Seigo Yukutake, Yasuyuki Kojima, Atsuo Watanabe, Mitsuaki Horiuchi
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Patent number: 6344809Abstract: In order to reduce the consumption of power of an isolator interface and an ADC, it is proposed to operate a calling signal reception or Caller ID signal reception function only with power supplied from the system switch while maintaining the on-hook condition of a telephone. At the time of normal operation, the output of the analogue digital converter is input to an isolator through the isolator interface, and at the time of the calling signal reception or the caller identification information reception, the output of the analogue digital converter is input directly to the isolator.Type: GrantFiled: November 3, 2000Date of Patent: February 5, 2002Assignee: Hitachi, Ltd.Inventors: Nobuyasu Kanekawa, Yasuyuki Kojima, Seigou Yukutake, Minehiro Nemoto, Kazuhisa Takami, Takayuki Iwasaki, Yusuke Takeuchi, Yasuo Shima
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Patent number: 6297618Abstract: A power storage device has a plurality of series-connected storage battery units, battery circuits associated with the storage battery units to control or monitor the storage battery units, respectively; a main circuit of a potential level different from that of the battery circuits; and a potential level changing circuits connecting the battery circuit to the main circuit. The power storage unit is small in construction and operates at a low power consumption in a high control accuracy.Type: GrantFiled: January 31, 2001Date of Patent: October 2, 2001Assignee: Hitachi Ltd.Inventors: Akihiko Emori, Takuya Kinoshita, Hideki Miyazaki, Yasuyuki Kojima, Noboru Akiyama