Patents by Inventor Yasuyuki Naito
Yasuyuki Naito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6594136Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.Type: GrantFiled: February 12, 2002Date of Patent: July 15, 2003Assignee: Murata Manufacturing Co., Ltd.Inventors: Yoichi Kuroda, Masaaki Taniguchi, Yasuyuki Naito, Haruo Hori, Takanori Kondo
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Patent number: 6556420Abstract: An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cavity provided on a wiring board. The capacitor includes a plurality of first external terminal electrodes connected to first internal electrodes via a plurality of first feedthrough conductors and a plurality of second external terminal electrodes connected to second internal electrodes via a plurality of second feedthrough conductors. The first external terminal electrodes provided on a first major surface of a capacitor body are connected to via-hole conductors at the hot side for the power source within a substrate, and the second external terminal electrodes provided on first and second major surfaces are connected to grounding via-hole conductors and a mother board within the substrate.Type: GrantFiled: May 31, 2000Date of Patent: April 29, 2003Assignee: Murata Manufacturing Co., Ltd.Inventors: Yasuyuki Naito, Masaaki Taniguchi, Yoichi Kuroda, Haruo Hori, Takanori Kondo
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Patent number: 6549395Abstract: First and second external terminal electrodes are formed on the same principal surface of a capacitor main body. The connection between first internal electrodes in the capacitor main body and the first external terminal electrodes, and the mutual connection between the plurality of first internal electrodes, is achieved by a first connection portion. The connection between second internal electrodes and the second external terminal electrodes, and the mutual connection between the plurality of second internal electrodes, is achieved by a second connection portion. The first and second connection portions are arranged alternately. Currents flow through the connection portions in opposite directions with the result that components of magnetic flux generated by such currents are cancelled and the ESL is reduced.Type: GrantFiled: January 14, 2000Date of Patent: April 15, 2003Assignee: Murata Manufacturing Co., LTDInventors: Yasuyuki Naito, Masaaki Taniguchi, Yoichi Kuroda, Takanori Kondo
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Publication number: 20020191366Abstract: An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cavity provided on a wiring board. The capacitor includes a plurality of first external terminal electrodes connected to first internal electrodes via a plurality of first feedthrough conductors and a plurality of second external terminal electrodes connected to second internal electrodes via a plurality of second feedthrough conductors. The first external terminal electrodes provided on a first major surface of a capacitor body are connected to via-hole conductors at the hot side for the power source within a substrate, and the second external terminal electrodes provided on first and second major surfaces are connected to grounding via-hole conductors and a mother board within the substrate.Type: ApplicationFiled: March 27, 2002Publication date: December 19, 2002Applicant: Murata Manufacturing Co. Ltd.Inventors: Yasuyuki Naito, Masaki Taniguchi, Yoichi Kuroda, Haruo Hori, Takanori Kondo
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Patent number: 6496354Abstract: First and second external terminal electrodes are formed on the same principal surface of a capacitor main body. The connection between first internal electrodes in the capacitor main body, the first external terminal electrode and the mutual connection between the plurality of first internal electrodes is achieved by a first connection portion. The connection between second internal electrodes, the second external terminal electrode and the mutual connection between the plurality of second internal electrodes is achieved by a second connection portion. The first and second connection portions are arranged alternately. Currents flow through the connection portions in opposite directions with the result that components of magnetic flux generated by such currents are cancelled and the ESL is reduced.Type: GrantFiled: February 12, 2002Date of Patent: December 17, 2002Assignee: Murata Manufacturing Co., Ltd.Inventors: Yasuyuki Naito, Masaaki Taniguchi, Yoichi Kuroda, Takanori Kondo
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Patent number: 6462932Abstract: First and second external terminal electrodes are formed on the same principal surface of a capacitor main body. The connection between first internal electrodes in the capacitor main body, the first external terminal electrode and the mutual connection between the plurality of first internal electrodes is achieved by a first connection portion. The connection between second internal electrodes, the second external terminal electrode and the mutual connection between the plurality of second internal electrodes is achieved by a second connection portion. The first and second connection portions are arranged alternately. Currents flow through the connection portions in opposite directions with the result that components of magnetic flux generated by such currents are cancelled and the ESL is reduced.Type: GrantFiled: March 3, 2000Date of Patent: October 8, 2002Assignee: Murata Manufacturing Co., LTDInventors: Yasuyuki Naito, Masaaki Taniguchi, Yoichi Kuroda, Takanori Kondo
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Publication number: 20020109958Abstract: First and second external terminal electrodes are formed on the same principal surface of a capacitor main body. The connection between first internal electrodes in the capacitor main body, the first external terminal electrode and the mutual connection between the plurality of first internal electrodes is achieved by a first connection portion. The connection between second internal electrodes, the second external terminal electrode and the mutual connection between the plurality of second internal electrodes is achieved by a second connection portion. The first and second connection portions are arranged alternately. Currents flow through the connection portions in opposite directions with the result that components of magnetic flux generated by such currents are cancelled and the ESL is reduced.Type: ApplicationFiled: February 12, 2002Publication date: August 15, 2002Applicant: Murata Manufacturing Co., Ltd.Inventors: Yasuyuki Naito, Masaaki Taniguchi, Yoichi Kuroda, Takanori Kondo
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Patent number: 6430025Abstract: A multilayer capacitor whose equivalent series inductance is reduced includes a capacitor main body having a generally rectangular parallelpiped shape with two principal surfaces in a face-to-face relationship with each other and four side surfaces connecting the principal surfaces. A capacitor unit is formed in the capacitor main body by a respective pair of first and second internal electrodes disposed in the main body in a face-to-face relationship with a dielectric material layer interposed therebetween. At least three first external electrodes are located on respective ones of the side surfaces of the capacitor main body, with at least one of the first external electrodes being located on each of at least three of the side surfaces. The first internal electrode has at least three first lead electrodes, each of which extends to and is electrically coupled to a respective one of the first external electrodes.Type: GrantFiled: March 13, 2001Date of Patent: August 6, 2002Assignee: Murata Manufacturing Co., Ltd.Inventors: Yasuyuki Naito, Masaaki Taniguchi, Yoichi Kuroda, Takanori Kondo
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Patent number: 6407904Abstract: A multi-layer capacitor is constructed to minimize equivalent series inductance, increase resonance frequency, reduce the size of the capacitor and greatly improve the ease of mounting of the capacitor. A dimension in a length direction and a dimension in a width direction of a capacitor body are substantially equal, and a pattern of opposing first and second internal electrodes is substantially square. First lead-out portions of the first internal electrode and second lead-out portions of the second internal electrode are extended onto two side surfaces and two end surfaces. First external electrode terminals connected to the first lead-out portions and second external electrode terminals connected to the second lead-out portions are arranged so that they alternate adjacently and are arranged such that oppositely disposed external electrode terminals have opposite polarities.Type: GrantFiled: February 9, 2000Date of Patent: June 18, 2002Assignee: Murata Manufacturing Co., Ltd.Inventors: Yoichi Kuroda, Yasuyuki Naito, Masaaki Taniguchi, Haruo Hori, Takanori Kondo, Michihiro Murata, Yoshitaka Tanino
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Publication number: 20020071238Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.Type: ApplicationFiled: February 12, 2002Publication date: June 13, 2002Applicant: Murata Manufacturing Co., Ltd.Inventors: Yoichi Kuroda, Masaaki Taniguchi, Yasuyuki Naito, Haruo Hori, Takanori Kondo
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Patent number: 6370010Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.Type: GrantFiled: February 23, 2000Date of Patent: April 9, 2002Assignee: Murata Manufacturing Co., LTDInventors: Yoichi Kuroda, Masaaki Taniguchi, Yasuyuki Naito, Haruo Hori, Takanori Kondo
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Patent number: 6370011Abstract: First and second external terminal electrodes are formed on the same principal surface of a capacitor main body. The connection between first internal electrodes in the capacitor main body, the first external terminal electrode and the mutual connection between the plurality of first internal electrodes is achieved by a first connection portion. The connection between second internal electrodes, the second external terminal electrode and the mutual connection between the plurality of second internal electrodes is achieved by a second connection portion. The first and second connection portions are arranged alternately. Currents flow through the connection portions in opposite directions with the result that components of magnetic flux generated by such currents are cancelled and the ESL is reduced.Type: GrantFiled: September 28, 2000Date of Patent: April 9, 2002Assignee: Murata Manufacturing Co., LTDInventors: Yasuyuki Naito, Masaaki Taniguchi, Yoichi Kuroda, Takanori Kondo
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Patent number: 6351369Abstract: A multi-layer capacitor achieves significant reduction in equivalent series inductance (ESL) and includes first inner electrodes and second inner electrodes opposing each other, first feed-through conductors and second feed-through conductors, and first outer terminal electrodes and second outer terminal electrodes. The first feed-through conductors electrically connect the first inner electrodes and the first outer terminal electrodes, and the second feed-through conductors electrically connect the second inner electrodes and the second outer terminal electrodes. The first and second feed-through conductors are arranged such that the feed-through conductors mutually cancel magnetic fields induced by current flowing through the first and second inner electrodes. Furthermore, when an alignment pitch of the first and second feed-through conductors is indicated by P and the total number of the first and second feed-through conductors is indicated by N, an arrangement is set such that a ratio of P/N is about 0.Type: GrantFiled: February 28, 2000Date of Patent: February 26, 2002Assignee: Murata Manufacturing Co., LTDInventors: Yoichi Kuroda, Masaaki Taniguchi, Yasuyuki Naito, Haruo Hori, Takanori Kondo
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Publication number: 20020018497Abstract: A laser treatment apparatus for performing treatments on an affected part by irradiating the affected part with a laser beam for treatment is disclosed. This apparatus includes a laser oscillator, a cooling unit including a fan which cools the laser oscillator, a temperature sensor which directly or indirectly detects a temperature of the laser oscillator, and a control unit which drives the fan at roughly constant low speed when a detected temperature by the temperature sensor is below a predetermined reference value and at roughly constant high speed when the detected temperature is the predetermined reference value or more.Type: ApplicationFiled: July 25, 2001Publication date: February 14, 2002Applicant: NIDEK CO., LTD.Inventors: Yasuyuki Naito, Wataru Niwa
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Patent number: 6344961Abstract: A multi-layer capacitor is constructed to minimize equivalent series inductance (ESL) and includes first inner electrodes and second inner electrodes disposed opposite to each other. The first inner electrodes are electrically connected to a first outer terminal electrode via a first feed-through conductor and the second inner electrodes are electrically connected to a second outer terminal electrode via a second feed-through conductor. The first and second feed-through conductors are arranged in such a manner that magnetic fields induced by current flowing through the inner electrodes are cancelled. In addition, some of these feed-through conductors are arranged to define first and second peripheral feed-through conductors connected to the first and second inner electrodes at each periphery of the first and second inner electrodes.Type: GrantFiled: February 28, 2000Date of Patent: February 5, 2002Assignee: Murata Manufacturing Co., LTDInventors: Yasuyuki Naito, Masaaki Taniguchi, Yoichi Kuroda, Haruo Hori, Takanori Kondo
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Publication number: 20010055191Abstract: A multilayer capacitor whose equivalent series inductance is reduced includes a capacitor main body having a generally rectangular parallel piped shape with two principal surfaces in a face-to-face relationship with each other and four side surfaces connecting the principal surfaces. A capacitor unit is formed in the capacitor main body by a respective pair of first and second internal electrodes disposed in the main body in a face-to-face relationship with a dielectric material layer interposed therebetween. At least three first external electrodes are located on respective ones of the side surfaces of the capacitor main body, with at least one of the first external electrodes being located on each of at least three of the side surfaces. The first internal electrode has at least three first lead electrodes, each of which extends to and is electrically coupled to a respective one of the first external electrodes.Type: ApplicationFiled: March 13, 2001Publication date: December 27, 2001Applicant: Murata Manufacturing Co., Ltd.Inventors: Yasuyuki Naito, Masaaki Taniguchi, Yoichi Kuroda, Takanori Kondo
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Patent number: 6331930Abstract: A multilayer capacitor is constructed and arranged to significantly reduce an equivalent serial inductance (ESL) and includes a capacitor body in which first and second inner electrodes extend, respectively, so as to connect first and second end surfaces and first and second side surfaces. First and second end surface terminal electrodes are provided on the first and second end surfaces. Also, first and second side surface terminal electrodes are provided on the first and second side surfaces, respectively. The widthwise dimension of the capacitor body is within a range of about 0.9 to about 1.1 times of the lengthwise dimension. Also, when a represents a lengthwise dimension and a widthwise dimension of the capacitor body, and b represents widths of the first inner electrodes and the second inner electrodes, it is preferable that a and b are determined so as to have the relationship of: 0.45≦b/a≦0.90.Type: GrantFiled: April 28, 2000Date of Patent: December 18, 2001Assignee: Murata Manufacturing Co., Ltd.Inventors: Yoichi Kuroda, Yasuyuki Naito, Haruo Hori, Takanori Kondo, Kyoshin Asakura
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Patent number: 6327134Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.Type: GrantFiled: October 4, 2000Date of Patent: December 4, 2001Assignee: Murata Manufacturing Co., Ltd.Inventors: Yoichi Kuroda, Masaaki Taniguchi, Yasuyuki Naito, Haruo Hori, Takanori Kondo, Michihiro Murata
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Patent number: 6320309Abstract: An anode substrate for a display device which is made of a glass plate and of which an inner surface formed thereon with color filters is smoothed with a smoothing layer. The anode substrate is subject to a heating treatment during manufacturing thereof is provided. The anode substrate includes at least one smoothing layer made of low-melting glass and formed on the inner surface of the glass plate. The low-melting glass has a softening point lower than a distortion point of the glass plate and a distortion point equal to or higher than a heating temperature in the subsequent step. A method for manufacturing the anode substrate is also disclosed.Type: GrantFiled: November 23, 1998Date of Patent: November 20, 2001Assignee: Futaba Denki Kogyo Kabushiki KaishaInventors: Yuji Nomura, Mamoru Namikawa, Yasuyuki Naito
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Patent number: 6292350Abstract: A multi-layer capacitor including a capacitor body having four sides including a first pair of opposed sides and a second pair of opposed sides, the capacitor body including a plurality of dielectric layers and at least a pair of first and second internal electrodes that oppose each other via one of the dielectric layers, the first internal electrode having first lead-out portions, the second internal electrode having second lead-out portions, the first and second lead-out portions being arranged to interdigitate with each other. The first polarity external electrode terminals are electrically connected to the first lead-out portions. At least one of the first polarity external electrode terminals is arranged on each of the first pair of opposed sides and at least one of the first polarity external electrode terminals being arranged on each of the second pair of opposed sides of the capacitor body. Second polarity external electrode terminals are electrically connected to the second lead-out portions.Type: GrantFiled: February 9, 2000Date of Patent: September 18, 2001Assignee: Murata Manufacturing, Co., LTDInventors: Yasuyuki Naito, Masaaki Taniguchi, Yoiohi Kuroda, Takanori Kondo, Michihiro Murata, Yoshitaka Tanino