Abstract: A ring connection which has been used for connecting processors connected far from each other, is improved in latency, throughput and operational function and is applied to attain high speed connection between processors. A plurality of modules such as processors are connected with rings having a plurality of signal lines. An independent signal line for a flag for acquiring a transmission right is provided. A transmission right is requested by setting the flag, and reception and transmission operations and transfer operation in the ring are operated in parallel by confirming later the advance acquisition of the transmission right based on the detection of no setting of the received flag.

Abstract: A shared memory multiprocessor (SMP) has efficient access to a main memory included in a particular node and a management of partitions that include the nodes. In correspondence with each page of main memory included in a node, a bit stored in a register indicates if the page has been accessed from any other node. In a case where the bit is "0", a cache coherent command to be sent to the other nodes is not transmitted. The bit is reset by software at the time of initialization and memory allocation, and it is set by hardware when the page of the main memory is accessed from any other node. In a case where the interior of an SMP is divided into partitions, the main memory of each node is divided into local and shared areas, for which respectively separate addresses can be designated. In each node, the configuration information items of the shared area and the local area are stored in registers.

Abstract: An information processing apparatus includes a crossbar switch having a plurality of switching circuits for data transfer; connection lines having address data transfer paths of m-bit unit connected to each of the input/output ports of the switching circuits, control signal transfer paths of m-bit unit connected to each of the input/output ports of the control circuits and back-up transfer paths of m-bit unit connected to each of the input/output ports of the back-up circuits; and transfer path processing circuit connected correspondingly to the connection lines constructed by the n-bit provided on each of the processing units, monitored transfer of data and control signal between the processing units through the switching circuit and the control circuit in the crossbar switch, and detected a failure of at least the switching circuit and the control circuit to thereby change the connection of at least one of the failed switching circuit and control circuit to a connection of the back-up circuit.

Abstract: An image forming apparatus comprising a recording medium having a recording layer which has a characteristic in which a receding contact angle decreases when the recording layer is heated in a condition where the recording layer is in contact with a liquid, the recording medium being moved by an external driving mechanism in a predetermined direction, a supplying head for supplying a liquid to a predetermined area on a surface of the recording layer of the recording medium, the supplying head comprising a narrow path for leading the liquid to the surface of the recording layer due to a capillary attraction, and a thermal head for selectively heating the surface of the recording layer of the recording medium in accordance with image information, wherein an area on the surface of the recording layer is heated and brought in contact with the liquid so that the area changes to a liquid adhesive area, and wherein a visible image corresponding to the image information is formed on the surface of the recording layer

Abstract: The invention discloses an integrated high voltage generating system possessing a charge pump for boosting stepwise the potential of an output node sequentially from the value of a first supply voltage to the value of a second supply voltage in synchronism with the clock pulses applied through a capacitor, wherein the second supply voltage is supplied to the gate electrode of the output MOS transistor connected between the output node of the charge pump and the output terminal. In this constitution, since the gate potential of the output MOS transistor is fixed at the valve of the second supply voltage, the potential fluctuation due to clock pulses does not appear on the output voltage taken out of the output terminal.

Abstract: This invention relates to an integrated high voltage generating system provided with a charge pump for raising the input power supply voltage sequentially while transferring the electric charges of the capacitors on a stage by stage basis, by serially connecting unit circuits composed of diode elements and capacitors, and supplying clock signals of mutually opposite phases to adjacent capacitors. Source and drain electrodes of a MOS transistor are connected between the first power supply output terminal and a second power supply output terminal, and the gate electrode of this MOS transistor is connected to the input end of any one of the unit circuits of the charge pump, wherein the voltage of the first power supply output terminal is stepped down depending on the voltage applied to the gate electrode of the MOS transistor, and is delivered to the second power supply output terminal.

Abstract: In a voltage detection circuit, at least a portion of the gate insulation film of a voltage detecting transistor is formed thicker than the other portion of the gate insulation film. Such voltage detecting transistor can be fabricated on a semiconductor substrate in the same process as conventional MOS transistors, so that the extra mask or process is not required. And since the amount of trapped electron does not change due to the passing of time, aging effects for detection precision is small.

Abstract: Method of and apparatus for converting a first two-dimensional image on first column direction and row direction scales to a second two-dimensional image on second column direction and row direction scales at a high speed, in which use is made of the periodicity of the positional relation between the image elements of the first image arranged in matrix and having various data values and the image elements of the second image arranged in matrix and having various data values to determine, for each one of the second image elements, four second image elements lying on the intersections between two adjacent rows and two adjacent columns in the first image element matrix which rows and columns surround the second image element and constitute a reference from for the second image element, and in which the data value for each second image element is calculated on the basis of the data values of the four first image elements associated with the first image element and the vertical and horizontal coordinates within th

Abstract: A display system which uses one display unit as if it were a plurality of display units to separately display whole information and partial information of document is disclosed. A plurality of display windows are defined on one display screen and a layout or a reduced image of the whole information is displayed in one of the window and information or image representing the information of a partial area of the whole information is displayed in other window. When one of the whole information and the partial area information is changed, the other information is also changed correspondingly, or a mark indicating a relation between the whole information and the partial area information is displayed in one of the window.

Abstract: A multimedia display system for efficiently and economically displaying document information containing characters, a graph and a picture image, without using a large-capacity image memory is disclosed in which information in a window is directly written in a bit-map memory or the display screen of a display device, without necessitating an image memory having a storage capacity corresponding to one page of a document. The multimedia display system is effectively used in the multiwindow display method, and includes a transfer controller for controlling data transfer between the bit-map memory and a memory device including a main memory, a picture image memory and a font memory, to control the size, position and contents of each window and to make possible image synthesis or image conversion.

Abstract: A display system operates to display characters, graphics and picture images in connection with a host computer in online mode in which character data is treated in the online display data form, and without connection of the host computer in offline mode in which character data is treated in the offline display form. Character data supplied for the online operation is converted into the offline display data form and stored for use in offline mode, or it is first stored and then converted when used in offline mode.

Abstract: Method of and apparatus for converting a first two-dimensional image on first column direction and row direction scales to a second two-dimensional image on second column direction and row direction scales at a high speed, in which use is made of the periodicity of the positional relation between the image elements of the first image arranged in matrix and having various data values and the image elements of the second image arranged in matrix and having various data values to determine, for each one of the second image elements, four second image elements lying on the intersections between two adjacent rows and two adjacent columns in the first image element matrix which rows and columns surround the second image element and constitute a reference from for the second image element, and in which the data value for each second image element is calculated on the basis of the data values of the four first image elements associated with the first image element and the vertical and horizontal coordinates within th

Abstract: In a method for controlling an image display apparatus having a file management table for managing information including titles of image data stored in a file memory and storage addresses therefor and a window management table for managing information including locations and sizes of windows on a display screen and quarry locations of the image data, the content of the window management table in accordance with an input command is updated so that the location and size of the window, the superposition of the windows and the scrolling of the window can be interactively changed.

Abstract: A memory control unit for a computer has the function of extracting or synthesizing only a necessary portion from or to two-dimensional image scan data, in addition to a conventional main memory function. It comprises an address controller for calculating an address of data to be transferred based on source and destination start addresses A.sub.1 and A.sub.2 of the two-dimensional image scan data, a lateral length W.sub.1 and a longitudinal length of the necessary portion, and lengths I.sub.1 and I.sub.2 of unnecessary portion, and a controller for controlling memory read/write operation.

Abstract: A high performance data processor being able to perform an address arithmetic at a high speed without enlarging the scale of the data processor for the increased number of bits of address data is disclosed.

Abstract: Disclosed is a method for controlling a rotary memory device for recording information on a recording medium in the form of a track, in which method the respective areas, such as a count section, a key section and a data section, which constitute a record format in the form of a record, are stored in the respective sectors each having a fixed length.