Patents by Inventor Yasuyuki Sonoda
Yasuyuki Sonoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170069687Abstract: According to one embodiment, a magnetoresistive memory device includes a stacked layer structure includes a first magnetic layer, a second magnetic layer, and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, and a third magnetic layer provided on the first magnetic layer, which is opposite the nonmagnetic layer. The third magnetic layer includes a first magnetic material portion and a second magnetic material portion provided between the stacked layer structure and the first magnetic material portion. The saturation magnetization of the second magnetic material portion is smaller than that of the first magnetic material portion.Type: ApplicationFiled: March 9, 2016Publication date: March 9, 2017Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masahiko NAKAYAMA, Yutaka HASHIMOTO, Yasuyuki SONODA, Tadashi KAI, Kenji NOMA
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Publication number: 20160380028Abstract: According to one embodiment, a magnetic memory includes a first metal layer including a first metal, a second metal layer on the first metal layer, the second metal layer including a second metal which is more easily oxidized than the first metal, the second metal layer having a first sidewall portion which contacts the first metal layer, and the second metal layer having a second sidewall portion above the first sidewall portion, the second sidewall portion which steps back from the first sidewall portion, a magnetoresistive element on the second metal layer, a third metal layer on the magnetoresistive element, and a first material which contacts a sidewall portion of the magnetoresistive element and the second sidewall portion of the second metal layer, the first material including an oxide of the second metal.Type: ApplicationFiled: September 6, 2016Publication date: December 29, 2016Applicants: KABUSHIKI KAISHA TOSHIBA, SK HYNIX INC.Inventors: Yasuyuki SONODA, Masahiko NAKAYAMA, Min Suk LEE, Masatoshi YOSHIKAWA, Kuniaki SUGIURA, Ji Hwan HWANG
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Publication number: 20160241090Abstract: Provided is a high-powered low profile motor. The motor includes a stator (20) facing a rotor (50) while having a gap from the rotor (50). The stator (20) includes a ring-shaped connection core (10) formed by connecting a plurality of divided cores (5a) and an insulator (24) formed as if surrounding the connection core (10) by resin molding by an insertion forming. An inner diameter (r) of the connection core (10) is set smaller than inner diameters (R) of the divided cores (5a) bent in a half moon shape when connected.Type: ApplicationFiled: November 7, 2014Publication date: August 18, 2016Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yukinori NAKAGAWA, Minoru YOSHIDA, Yasuyuki SONODA, Yasamasa NAGASAKI
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Publication number: 20160093469Abstract: According to one embodiment, an etching apparatus includes a stage in an etching chamber, the stage which holds one of a first substrate and a second substrate, a plasma generator in the etching chamber, the plasma generator which is opposite to the stage and irradiates an ion beam toward the stage, a grid which is provided between the plasma generator and the stage, a supporter supporting the stage, the supporter having a rotational axis in a direction in which the ion beam is irradiated, a controller which is configured to mount the first substrate on the stage and irradiate the ion beam with the beam angle larger than 0° to the first substrate, when an elapsed time from an end of an etching of a predetermined layer in the second substrate is equal to or larger than a predetermined time.Type: ApplicationFiled: March 10, 2015Publication date: March 31, 2016Inventor: Yasuyuki SONODA
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Publication number: 20160087195Abstract: According to one embodiment, an etching apparatus includes an etching chamber, a stage in the etching chamber, a plasma generator in the etching chamber, the plasma generator being opposite to the stage and irradiating an ion beam toward the stage, a supporter supporting the stage, the supporter having a rotational axis in a direction in which the ion beam is irradiated, a first driver changing a beam angle between a direction which is perpendicular to an upper surface of the stage and the direction in which the ion beam is irradiated, and a second driver which rotates the stage on the rotational axis.Type: ApplicationFiled: March 4, 2015Publication date: March 24, 2016Inventor: Yasuyuki SONODA
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Publication number: 20160087004Abstract: According to one embodiment, a magnetic memory includes a magnetic element, and a metal layer stacked on the magnetic element. H/D>1.47 is satisfied, where H denotes a sum of thicknesses of the magnetic element and the metal layer in a first direction in which the magnetic element and the metal layer are stacked, and D denotes a width of the magnetic element in a second direction perpendicular to the first direction.Type: ApplicationFiled: March 2, 2015Publication date: March 24, 2016Inventors: Yasuyuki SONODA, Min Suk LEE, Ji Hwan HWANG, Chang Hyup SHIN, Masatoshi YOSHIKAWA
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Patent number: 9236563Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistance effect element having a structure in which a first magnetic layer, a nonmagnetic layer, a second magnetic layer, and a third magnetic layer are stacked, wherein the third magnetic layer comprises a first region and a plurality of second regions, and each of the second regions is surrounded by the first region, has conductivity, and has a greater magnetic property than the first region.Type: GrantFiled: March 7, 2014Date of Patent: January 12, 2016Inventors: Yutaka Hashimoto, Tadashi Kai, Masahiko Nakayama, Hiroaki Yoda, Toshihiko Nagase, Masatoshi Yoshikawa, Yasuyuki Sonoda
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Patent number: 9231192Abstract: According to one embodiment, a memory device with magnetroresistive effect element is disclosed. The element includes first metal magnetic film (MMF) with nonmagnetic element and axis of easy magnetization perpendicular (EMP), first insulating film, first intermediate magnetic film between the first MMF and the first insulating film, second MMF on the first insulating film and including nonmagnetic elements, the second MMF having axis of EMP, second intermediate magnetic film between the first insulating film and the second MMF, and diffusion preventing film including metal nitride having barrier property against diffusion of the nonmagnetic elements between the first MMF and the first intermediate magnetic film.Type: GrantFiled: January 6, 2014Date of Patent: January 5, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Ikeno, Koji Yamakawa, Katsuaki Natori, Yasuyuki Sonoda
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MAGNETIC MEMORY HAVING MAGNETORESISTIVE ELEMENT AND METHOD OF MANUFACTURING MAGNETORESISTIVE ELEMENT
Publication number: 20150263273Abstract: According to one embodiment, a magnetic memory includes a transistor having first and second diffusion layers in a semiconductor substrate and a gate electrode between the first and second diffusion layers, a first insulating layer on the semiconductor substrate, the first insulating layer covering the transistor, a first contact plug in the first insulating layer, the first contact plug connected to the first diffusion layer, a second contact plug in the first insulating layer, the second contact plug connected to the second diffusion layer, a magnetoresistive element on the first insulating layer, the magnetoresistive element connected to the first contact plug, an electrode on the magnetoresistive element, and an impurity region in the first insulating layer, the second contact plug, and the electrode.Type: ApplicationFiled: September 5, 2014Publication date: September 17, 2015Inventors: Masatoshi YOSHIKAWA, Yasuyuki SONODA, Satoshi SETO, Shuichi TSUBATA, Kazuhiro TOMIOKA -
Publication number: 20150069554Abstract: According to one embodiment, a magnetic memory is disclosed. The memory includes a conductive layer containing a first metallic material, a stacked body formed above the conductive layer and including a first magnetic layer containing a second metallic material, a second magnetic layer, and a tunnel barrier layer formed between the first magnetic layer and the second magnetic layer, and an insulating layer formed on a side face of the stacked body and containing an oxide of the first metallic material. A standard electrode potential of the first metallic material is lower than the standard electrode potential of the second metallic material.Type: ApplicationFiled: March 7, 2014Publication date: March 12, 2015Inventors: Masahiko NAKAYAMA, Yasuyuki SONODA, Hiroaki YODA, Makoto NAGAMINE, Masatoshi YOSHIKAWA, Masaru TOKO, Tadashi KAI, Daisuke WATANABE, Youngmin EEH, Koji UEDA, Kazuya SAWADA, Toshihiko NAGASE
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Publication number: 20150069552Abstract: According to one embodiment, a magnetic memory device includes a magnetoresistance effect element having a structure in which a first magnetic layer, a nonmagnetic layer, a second magnetic layer, and a third magnetic layer are stacked, wherein the third magnetic layer comprises a first region and a plurality of second regions, and each of the second regions is surrounded by the first region, has conductivity, and has a greater magnetic property than the first region.Type: ApplicationFiled: March 7, 2014Publication date: March 12, 2015Inventors: Yutaka HASHIMOTO, Tadashi KAI, Masahiko NAKAYAMA, Hiroaki YODA, Toshihiko NAGASE, Masatoshi YOSHIKAWA, Yasuyuki SONODA
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Patent number: 8741161Abstract: According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a pillar on a base layer, forming a insulating layer on the base layer to cover the pillar by using GCIB method, where a lowermost portion of an upper surface of the insulating layer is lower than an upper surface of the pillar, and polishing the insulating layer and the pillar to expose a head of the pillar by using CMP method, where an end point of the polishing is the lowermost portion of the upper surface of the insulating layer.Type: GrantFiled: March 23, 2012Date of Patent: June 3, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Yasuyuki Sonoda, Kyoichi Suguro, Masatoshi Yoshikawa, Koji Yamakawa, Katsuaki Natori, Daisuke Ikeno
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Publication number: 20140117478Abstract: According to one embodiment, a memory device with magnetroresistive effect element is disclosed. The element includes first metal magnetic film (MMF) with nonmagnetic element and axis of easy magnetization perpendicular (EMP), first insulating film, first intermediate magnetic film between the first MMF and the first insulating film, second MMF on the first insulating film and including nonmagnetic elements, the second MMF having axis of EMP, second intermediate magnetic film between the first insulating film and the second MMF, and diffusion preventing film including metal nitride having barrier property against diffusion of the nonmagnetic elements between the first MMF and the first intermediate magnetic film.Type: ApplicationFiled: January 6, 2014Publication date: May 1, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Daisuke Ikeno, Koji Yamakawa, Katsuaki Natori, Yasuyuki Sonoda
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Patent number: 8653614Abstract: According to one embodiment, a memory device with magnetroresistive effect element is disclosed. The element includes first metal magnetic film (MMF) with nonmagnetic element and axis of easy magnetization perpendicular (EMP), first insulating film, first intermediate magnetic film between the first MMF and the first insulating film, second MMF on the first insulating film and including nonmagnetic elements, the second MMF having axis of EMP, second intermediate magnetic film between the first insulating film and the second MMF, and diffusion preventing film including metal nitride having barrier property against diffusion of the nonmagnetic elements between the first MMF and the first intermediate magnetic film.Type: GrantFiled: February 28, 2012Date of Patent: February 18, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Ikeno, Koji Yamakawa, Katsuaki Natori, Yasuyuki Sonoda
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Patent number: 8604573Abstract: According to one embodiment, a semiconductor memory device includes plural magneto-resistance elements. In the semiconductor memory device, each of the magneto-resistance elements includes: a first magnetic layer formed on a semiconductor substrate, the first magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; a non-magnetic layer formed on the first magnetic layer; a second magnetic layer formed on the non-magnetic layer, the second magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; and a sidewall film provided so as to cover a sidewall of each of the magneto-resistance elements with a protective film interposed therebetween, the sidewall film providing a tensile stress to the magneto-resistance element along the easy axis of magnetization.Type: GrantFiled: March 20, 2012Date of Patent: December 10, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Koji Yamakawa, Katsuaki Natori, Daisuke Ikeno, Yasuyuki Sonoda
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Patent number: 8410529Abstract: According to one embodiment, a semiconductor device, includes a magneto resistive element including a first magnetic layer, a first interface magnetic layer, a nonmagnetic layer, a second interface magnetic layer and a second magnetic layer as a stacked structure in order; and a metal layer including first metal atoms, second metal atoms and boron atoms, the metal layer being provided at least one region selected from under the first magnetic, between the first magnetic layer and the first interface magnetic layer, between the second interface magnetic layer and the second magnetic layer, and upper the second magnetic layer.Type: GrantFiled: September 16, 2011Date of Patent: April 2, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Ikeno, Koji Yamakawa, Katsuaki Natori, Yasuyuki Sonoda
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Publication number: 20130005148Abstract: According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a pillar on a base layer, forming a insulating layer on the base layer to cover the pillar by using GCIB method, where a lowermost portion of an upper surface of the insulating layer is lower than an upper surface of the pillar, and polishing the insulating layer and the pillar to expose a head of the pillar by using CMP method, where an end point of the polishing is the lowermost portion of the upper surface of the insulating layer.Type: ApplicationFiled: March 23, 2012Publication date: January 3, 2013Inventors: Yasuyuki Sonoda, Kyoichi Suguro, Masatoshi Yoshikawa, Koji Yamakawa, Katsuaki Natori, Daisuke Ikeno
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Publication number: 20120326251Abstract: According to one embodiment, a semiconductor memory device includes plural magneto-resistance elements being two-dimensionally arrayed on a semiconductor substrate. In the semiconductor memory device, each of the magneto-resistance elements includes: a first magnetic layer formed on the semiconductor substrate; a non-magnetic layer formed on the first magnetic layer; and a second magnetic layer formed on the non-magnetic layer, and an insulating film buried between the magneto-resistance elements adjacent to each other, a powder made of a metallic material or a magnetic material being dispersed in the insulating film.Type: ApplicationFiled: March 20, 2012Publication date: December 27, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Koji Yamakawa, Daisuke Ikeno, Yasuyuki Sonoda
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Publication number: 20120326252Abstract: According to one embodiment, a semiconductor memory device includes plural magneto-resistance elements. In the semiconductor memory device, each of the magneto-resistance elements includes: a first magnetic layer formed on a semiconductor substrate, the first magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; a non-magnetic layer formed on the first magnetic layer; a second magnetic layer formed on the non-magnetic layer, the second magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; and a sidewall film provided so as to cover a sidewall of each of the magneto-resistance elements with a protective film interposed therebetween, the sidewall film providing a tensile stress to the magneto-resistance element along the easy axis of magnetization.Type: ApplicationFiled: March 20, 2012Publication date: December 27, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Koji Yamakawa, Katsuaki Natori, Daisuke Ikeno, Yasuyuki Sonoda
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Publication number: 20120241879Abstract: According to one embodiment, a semiconductor device, includes a magneto resistive element including a first magnetic layer, a first interface magnetic layer, a nonmagnetic layer, a second interface magnetic layer and a second magnetic layer as a stacked structure in order; and a metal layer including first metal atoms, second metal atoms and boron atoms, the metal layer being provided at least one region selected from under the first magnetic, between the first magnetic layer and the first interface magnetic layer, between the second interface magnetic layer and the second magnetic layer, and upper the second magnetic layer.Type: ApplicationFiled: September 16, 2011Publication date: September 27, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Daisuke IKENO, Koji Yamakawa, Katsuaki Natori, Yasuyuki Sonoda