Patents by Inventor Ya-Ting Chang

Ya-Ting Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260107702
    Abstract: An integrated circuit device includes a transistor, a conductive contact plug, a first interconnect structure, and a conductive structure. The transistor includes a gate structure and source/drain regions at opposite sides of the gate structure. The conductive contact plug is electrically coupled to one of the gate structure and the source/drain regions. The first interconnect structure is disposed over the conductive contact plug. The conductive structure is disposed electrically coupled to the conductive contact plug by the first interconnect structure. The conductive structure includes a fill metal and a transition metal dichalcogenide liner cupping an underside of the fill metal. A bottommost position of the transition metal dichalcogenide liner is lower than a bottommost position of the fill metal.
    Type: Application
    Filed: December 15, 2025
    Publication date: April 16, 2026
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Ya-Ting CHANG, Jian-Zhi HUANG, Jin-Bin YANG, I-Chih NI, Chih-I WU
  • Publication number: 20260104919
    Abstract: Task scheduling is performed based on activity indexes collected in a heterogeneous multiprocessor computing system. Both per-task activity indexes and per-processor activity indexes include non-stall time of task execution and a corresponding processor operating point (OPP), and stall time of memory access and a corresponding memory OPP. The non-stall time and the stall time are scaled based on at least the corresponding processor OPP and the corresponding memory OPP, respectively. The system uses using the scaled non-stall time and the scaled stall time to estimate capacity and dynamic power of each processor when assigned a given task at a given processor OPP and a given memory OPP. The load demand of the given task is also estimated. A task scheduler assigns the given task to a target processor and requests memory resources for executing the given task to satisfy power and performance criteria.
    Type: Application
    Filed: March 7, 2025
    Publication date: April 16, 2026
    Inventors: Tsung-Yu Tsai, Ya-Ting Chang, Wen-Wen Hsieh, Chien-Yuan Lai, Kun-Hao Liu
  • Patent number: 12595315
    Abstract: Provided is a monoclonal antibody of matrix metalloproteinase 1. The monoclonal antibody has a heavy chain variable region with an amino sequence comprising i) CDR1 selected from the group consisting of SEQ ID NOs: 1, 7 and 13, ii) CDR2 selected from the group consisting of SEQ ID NOs: 2, 8 and 14, and iii) CDR3 selected from the group consisting of SEQ ID NOs: 3, 9 and 15. The monoclonal antibody also has a light chain variable region with an amino sequence comprising i) CDR1 selected from the group consisting of SEQ ID NOs: 4, 10 and 16, ii) CDR2 selected from the group consisting of SEQ ID NOS: 5, 11 and 17, and iii) CDR3 selected from the group consisting of SEQ ID NOs: 6, 12 and 18. A polynucleotide, a detection kit and a detection method are also provided as well.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: April 7, 2026
    Assignee: S&T BIOMED CO., LTD.
    Inventors: Ya-Ting Chang, Jau-Song Yu, Jun-Sheng Wang, Shu-Fang Wu, Chih-Ju Chen, Yen-Chun Liu
  • Patent number: 12518968
    Abstract: An integrated circuit device includes a substrate, a first transition metal dichalcogenide layer over the substrate, a dielectric layer over the first transition metal dichalcogenide layer, a first gate electrode, and a first source contact and a first drain contact. The first transition metal dichalcogenide layer has a surface roughness greater than 0.5 nm and less than 1 nm. The first gate electrode is over the dielectric layer and a first portion of the first transition metal dichalcogenide layer. The first source contact and the first drain contact are respectively connected with a second portion and a third portion of the first transition metal dichalcogenide layer. The first portion of the first transition metal dichalcogenide layer is between the second and third portions of the first transition metal dichalcogenide layer.
    Type: Grant
    Filed: June 28, 2024
    Date of Patent: January 6, 2026
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya-Ting Chang, Jian-Zhi Huang, Jin-Bin Yang, I-Chih Ni, Chih-I Wu
  • Patent number: 12417119
    Abstract: A multi-processor system performs thermal-aware task scheduling and task migration. Based on temperature measurements, the system determines one or more thermal conditions of each processor. The thermal conditions include a present temperature, a historical temperature, a predicted temperature, and thermal headroom of the processor. A scheduler identifies a target processor among the processors based on, at least in part, the one or more thermal conditions of each processor, and assigns a task to be executed by the target processor. For task migration, the system detects that a source processor satisfies a task migration criterion by comparing one or more of the thermal conditions of the source processor with corresponding thresholds. The scheduler identifies a target processor based on, at least in part, one or more of the thermal conditions of each processor, and migrates a task from the source processor to the target processor for execution.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: September 16, 2025
    Assignee: MediaTek, Inc.
    Inventors: Ya-Ting Chang, Chih Fu Tsai, Tai Yu Chen, Jia-Ming Chen, Shun-Yao Yang, Ta-Chang Liao, Shengquan Wu, Yu-Chia Chang
  • Publication number: 20250067275
    Abstract: An impeller includes a hub, an outer ring, a plurality of first blades and a plurality of second blades. The plurality of first blades are arranged around the hub at intervals. Each of the plurality of first blades passes through the outer ring, extends inward from the outer ring, and is connected to the hub. The plurality of second blades are arranged around the hub at intervals. Each of the plurality of second blades passes through the outer ring. At least one of the plurality of second blades is disposed between the plurality of first blades. Each of the second blades includes a guiding portion, which is an inclined plane disposed on an inner end, and extends obliquely downward toward the hub. A length of each of the plurality of second blades is between 10% and 45% of a length of each of the plurality of first blades.
    Type: Application
    Filed: November 14, 2024
    Publication date: February 27, 2025
    Inventors: Chin-Hung Lee, Chieh-Hung Chang, Chieh-Shih Chang, Ya-Ting Chang
  • Patent number: 12221975
    Abstract: An impeller includes a hub, an outer ring, a plurality of first blades and a plurality of second blades. The plurality of first blades are arranged around the hub at intervals. Each of the plurality of first blades passes through the outer ring, extends inward from the outer ring, and is connected to the hub. The plurality of second blades are arranged around the hub at intervals. Each of the plurality of second blades passes through the outer ring. At least one of the plurality of second blades is disposed between the plurality of first blades. A length of each of the plurality of second blades is between 10% and 45% of a length of each of the plurality of first blades.
    Type: Grant
    Filed: March 2, 2023
    Date of Patent: February 11, 2025
    Assignee: Delta Electronics, Inc.
    Inventors: Chin-Hung Lee, Chieh-Hung Chang, Chieh-Shih Chang, Ya-Ting Chang
  • Patent number: 12180979
    Abstract: A centrifugal fan is disclosed and includes a housing, a fan wheel, a first throat portion and a second throat portion. The housing includes a lower cover connected to an upper cover through a peripheral wall to form an accommodation space and an outlet. The upper cover includes an inlet communicated with the outlet. The fan wheel is disposed on the lower cover and accommodated in the accommodation space. The fan wheel is rotated along a rotation direction. The first throat portion is disposed adjacent to a lateral end of the outlet and protrudes from the peripheral wall toward the accommodation space. The second throat portion is disposed adjacent to another lateral end of the outlet, and protrudes from the peripheral wall toward the accommodation space. When the fan wheel is rotated along the rotational direction, an airflow is guided from the first throat portion to the second throat portion.
    Type: Grant
    Filed: September 7, 2023
    Date of Patent: December 31, 2024
    Assignee: Delta Electronics, Inc.
    Inventors: Chin-Hung Lee, Chih-Wei Chan, Ya-Ting Chang
  • Patent number: 12159092
    Abstract: Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: December 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Ping Chiang, Ming-Hui Chih, Chih-Wei Hsu, Ping-Chieh Wu, Ya-Ting Chang, Tsung-Yu Wang, Wen-Li Cheng, Hui En Yin, Wen-Chun Huang, Ru-Gun Liu, Tsai-Sheng Gau
  • Publication number: 20240355622
    Abstract: An integrated circuit device includes a substrate, a first transition metal dichalcogenide layer over the substrate, a dielectric layer over the first transition metal dichalcogenide layer, a first gate electrode, and a first source contact and a first drain contact. The first transition metal dichalcogenide layer has a surface roughness greater than 0.5 nm and less than 1 nm. The first gate electrode is over the dielectric layer and a first portion of the first transition metal dichalcogenide layer. The first source contact and the first drain contact are respectively connected with a second portion and a third portion of the first transition metal dichalcogenide layer. The first portion of the first transition metal dichalcogenide layer is between the second and third portions of the first transition metal dichalcogenide layer.
    Type: Application
    Filed: June 28, 2024
    Publication date: October 24, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Ya-Ting CHANG, Jian-Zhi HUANG, Jin-Bin YANG, I-Chih NI, Chih-I WU
  • Patent number: 12062540
    Abstract: A method for forming an integrated circuit device is provided. The method includes forming a transistor over a frontside of a substrate; forming an interconnect structure over the transistor; depositing a first transition metal layer over the interconnect structure; performing a plasma treatment to turn the first transition metal layer into a first transition metal dichalcogenide layer; forming a dielectric layer over the first transition metal dichalcogenide layer; forming a first gate electrode over the dielectric layer and a first portion of the first transition metal dichalcogenide layer; and forming a first source contact and a first drain contact respectively connected with a second portion and a third portion of the first transition metal dichalcogenide layer, the first portion of the first transition metal dichalcogenide layer being between the second and third portions of the first transition metal dichalcogenide layers.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: August 13, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Ya-Ting Chang, Jian-Zhi Huang, Jin-Bin Yang, I-Chih Ni, Chih-I Wu
  • Patent number: 11989005
    Abstract: A system performs adaptive thermal ceiling control at runtime. The system includes computing circuits and a thermal management module. When detecting a runtime condition change that affects power consumption in the system, the thermal management module determines an adjustment to the thermal ceiling of a computing circuit, and increases the thermal ceiling of the computing circuit according to the adjustment.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: May 21, 2024
    Assignee: MediaTek Inc.
    Inventors: Bo-Jr Huang, Jia-Wei Fang, Jia-Ming Chen, Ya-Ting Chang, Chien-Yuan Lai, Cheng-Yuh Wu, Yi-Pin Lin, Wen-Wen Hsieh, Min-Shu Wang
  • Publication number: 20230416549
    Abstract: The present invention provides a method for 3D inkjet printing, which comprises: a preheating step: an external heating source is used to heat a main body layer composed of a first composition to a first temperature, wherein the main body layer has a thickness of 10 ?m to 500 ?m and a unit density of 0.1 to 1.0 g/cm3, and the first temperature is less than the melting point of the first composition; a heating step: a second composition is applied to the surface of the first composition at the first temperature of the composite to proceed an exothermic cross-linking polymerization, so that the main body layer is heated to a second temperature to become a molten state; and a cooling step: the main body layer in the molten state is cooled down and solidified to form.
    Type: Application
    Filed: September 8, 2023
    Publication date: December 28, 2023
    Inventors: Chorng-Shyan Chern, Jeng-Ywan Jeng, Ya-Ting Chang, Cheng-Che Lu
  • Publication number: 20230417258
    Abstract: A centrifugal fan is disclosed and includes a housing, a fan wheel, a first throat portion and a second throat portion. The housing includes a lower cover connected to an upper cover through a peripheral wall to form an accommodation space and an outlet. The upper cover includes an inlet communicated with the outlet. The fan wheel is disposed on the lower cover and accommodated in the accommodation space. The fan wheel is rotated along a rotation direction. The first throat portion is disposed adjacent to a lateral end of the outlet and protrudes from the peripheral wall toward the accommodation space. The second throat portion is disposed adjacent to another lateral end of the outlet, and protrudes from the peripheral wall toward the accommodation space. When the fan wheel is rotated along the rotational direction, an airflow is guided from the first throat portion to the second throat portion.
    Type: Application
    Filed: September 7, 2023
    Publication date: December 28, 2023
    Inventors: Chin-Hung Lee, Chih-Wei Chan, Ya-Ting Chang
  • Publication number: 20230367942
    Abstract: Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 16, 2023
    Inventors: Chia-Ping CHIANG, Ming-Hui CHIH, Chih-Wei HSU, Ping-Chieh WU, Ya-Ting CHANG, Tsung-Yu WANG, Wen-Li CHENG, Hui En YIN, Wen-Chun HUANG, Ru-Gun LIU, Tsai-Sheng GAU
  • Patent number: 11800985
    Abstract: The present invention provides an electrocardiographic monitoring device comprising a device body configured to be attached to a user's chest; a plurality of electrodes provided on the device body; and a controller provided on the device body and connected to the electrodes in order to obtain the user's electrocardiographic signal waveforms. The electrocardiographic monitoring device of the invention can be applied in a blood pressure monitoring system for monitoring a user's blood pressure.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: October 31, 2023
    Assignees: BIV MEDICAL, LTD.
    Inventors: Shiming Lin, Shih-Wei Chiang, Cheng-Yan Guo, Tai-Cun Lin, Wei-Chih Huang, Chun-Nan Chen, Ya-Ting Chang
  • Patent number: 11795339
    Abstract: The present invention provides a method for 3D inkjet printing, which comprises: a preheating step: an external heating source is used to heat a main body layer composed of a first composition to a first temperature, wherein the main body layer has a thickness of 10 ?m to 500 ?m and a unit density of 0.1 to 1.0 g/cm3, and the first temperature is less than the melting point of the first composition; a heating step: a second composition is applied to the surface of the first composition at the first temperature of the composite to proceed an exothermic cross-linking polymerization, so that the main body layer is heated to a second temperature to become a molten state; and a cooling step: the main body layer in the molten state is cooled down and solidified to form.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: October 24, 2023
    Assignee: National Taiwan University of Science and Technology
    Inventors: Chorng-Shyan Chern, Jeng-Ywan Jeng, Ya-Ting Chang, Cheng-Che Lu
  • Patent number: 11790145
    Abstract: Implementations of the present disclosure provide coloring methods that sort and pre-color nodes of G0-linked networks in a multiple-patterning technology (MPT)-compliant layout design by coordinate. In one embodiment, a method includes identifying target networks in a circuit layout, each target network having two or more linked nodes representing circuit patterns, and each target network being presented in an imaginary X-Y coordinate plane, assigning a first feature to a first node in each target network, the first node is determined using a coordinate-based method, and assigning the first feature and a second feature to remaining nodes in each target network in an alternating manner so that any two immediately adjacent linked nodes in each target network have different features.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: October 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Ping Chiang, Ming-Hui Chih, Chih-Wei Hsu, Ping-Chieh Wu, Ya-Ting Chang, Tsung-Yu Wang, Wen-Li Cheng, Hui En Yin, Wen-Chun Huang, Ru-Gun Liu, Tsai-Sheng Gau
  • Patent number: 11781567
    Abstract: A centrifugal fan is disclosed and includes a housing, a fan wheel, a first throat portion and a second throat portion. The housing includes a lower cover connected to an upper cover through a peripheral wall to form an accommodation space and an outlet. The upper cover includes an inlet communicated with the outlet. The fan wheel is disposed on the lower cover and accommodated in the accommodation space. The fan wheel is rotated along a rotation direction. The first throat portion is disposed adjacent to a lateral end of the outlet and protrudes from the peripheral wall toward the accommodation space. The second throat portion is disposed adjacent to another lateral end of the outlet, and protrudes from the peripheral wall toward the accommodation space. When the fan wheel is rotated along the rotational direction, an airflow is guided from the first throat portion to the second throat portion.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: October 10, 2023
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chin-Hung Lee, Chih-Wei Chan, Ya-Ting Chang
  • Publication number: 20230279868
    Abstract: An impeller includes a hub, an outer ring, a plurality of first blades and a plurality of second blades. The plurality of first blades are arranged around the hub at intervals. Each of the plurality of first blades passes through the outer ring, extends inward from the outer ring, and is connected to the hub. The plurality of second blades are arranged around the hub at intervals. Each of the plurality of second blades passes through the outer ring. At least one of the plurality of second blades is disposed between the plurality of first blades. A length of each of the plurality of second blades is between 10% and 45% of a length of each of the plurality of first blades.
    Type: Application
    Filed: March 2, 2023
    Publication date: September 7, 2023
    Inventors: Chin-Hung Lee, Chieh-Hung Chang, Chieh-Shih Chang, Ya-Ting Chang