Abstract: A method includes fabricating an image sensing element in a substrate. A plurality of inter-metal dielectric (IMD) layers are formed over the substrate. Each IMD layer includes a metal layer and a dielectric layer. A planar top surface of a top IMD layer of the plurality of IMD layers is planarized. A portion of the top IMD layer is then removed to transform a region of the planar top surface to a curved recess. A lens is formed on the top IMD layer and in the curved recess. A color filter layer is disposed over the lens and the image sensing element.

Abstract: A method includes fabricating an image sensing element in a substrate. A plurality of inter-metal dielectric (IMD) layers are formed over the substrate. Each IMD layer includes a metal layer and a dielectric layer. A planar top surface of a top IMD layer of the plurality of IMD layers is planarized. A portion of the top IMD layer is then removed to transform a region of the planar top surface to a curved recess. A lens is formed on the top IMD layer and in the curved recess. A color filter layer is disposed over the lens and the image sensing element.

Abstract: A device includes an image sensing element. The device also includes a Silicon Dioxide (SiO2) layer, located over the image sensing element, exhibiting a first index of refraction. The device further includes a first lens, located over the SiO2 layer, exhibiting a second index of refraction greater than the first index of refraction. The device still further includes a color filter located over the first lens and a second lens located over the color filter.

Abstract: A device includes an image sensing element. The device also includes a Silicon Dioxide (SiO2) layer, located over the image sensing element, exhibiting a first index of refraction. The device further includes a first lens, located over the SiO2 layer, exhibiting a second index of refraction greater than the first index of refraction. The device still further includes a color filter located over the first lens and a second lens located over the color filter.

Abstract: An image sensor device and fabrication method thereof wherein a substrate having at least one shallow trench isolation structure therein is provided. At least one photosensor and at least one light emitting element, e.g., such as MOS or LED, are formed in the substrate. The photosensor and the light emitting element are isolated by the shallow trench isolation structure. An opening is formed in the shallow trench isolation structure to expose part of the substrate. An opaque shield is formed in the opening to prevent photons from the light emitting element from striking the photosensor.

Abstract: An image sensor device and fabrication method thereof wherein a substrate having at least one shallow trench isolation structure therein is provided. At least one photosensor and at least one light emitting element, e.g., such as MOS or LED, are formed in the substrate. The photosensor and the light emitting element are isolated by the shallow trench isolation structure. An opening is formed in the shallow trench isolation structure to expose part of the substrate. An opaque shield is formed in the opening to prevent photons from the light emitting element from striking the photosensor.

Abstract: An image sensor device and fabrication method thereof wherein a substrate having at least one shallow trench isolation structure therein is provided. At least one photosensor and at least one light emitting element, e.g., such as MOS or LED, are formed in the substrate. The photosensor and the light emitting element are isolated by the shallow trench isolation structure. An opening is formed in the shallow trench isolation structure to expose part of the substrate. An opaque shield is formed in the opening to prevent photons from the light emitting element from striking the photosensor.

Abstract: A programmable memory circuit and a method for programming the same are disclosed. A polycrystalline silicon resistor pair are used in a programmable memory cell. The pair includes a first polycrystalline silicon resistor stressable by a predetermined current thereacross, and a second polycrystalline silicon resistor similarly structured as the first polycrystalline silicon resistor stressable by the predetermined current, wherein when only the first resistor is stressed by the predetermined current, a resistance of the first resistor is lowered as compared to the unstressed second resistor, thereby programming the memory cell.

Abstract: A method for manufacturing organic light-emitting diodes (OLEDs) is disclosed, by adding nitrogen (N2) into the material of a hole transport layer (HTL) and evaporating the nitrogen and the material of the hole transport layer while growing the hole transport layer, so as to dope nitrogen molecules into the hole transport layer. In the hole transport layer, the nitrogen molecules are impurities of higher energy level, and are used to catch holes while the holes transports and trap the holes in the hole transport layer, thereby obtaining an object of improving the luminance efficiency of the organic light-emitting diodes with lower cost.

Abstract: A method of growing single crystal Gallium Nitride on silicon substrate is disclosed including: removing oxide layer of silicon substrate, growing buffer layer of Silicon Carbon Nitride (SiCN), and growing single crystalline Gallium Nitride thin film, characterized in that a buffer layer of SiCN is grown to avoid lattice mismatch which appears when Gallium Nitride is grown directly on silicon substrate, and that Rapid Thermal Chemical Vapor Deposition is adopted to grow SiCN buffer layer, and that Metalorganic Chemical Vapor Deposition is adopted to grow single crystalline GaN thin film.

Abstract: A device includes an image sensing element. The device also includes a Silicon Dioxide (SiO2) layer, located over the image sensing element, exhibiting a first index of refraction. The device further includes a first lens, located over the SiO2 layer, exhibiting a second index of refraction greater than the first index of refraction. The device still further includes a color filter located over the first lens and a second lens located over the color filter.

Abstract: An image sensor device and fabrication method thereof wherein a substrate having at least one shallow trench isolation structure therein is provided. At least one photosensor and at least one light emitting element, e.g., such as MOS or LED, are formed in the substrate. The photosensor and the light emitting element are isolated by the shallow trench isolation structure. An opening is formed in the shallow trench isolation structure to expose part of the substrate. An opaque shield is formed in the opening to prevent photons from the light emitting element from striking the photosensor.

Abstract: A programmable memory circuit and a method for programming the same are disclosed. A polycrystalline silicon resistor pair are used in a programmable memory cell. The pair includes a first polycrystalline silicon resistor stressable by a predetermined current thereacross, and a second polycrystalline silicon resistor similarly structured as the first polycrystalline silicon resistor stressable by the predetermined current, wherein when only the first resistor is stressed by the predetermined current, a resistance of the first resistor is lowered as compared to the unstressed second resistor, thereby programming the memory cell.

Abstract: A method for manufacturing organic light-emitting diodes (OLEDs) is disclosed, by adding nitrogen (N2) into the material of a hole transport layer (HTL) and evaporating the nitrogen and the material of the hole transport layer while growing the hole transport layer, so as to dope nitrogen molecules into the hole transport layer. In the hole transport layer, the nitrogen molecules are impurities of higher energy level, and are used to catch holes while the holes transports and trap the holes in the hole transport layer, thereby obtaining an object of improving the luminance efficiency of the organic light-emitting diodes with lower cost.

Abstract: There is disclosed a semiconductor sensor for measuring the contact shear stress distribution between the socket of an above-knee (AK) prostheses and the soft tissue of an amputee's stump. The sensor is fabricated by the micro-electro-mechanical system (MEMS) technology, and its main sensing part is 2-X shaped with a flange structure. The sensor is prepared by anisotropic wet etching of bulk silicon in KOH solution and a square flange above the sensing diaphragm is formed through surface micromachining of deposited SiO2 thin film. This invention has the following characteristics: piezo-resistivity of the monolithic silicon will be utilized to convert shear deformation of the sensor into an electrical signal and a micro sensor which can measure the shear force vector acting on the sensing flange.

Abstract: A method of growing single crystal Gallium Nitride on silicon substrate is disclosed including: removing oxide layer of silicon substrate, growing buffer layer of Silicon Carbon Nitride (SiCN), and growing single crystalline Gallium Nitride thin film, characterized in that a buffer layer of SiCN is grown to avoid lattice mismatch which appears when Gallium Nitride is grown directly on silicon substrate, and that Rapid Thermal Chemical Vapor Deposition is adopted to grow SiCN buffer layer, and that Metalorganic Chemical Vapor Deposition is adopted to grow single crystalline GaN thin film.

Abstract: In this invention, a contact type micro piezoresistive shear-stress sensor is fabricated by the micro-electro-mechanical (MEMS) technology, and its main sensing part is a 2-X shaped with a flange structure, for measuring the shear stress distribution between socket of above-knee (AK) prostheses and the soft tissue of amputee's stump. Comparing with a conventional shear stress sensor, this invention owns the following characteristics: piezo-resistivity of the monolithic silicon will be utilized to convert shear deformation of the sensor into electrical signal and a micro sensor which can measure the shear force vector acting the sensing flange.

Abstract: A method of forming a high polysilicon resistor over a dielectric layer, comprising the following steps. A polysilicon resistor over a semiconductor structure is provided. The polysilicon resistor has a doped polysilicon layer having a first voltage coefficient of resistance and grain boundaries having a first trapping density. A to a first level of DC current is provided for a predetermined duration through the doped polysilicon layer to stress the doped polysilicon layer to partially melt the doped polysilicon layer without causing breakdown of the doped polysilicon layer. The to a first level of DC current is removed to allow recrystallization of the melted doped polysilicon layer, whereby the recrystallized doped polysilicon layer has a second voltage coefficient of resistance less than the first voltage coefficient of resistance and grain boundaries having a second trapping density that is less than the first trapping density. This makes the Rs of the polysilicon to be stable and saturated.

Abstract: A method for fabricating a polysilicon thin film transistor combining the channel oxidation process and the plasma hydrogenation process is disclosed. The fabrication process includes the following steps: (a) forming a field oxide layer on a silicon substrate, (b) forming a polysilicon layer on a portion of the field oxide layer to serve as a gate, (c) forming a gate oxide on the polysilicon layer and another portion of the field oxide layer, (d) forming a polysilicon channel on the gate oxide layer, (e) defining a source region and a drain region in a portion of the polysilicon channel, (f) oxidizing another portion of the polysilicon channel, (g) forming a dielectric layer on said polysilicon channel, and (h) hydrogenating said polysilicon thin film transistor by plasma. Such a combination results in an better efficiency for passivating the tail state traps, and can prevent the polysilicon thin film from being damaged caused by the plasma glow during the plasma hydrogenation process.

Abstract: This invention is a novel silicon carbide and silicon (SiC/Si) heterostructure N-shaped negative-differential-resistance semiconductor switch having low power dissipation and large on/off current ratio. The structure of the semiconductor switch includes Al electrode/p-type single crystal silicon carbide layer/graded-composition layer/n-type single crystal silicon substrate/Al electrode (Al/p-SiC/GCL/n-Si/Al), wherein the graded-composition layer is a buffer layer between the p-SiC and n-Si layers.