Abstract: The disclosure provides a power management method. The power management method is applicable to an electronic device. The electronic device is electrically coupled to an adapter, and includes a system and a battery. The adapter has a feed power. The battery has a discharge power. The power management method of the disclosure includes: reading a power value of the battery; determining a state of the system; and discharging power to the system, when the system is in a power-on state and the power value is greater than a charging stopping value, by using the battery, and controlling, according to the discharge power and the feed power, the adapter to selectively supply power to the system. The disclosure further provides an electronic device using the power management method.

Abstract: In example implementations, a computing device is provided. The computing device includes a system management bus, a controller communicatively coupled to the system management bus, a noise generating component communicatively coupled to the controller, a noise cancellation codec communicatively coupled to the system management bus, and a speaker communicatively coupled to the noise cancellation codec. The operating parameters of the noise generating component are provided to the controller. The noise cancellation codec is to receive the operating parameters of the noise generating component from the controller via the system management bus and to generate a noise cancellation signal based on the operating parameters. The speaker outputs the noise cancellation signal to cancel noise generated by the noise generating component.

Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.

Abstract: A buffer circuit includes an input terminal configured to receive an input signal, an output terminal, an inverter, and a resistor-capacitor (RC) circuit coupled in series with the inverter between the input terminal and the output terminal. The RC circuit includes an NMOS transistor coupled between an RC circuit output terminal and a reference node, a resistor coupled between the RC circuit output terminal and a power supply node, and a capacitor coupled between the RC circuit output terminal and one of the power supply node or the reference node, and the inverter and the RC circuit are configured to generate an output signal at the output terminal based on the input signal.

Abstract: A layout of a semiconductor memory device includes a substrate and a ternary content addressable memory (TCAM). The TCAM is disposed on the substrate and includes a plurality of TCAM bit cells, where at least two of the TCAM bit cells are mirror-symmetrical along an axis of symmetry, and each of the TCAM bit cells includes two storage units electrically connected to two word lines respectively, and a logic circuit electrically connected to the storage units. The logic circuit includes two first reading transistors, and two second reading transistors, where each of the second reading transistors includes a gate and source and drain regions, the source and drain regions of the second reading transistors are electrically connected to two matching lines and the first reading transistors, respectively, where the word lines are disposed parallel to and between the matching lines.

Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first conductive structure arranged over a substrate. A memory layer is arranged over the first conductive structure, below a second conductive structure, and includes a ferroelectric material. An annealed seed layer is arranged between the first and second conductive structures and directly on a first side of the memory layer. An amount of the crystal structure that includes an orthorhombic phase is greater than about 35 percent.

Abstract: An optical module includes a micro spectrometer. The micro spectrometer includes an optical crystal, a lens, and a photosensitive assembly. The optical crystal is configured to receive detection light and covert the detection light into interference light. The optical crystal is surrounded by a sleeve, the sleeve configured to fix a position of the optical crystal. The lens is configured for receiving the interference light and focusing the interference light. The photosensitive assembly is configured for imaging the interference light into an interference image. The optical module further comprises a controller. The controller is electrically connected to the photosensitive assembly, and the controller is used to convert the interference image into light wavelength signals and light intensity signals.

Abstract: A solid state storage device includes a control circuit, a volatile memory and a non-volatile memory. The non-volatile memory is divided into a first area and a second area. After the host issues a write command and a write data, the control circuit monitors a data amount of the write data continuously stored into the non-volatile memory. Before the data amount of the write data continuously stored into the non-volatile memory reaches a predetermined amount, the write data is stored into plural buffering blocks of the first area in a first write mode. After the data amount of the write data continuously stored into the non-volatile memory reaches the predetermined amount, the write data is stored into plural storing blocks of the second area in a second write mode.

Abstract: A system may include an information handling resource, a liquid cooling system for providing cooling of the information handling resource, a management controller for providing out-of-band management of the system, and a strain gauge sensor within a fluidic pathway of the liquid cooling system and communicatively coupled to the management controller and configured to measure a mechanical strain upon the strain gauge sensor in response to flow of fluid through a fluidic channel of the liquid cooling system and communicate one or more signals to the management controller indicative of the mechanical strain.

Abstract: An antenna structure includes a metal mechanism element, a ground element, a feeding radiation element, and a dielectric substrate. The metal mechanism element has a slot. The ground element is coupled to the metal mechanism element. The feeding radiation element has a feeding point. The feeding radiation element is coupled to the ground element. The dielectric substrate has a first surface and a second surface which are opposite to each other. The feeding radiation element is disposed on the first surface of the dielectric substrate. The second surface of the dielectric substrate is adjacent to the metal mechanism element. The slot of the metal mechanism element is excited to generate a first frequency band and a second frequency band. The feeding radiation element is excited to generate a third frequency band. The ground element further includes a first protruding portion and a second protruding portion.

Abstract: A package structure and a formation method are provided. The method includes disposing a first chip structure and a second chip structure over a carrier substrate. The method also includes forming an interconnection structure directly over and contacting the first chip structure and the second chip structure. The interconnection structure has multiple dielectric layers and multiple conductive features. One of the conductive features extends across a first edge of the first chip structure and a second edge of the second chip structure and is electrically connecting the first chip structure and the second chip structure. The method further includes directly bonding a third chip structure to the interconnection structure through dielectric-to-dielectric bonding and metal-to-metal bonding.

Abstract: A method includes forming a reconstructed wafer, which includes forming a redistribution structure over a carrier, bonding a first plurality of memory dies over the redistribution structure, bonding a plurality of bridge dies over the redistribution structure, and bonding a plurality of logic dies over the first plurality of memory dies and the plurality of bridge dies. Each of the plurality of bridge dies interconnects, and is overlapped by corner regions of, four of the plurality of logic dies. A second plurality of memory dies are bonded over the plurality of logic dies. The plurality of logic dies form a first array, and the second plurality of memory dies form a second array.

Abstract: An electrically controlled optical screen including a switchable scattering element and an electrically controlled decorating module is provided. The switchable scattering element is disposed on a side of the electrically controlled decorating module and is configured to switch between a scattering state and a transparent state. The electrically controlled decorating module includes a first polarizer, a first quarter-wave plate, a cholesteric liquid crystal layer, an electrically controlled wave plate, a second quarter-wave plate and a second polarizer, which are sequentially stacked. The electrically controlled wave plate has a liquid crystal layer. The second polarizer is disposed between the switchable scattering element and the second quarter-wave plate.

Abstract: An electrically controllable viewing angle switch device is provided with a first substrate, a second substrate, a liquid crystal layer, multiple spacers, and multiple light-shielding patterns. The first substrate and the second substrate are overlapped with each other. The liquid crystal layer and the multiple spacers are disposed between the first substrate and the second substrate. The multiple light-shielding patterns are disposed on the second substrate. The orthographic projection area of each spacer on the second substrate is less than or equal to the orthographic projection area of each light-shielding pattern on the second substrate. The orthographic projection of each spacer on the second substrate is located within the orthographic projection of each light-shielding pattern on the second substrate. A display apparatus using an electrically controllable viewing angle switch device is also provided, in which light leakage near the spacer is extremely slight.

Abstract: An automatically detecting method for time-varying text region of interest is disclosed. The automatically detecting method is adapted to an image processing unit of an information retrieval system, to detect a time-varying text region of interest having specific characters or character set as unit on an operation screen of a manufacturing machine, a processing machine or other equipment; furthermore, the automatically detecting method can be performed based on presence or absence of the historical screen data, and union of the detected region proposals for the time-varying text region of interest, to obtain an automatically labeled and selected time-varying text region of interest. According to the automatically detecting method, the user only needs to confirm whether the required data are labeled and selected, so it is more convenient for the user to setting data, and greatly helpful to reduce the setting time and correctly detect the required information.

Abstract: An embodiment of the invention provides a communication apparatus comprising a radio transceiver and a modem processor. The radio transceiver is configured to transmit or receive wireless signals in a wireless network. The modem processor is coupled to the radio transceiver and configured to perform operations comprising: dividing a tracking reference signal (TRS) set into a plurality of TRS subsets; scheduling a first part of the plurality of TRS subsets for a beam management; and scheduling a second part of the plurality of TRS subsets for a synchronization.

Abstract: The invention relates to a warning lamp structure, includes a lamp holder, having a receiving slot disposed therein, a circuit board accommodated in the receiving slot, and a lamp cover made of silicone material correspondingly covering an opening of the receiving slot of the lamp holder, wherein the circuit board has a plurality of light-emitting elements arranged thereon. Therefore, the use of silicone materials is to maintain the accuracy of the light projection of the light-emitting elements, and when the vehicle accidentally collides with other vehicles or a wall of a building while driving, and the lamp cover is impacted by the collision, since the lamp cover is made of silicone rubber and other elastomers, and has the characteristics of UV resistance and crack resistance, the lamp cover can therefore be prevented from being broken and damaged.

Abstract: An optical photographing assembly includes, in order from an object side to an image side along an optical axis, a first lens element, a second lens element, a third lens element, a fourth lens element and a fifth lens element. The first lens element has positive refractive power. The third lens element has at least one of an object-side surface and an image-side surface being aspheric. The fourth lens element has at least one of an object-side surface and an image-side surface being aspheric. The fifth lens element has at least one of an object-side surface and an image-side surface being aspheric, wherein at least one of the object-side surface and the image-side surface of the fifth lens element includes at least one inflection point.

Abstract: A semiconductor structure, includes a logic die, a memory die stack bonded to the logic die by a first oxide bond, and including a first pair of memory dies bonded together by a first direct bond, and a first through silicon via (TSV) in the logic die and extending across the first oxide bond and electrically connecting the logic die to the first pair of memory dies.

Abstract: A semiconductor device includes a field effect transistor disposed over a first main surface of a semiconductor substrate, a distributed Bragg reflector disposed over an opposing second main surface of the semiconductor substrate, and a conductive via disposed in the distributed Bragg reflector. The field effect transistor includes a gate structure and a source/drain region. The conductive via passes through the semiconductor substrate and is in direct electrical contact with the source/drain region. A metal silicide is formed in a portion of the source/drain region that is in contact with the conductive via, and thus can reduce contact resistance between the source/drain region and the conductive via. The source/drain region is laser annealed through an opening formed through the distributed Bragg reflector. The distributed Bragg reflector reduces or prevents thermal damage to other regions of the semiconductor device that are protected by the distributed Bragg reflector.