Abstract: An electronic device is disclosed. The electronic device includes a semiconductor structure, an insulation layer and a circuit structure. The semiconductor structure includes a connection pad including a first portion and a second portion, and the first portion is connected to the second portion. The insulation layer is disposed on the semiconductor structure and includes an opening, and the opening exposes the first portion of the connection pad. The circuit structure is disposed on the insulation layer and includes a conductive layer, and the conductive layer is disposed in the opening and overlapped with the first portion of the connection pad. The first portion of the connection pad has a first thickness, the second portion of the connection pad has a second thickness, and a ratio of the second thickness to the first thickness is greater than or equal to 1 and less than or equal to 1.3.

Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.

Abstract: A packaging device and a manufacturing method thereof are provided. The packaging device includes an electronic unit, a conductive block, and a packaging layer. The conductive block is electrically connected to the electronic unit and has a first side surface. The packaging layer surrounds the electronic unit and the conductive block. A roughness of the first side surface is greater than a roughness of a second side surface of the packaging layer. The manufacturing method of the package device includes: providing a carrier; disposing the conductive block on the carrier, wherein the conductive block has the first side surface; disposing the electronic unit on the carrier; forming the packaging layer on the carrier, so that the packaging layer surrounds the electronic unit and the conductive block; and removing the carrier.

Abstract: An image arrangement method and an image processing system are disclosed. In the method, a video stream is decoded into one or more frames of image. The image is buffered in a message queue. The message queue is defined as a first topic. The image in the message queue is transmitted according to a subscribed target of the first topic. Accordingly, the computation burden may be reduced, and the operation efficiency of multiple models may be improved.

Abstract: A semiconductor package includes a substrate, a semiconductor device, and a ring structure. The semiconductor device disposed on the substrate. The ring structure disposed on the substrate and surrounds the semiconductor device. The ring structure includes a first portion and a second portion. The first portion bonded to the substrate. The second portion connects to the first portion. A cavity is between the second portion and the substrate.

Abstract: This disclosure is directed to a heat transfer device and a manufacturing method thereof. The method has steps of: providing a metal powder, firstly sintering the metal powder to form a plurality of sintered balls that each sintered ball has a plurality of first pores; provide a thermally conductive housing, the sintered balls are secondly sintered to form a capillary structure combined with the thermally conductive housing, wherein at least a part of an internal wall of the thermally conductive shell is cover with the sintered balls, a plurality of second pores are defined between the sintered balls, and each first pore is smaller than each second pore; filling a working fluid into the thermally conductive housing; and sealing the thermally conductive housing to define a sealed chamber in the thermally conductive housing, so that the capillary structure and the working fluid are contained in the sealed chamber.

Abstract: Methods and systems for improving the efficiency of an automated material handling system (AMHS) include providing an apparatus operatively coupled to a load port of a processing apparatus, where the apparatus is configured to remove a first work-in-process from the load port and to move the first work-in-process along a first direction to displace the first work-in-progress from the load port while a second work-in-progress is transferred to the load port from an AMHS vehicle along a second direction that is perpendicular to the first direction, and transferring the first work-in-progress to an AMHS vehicle along the second direction. The methods and systems may be used for loading and unloading wafer storage containers, such as front opening unified pods (FOUPs), in a semiconductor fabrication facility.

Abstract: A semiconductor package and the method of forming the same are provided. The semiconductor package may include a substrate, an integrated circuit package component having a semiconductor die bonded to the substrate, and a ring structure on the substrate, wherein the ring structure may encircle the integrated circuit package component in a top-down view. The ring structure may comprise a first attached segment, a second attached segment attached to the substrate by an adhesive, and a first suspended segment between the first attached segment and the second attached segment. The first suspended segment may be suspended over the substrate. The first attached segment and the second attached segment may be spaced apart from the package component by a first distance and a second distance, respectively. The first suspended segment may be spaced apart from the package component by a third distance different from the first distance and the second distance.

Abstract: An electronic device is provided, including a chip unit, a heat dissipation film, an encapsulation layer, a through hole, and a circuit structure. The chip unit has a first side and a second side opposite to the first side. The heat dissipation film is disposed on the first side. The encapsulation layer surrounds the chip unit and the heat dissipation film. The through hole penetrates the encapsulation layer, and has a first position and a second position. The circuit structure is disposed on the second side. The through hole is electrically connected to the chip unit through the circuit structure. The first position is connected to the circuit structure, and the second position is farther away from the circuit structure than the first position. The first position has a first width, the second position has a second width, and the first width is greater than the second width.

Abstract: A semiconductor package includes a substrate, a semiconductor device, and a ring structure. The semiconductor device disposed on the substrate. The ring structure disposed on the substrate and surrounds the semiconductor device. The ring structure includes a first portion and a second portion. The first portion bonded to the substrate. The second portion connects to the first portion. A cavity is between the second portion and the substrate.

Abstract: Methods and systems for improving the efficiency of an automated material handling system (AMHS) include providing an apparatus operatively coupled to a load port of a processing apparatus, where the apparatus is configured to remove a first work-in-process from the load port and to move the first work-in-process along a first direction to displace the first work-in-progress from the load port while a second work-in-progress is transferred to the load port from an AMHS vehicle along a second direction that is perpendicular to the first direction, and transferring the first work-in-progress to an AMHS vehicle along the second direction. The methods and systems may be used for loading and unloading wafer storage containers, such as front opening unified pods (FOUPs), in a semiconductor fabrication facility.

Abstract: An electronic device includes an electronic unit having a first side and a second side; an encapsulation layer surrounding the electronic unit and having a plurality of openings exposing the second side of the electronic unit; a first circuit structure disposed on the first side of the electronic unit and electrically connected to the electronic unit; a second circuit structure disposed on the second side of the electronic unit; a via penetrating the encapsulation layer and electrically connecting the first circuit structure to the second circuit structure; and a heat dissipation layer disposed on the second side of the electronic unit, wherein the heat dissipation layer contacts the electronic unit through the plurality of openings.

Abstract: An electronic device including an electronic element, an encapsulation layer, a circuit structure, a bonding element, and a bolt is provided. The encapsulation layer surrounds the electronic element. The circuit structure is electrically connected to the electronic element. The bonding element is electrically connected to the electronic element via the circuit structure. The bolt is disposed between the circuit structure and the encapsulation layer. A manufacturing method of an electronic device is also provided.

Abstract: A semiconductor device a method of forming the same are provided. The method includes forming a fin extending from a substrate and forming a gate dielectric layer along a top surface and sidewalls of the fin. A first thickness of the gate dielectric layer along the top surface of the fin is greater than a second thickness of the gate dielectric layer along the sidewalls of the fin.

Abstract: The present invention relates to A solvent-free process for making a nanodispersion delivery system comprising emulsifying mixing fat soluble vitamins or nutraceuticals with miscible food grade lipids at a temperature of between 60-100° C. to obtain a lipid mixture, homogenizing said lipid mixture with a mixture of surfactants to form a coarse emulsion, downsizing said coarse emulsion to nanodispersion using ultrasonication or high pressure homogenization, and mixing said nanodispersion with shell/coating materials and spray drying.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes an insulating layer over the substrate. The semiconductor device structure includes a first gate structure and a second gate structure embedded in the insulating layer. The first gate structure is wider than the second gate structure, the first gate structure includes a first gate dielectric layer and a first gate electrode layer over the first gate dielectric layer, the second gate structure includes a second gate dielectric layer and a second gate electrode layer over the second gate dielectric layer, the first gate dielectric layer and the second gate dielectric layer are made of a same material, and the second gate dielectric layer is thinner than the first gate dielectric layer.

Abstract: An electronic device includes an electronic unit, an encapsulation layer surrounding the electronic unit, a circuit structure electrically connected to the electronic unit and a bonding component. The circuit structure includes a first metal layer electrically connected to the electronic unit, a first dielectric layer disposed on the first metal layer and having an opening and a second metal layer disposed in the opening. The bonding component overlaps the second metal layer, and at least partially disposed in the opening. In cross-sectional view, a first height between a first dielectric layer top surface and a first metal layer top surface is greater than a second height between a second metal layer top surface and the first metal layer top surface. A difference between the first height and the second height is greater than or equal to 1 ?m and less than or equal to 15 ?m.

Abstract: An electronic device is provided. The electronic device includes a chip, a redistribution structure, a contact pad, a buffer layer, and a first connection pad. The redistribution structure is electrically connected to the chip. The redistribution structure includes a metal pad, and the metal pad is disposed opposite to the chip. The contact pad is disposed on the metal pad. The buffer layer is disposed on the redistribution structure and includes an opening. The opening exposes at least a portion of the contact pad. The first connection pad is disposed on the contact pad and extends in the opening. Moreover, in a normal direction of the chip, the metal pad, the contact pad and the first connection pad overlap. A method of manufacturing an electronic device is also provided.

Abstract: A first n-type transistor includes a first channel component, an undoped first gate dielectric layer disposed over the first channel component, and a first gate electrode disposed over the undoped first gate dielectric layer. A second n-type transistor includes a second channel component and a doped second gate dielectric layer disposed over the second channel component. The second gate dielectric layer is doped with a p-type dipole material. A second gate electrode is disposed over the second gate dielectric layer. At least one of the first n-type transistor or the second n-type transistor further includes an aluminum-free conductive layer. The aluminum-free conductive layer is disposed between the first gate dielectric layer and the first gate electrode or between the second gate dielectric layer and the second gate electrode.

Abstract: Semiconductor structures and methods are provided. An example method includes receiving a workpiece that includes a substrate, first channel members over a first region of the substrate, second channel members over a second region of the substrate, and third channel members over a third region of the substrate, depositing a first gate dielectric layer to wrap around each of the first channel members, each of the second channel members, and each of the third channel members, selectively depositing a first dipole layer to wrap around each of the third channel members, performing a first anneal process to drive a first dopant in the first dipole layer into the first gate dielectric layer around the third channel members, removing the first dipole layer, and after the removing, depositing a second gate dielectric layer to wrap around the first channel members, the second channel members, and the third channel members.