Patents by Inventor Yen-Wei Chen
Yen-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12269405Abstract: A multiple detection system is applied to a vehicle and includes a contact-type detection module adapted to generate a contact-type detection datum, a contactless-type detection module adapted to generate a contactless-type detection datum, and an operation processor electrically connected with the contact-type detection module and the contactless-type detection module in a wire manner or in a wireless manner. The operation processor sets at least one of the contact-type detection datum and the contactless-type detection datum according to an environmental status of the vehicle to be a main detection result of the multiple detection system, and further sets the other detection datum to be an auxiliary detection result of the multiple detection system, for acquiring a passenger feature inside the vehicle.Type: GrantFiled: November 26, 2020Date of Patent: April 8, 2025Assignee: PixArt Imaging Inc.Inventors: Han-Lin Chiang, Shih-Feng Chen, Yen-Min Chang, Ning Shyu, Chih-Wei Huang
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Patent number: 12266655Abstract: A method includes forming a semiconductor fin protruding higher than top surfaces of isolation regions. A top portion of the semiconductor fin is formed of a first semiconductor material. A semiconductor cap layer is formed on a top surface and sidewalls of the semiconductor fin. The semiconductor cap layer is formed of a second semiconductor material different from the first semiconductor material. The method further includes forming a gate stack on the semiconductor cap layer, forming a gate spacer on a sidewall of the gate stack, etching a portion of the semiconductor fin on a side of the gate stack to form a first recess extending into the semiconductor fin, recessing the semiconductor cap layer to form a second recess directly underlying a portion of the gate spacer, and performing an epitaxy to grow an epitaxy region extending into both the first recess and the second recess.Type: GrantFiled: April 4, 2022Date of Patent: April 1, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Ting Chen, Bo-Yu Lai, Chien-Wei Lee, Hsueh-Chang Sung, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
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Patent number: 12265412Abstract: A circuit includes a voltage divider circuit configured to generate a feedback voltage according to an output voltage, an operational amplifier configured to output a driving signal according to the feedback voltage and a reference voltage and a pass gate circuit including multiple current paths. The current paths are controlled by the driving signal and connected in parallel between the voltage divider circuit and a power reference node.Type: GrantFiled: April 11, 2024Date of Patent: April 1, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Huan-Neng Chen, Yen-Lin Liu, Chia-Wei Hsu, Jo-Yu Wu, Chang-Fen Hu, Shao-Yu Li, Bo-Ting Chen
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Patent number: 12261188Abstract: A device is disclosed. The device includes a plurality of pixels disposed over a first surface of a semiconductor layer. The device includes a device layer disposed over the first surface. The device includes metallization layers disposed over the device layer. One of the metallization layers, closer to the first surface than any of other ones of the metallization layers, includes at least one conductive structure. The device includes an oxide layer disposed over a second surface of the semiconductor layer, the second surface being opposite to the first surface, the oxide layer also lining a recess that extends through the semiconductor layer. The device includes a spacer layer disposed between inner sidewalls of the recess and the oxide layer. The device includes a pad structure extending through the oxide layer and the device layer to be in physical contact with the at least one conductive structure.Type: GrantFiled: April 17, 2023Date of Patent: March 25, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Keng-Ying Liao, Yu-Chu Lin, Chih Wei Sung, Shih Sian Wang, Chi-Chung Jen, Yu-chien Ku, Yen-Jou Wu, Huai-jen Tung, Po-Zen Chen
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Publication number: 20250093593Abstract: Optical devices and methods of manufacture are presented in which a mirror structure is utilized to transmit and receive optical signals to and from an optical device. In embodiments the mirror structure receives optical signals from outside of an optical device and directs the optical signals through at least one mirror to an optical component of the optical device.Type: ApplicationFiled: January 3, 2024Publication date: March 20, 2025Inventors: Wen-Chih Lin, Cheng-Yu Kuo, Yen-Hung Chen, Hsuan-Ting Kuo, Chia-Shen Cheng, Chao-Wei Li, Ching-Hua Hsieh, Wen-Chih Chiou, Ming-Fa Chen, Shang-Yun Hou
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Publication number: 20250092508Abstract: A physical vapor deposition (PVD) target for performing a PVD process is provided. The PVD target includes a backing plate and a target plate coupled to the backing plate. The target plate includes a sputtering source material and a dopant, with the proviso that the dopant is not impurities in the sputtering source material. The sputtering source material includes a diffusion barrier material.Type: ApplicationFiled: November 27, 2024Publication date: March 20, 2025Inventors: Chia-Hsi WANG, Yen-Yu CHEN, Yi-Chih CHEN, Shih-Wei BIH
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Publication number: 20250098373Abstract: A micro light-emitting element is provided. The micro light-emitting element includes a first-type semiconductor having a bottom surface and a light-emitting layer disposed on the first-type semiconductor. The micro light-emitting element also includes a second-type semiconductor disposed on the light-emitting layer and an intrinsic semiconductor disposed on the second-type semiconductor and made of the same material as the second-type semiconductor. The intrinsic semiconductor has a top surface relative to the bottom surface. The sidewalls of the first-type semiconductor, the light-emitting layer, the second-type semiconductor, and the intrinsic semiconductor form a continuous side surface, and the side surface connects the bottom surface to the top surface.Type: ApplicationFiled: November 29, 2023Publication date: March 20, 2025Applicant: PlayNitride Display Co., Ltd.Inventors: Yu-Yun Lo, Bo-Wei Wu, Yen-Yeh Chen, Chih-Ling Wu
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Publication number: 20250081623Abstract: A semiconductor structure a method of fabricating thereof including a substrate having a device region and a dummy region. A first active region is disposed over the substrate in the device region and a second active region is over the substrate in the dummy region. A first operational gate structure over the first active region and a first non-operational gate structure over the second active region. A first epitaxial region of an n-type dopant is adjacent the first operation gate structure; and a second epitaxial region of an n-type dopant is adjacent the first non-operational gate structure.Type: ApplicationFiled: February 1, 2024Publication date: March 6, 2025Inventors: Yi-Hui Chen, Yi-Lii Huang, Chih-Hsiao Chen, Ming Chen Hung, Yen Wei Tseng, Yi-Chen Li
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Publication number: 20250057973Abstract: A drug carrier with a property of crossing the blood-brain barrier comprises an extracellular vesicle with a human leukocyte antigen-G antibody on its surface. This carrier can serve as a pharmaceutical composition for promoting apoptosis of brain tumor cells, inhibiting growth of brain tumor cells, or reducing expression of O6-methylguanine-DNA methyltransferase (MGMT) in brain tumor cells. These effects contribute to the treatment of glioblastoma multiforme (GBM).Type: ApplicationFiled: August 13, 2024Publication date: February 20, 2025Inventors: Der-Yang Cho, Shao-Chih Chiu, Yi-Wen Chen, Ming-You Shie, Chih-Ming Pan, Shi-Wei Huang, Yen Chen, Cheng-Yu Chen, Kai-Wen Kan
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Publication number: 20250061005Abstract: A method for dynamic adaptive threading is provided. The method comprises receiving a query request for a recommended number of threads from an application. The method comprises determining the recommended number of threads according to a resource status of a system-on-a-chip (SoC) platform. The method comprises transmitting the recommended number of threads to the application.Type: ApplicationFiled: August 15, 2024Publication date: February 20, 2025Inventors: Chung-Yang CHEN, Cheng-Che CHEN, Chung-Hao HO, Yi-Wei HO, Yen-Po CHIEN, Yen-Ting PAN
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Patent number: 12228763Abstract: A switchable backlight module is disclosed. The switchable backlight module includes two light source modules arranged parallelly with respect to a plane. Each of the light source modules includes a turning film and a LGP. The LGP is of an edge-lit type arranged parallelly under the turning film. A light ray enters the LGP from a light incident side of the LGP, exits the LGP from a light emergent surface of the LGP, enters the turning film, and exits the turning film from a surface of the turning film away from the LGP. The light incident side of the LGP of one of the light source modules is perpendicular to the light incident side of the LGP of the other light source module. The switchable backlight module is in an anti-peeping mode having a narrow viewing angle when only an upper one of the light source modules emits light.Type: GrantFiled: July 19, 2023Date of Patent: February 18, 2025Assignee: DARWIN PRECISIONS CORPORATIONInventors: Yu-Huan Chiu, Chien-Wei Liao, Yen-Lung Chen
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Patent number: 12219843Abstract: An electronic device includes a conductive wire having a metal portion with openings. The openings include a first opening and a second opening arranged along a first direction, and the metal portion includes the first to fourth extending portions and the first to fourth joint portions. The first opening is surrounded by the first extending portion, the second extending portion, the first joint portion, and the second joint portion. The second opening is surrounded by the third extending portion, the fourth extending portion, the third joint portion, and the fourth joint portion. Along the first direction, a ratio of a first width sum of widths of the first extending portion, the second extending portion, the third extending portion, and the fourth extending portion to a second width sum of widths of the first joint portion and the third joint portion is in a range from 0.8 to 1.2.Type: GrantFiled: March 18, 2024Date of Patent: February 4, 2025Assignee: InnoLux CorporationInventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
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Publication number: 20250036977Abstract: An electronic device is configured to execute instructions: compiling a first AI model and second AI model(s) to a first compiled file and second compiled file(s), respectively, wherein the first compiled file comprises a first data set and a first command set, and the second compiled file(s) comprises second data set(s) and second command set(s); generating light version file(s) for the AI model(s), wherein the light version file(s) comprises the second command set(s) and data patch(es); storing the first compiled file and the light version file(s) to a storage device; loading the first compiled file from the storage device to a memory; loading the light version file(s) from the storage device to the memory; generating the second data set(s) according to the first data set and the data patch(es); and executing the second AI model(s) according to the generated second data set(s) and the second command set(s) in the memory.Type: ApplicationFiled: June 23, 2024Publication date: January 30, 2025Applicant: MEDIATEK INC.Inventors: Chia-Wei Hsu, Yu-Lung Lu, Yen-Ting Chiang, Chih-wei Chen, Yi-Cheng Lu, Jia-Sian Hong, Kuan-Yu Chen, Pei-Kuei Tsung, Hua Wu
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Patent number: 12211960Abstract: A micro LED display device includes an epitaxial structure layer, a connection layer, a light conversion layer and a transparent layer. The epitaxial structure layer includes a plurality of micro LEDs disposed apart from each other. The connection layer is disposed at one side of the epitaxial structure layer away from the micro LEDs. The light conversion layer is fixed on the epitaxial structure layer through the connection layer and includes a plurality of light conversion portions. Each of the light conversion portions corresponds to one of the micro LEDs. The transparent layer is disposed at one side of the light conversion layer away from the epitaxial structure layer. The ratio of the thickness of the transparent layer to the width of each light conversion portion is between 0.1 and 40. A manufacturing method of the micro LED display device is also provided.Type: GrantFiled: November 3, 2021Date of Patent: January 28, 2025Assignee: PLAYNITRIDE DISPLAY CO., LTD.Inventors: Yen-Yeh Chen, Yu-Jui Tseng, Sheng-Yuan Sun, Loganathan Murugan, Po-Wei Chiu
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Publication number: 20250031494Abstract: A manufacturing method of a micro LED display device is provided. The method includes: providing an epitaxial structure layer, wherein the epitaxial structure layer comprises a plurality of micro light-emitting diodes disposed apart from each other; forming a connection layer at one side of the epitaxial structure layer away from the micro light-emitting diodes; providing a carrier and forming a release layer, a transparent layer and a light conversion layer on the carrier in order, wherein the light conversion layer comprises a plurality of light conversion portions, each of the light conversion portions corresponds to one of the micro light-emitting diodes; attaching the light conversion layer to the connection layer, so that the carrier configured with the release layer, the transparent layer and the light conversion layer is fixed on the epitaxial structure layer through the connection layer; and removing the release layer and the carrier.Type: ApplicationFiled: October 9, 2024Publication date: January 23, 2025Inventors: Yen-Yeh CHEN, Yu-Jui TSENG, Sheng-Yuan SUN, Loganathan MURUGAN, Po-Wei CHIU
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Publication number: 20250031435Abstract: In an embodiment, a method includes: patterning a lower semiconductor nanostructure, an upper semiconductor nanostructure, and a dummy nanostructure, the dummy nanostructure disposed between the lower semiconductor nanostructure and the upper semiconductor nanostructure, the dummy nanostructure including doped silicon; forming an opening between the lower semiconductor nanostructure and the upper semiconductor nanostructure by etching the doped silicon of the dummy nanostructure; forming an isolation structure in the opening; and depositing a gate dielectric around the isolation structure, the upper semiconductor nanostructure, and the lower semiconductor nanostructure.Type: ApplicationFiled: July 19, 2023Publication date: January 23, 2025Inventors: Chun Wei Chen, Zheng Hui Lim, Yen Chuang, Shun-Siang Jhan, Yi-Ching Hung, Ji-Yin Tsai
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Publication number: 20250019267Abstract: A UV LED reactor includes a housing having an inlet, an outlet and a reactor chamber; a UV LED module mounted to the housing configured to emit UV radiation into the reactor chamber having a selected wavelength range and with a selected energy (E); and a heatsink on the UV LED module configured to dissipate heat generated by the UV LED module. The heatsink on the UV LED module includes one or more surfaces in thermal communication or physical contact with the fluid, which improves the efficiency of heat transfer from the heatsink to the fluid and eliminates the need for cooling fans. The UV LED reactor can also include a UV transparent inner tube mounted to the inlet for generating a double UV exposure flow path through the reactor chamber. The UV LED reactor can also include a UV reflective coating on the sidewalls of the housing, or on a separate tube or sleeve mounted to the housing, configured to reflect UV radiation onto the fluid in the reactor chamber.Type: ApplicationFiled: July 9, 2024Publication date: January 16, 2025Applicant: TSLC CORPORATIONInventors: PO-WEI LEE, SHENG-HO LIU, YU-JU CHEN, YEN-CHAO LIN
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Patent number: 11742295Abstract: An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180° with respect to a row direction and a column direction.Type: GrantFiled: December 28, 2020Date of Patent: August 29, 2023Assignees: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Hao Wang, Ting-Chin Cho, Igor Elkanovich, Amnon Parnass, Chia-Hsiang Chang, Tsai-Ming Yang, Yen-Chung T. Chen, Ting-Hsu Chien, Yuan-Hung Lin, Chao-Ching Huang, Li-Ya Tseng, Pei Yu, Jia-Liang Chen, Yen-Wei Chen, Chung-Kai Wang, Chun-Hsu Chen, Yu-Ju Chang, Li-Hua Lin, Zanyu Yang
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Publication number: 20220208684Abstract: An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180° with respect to a row direction and a column direction.Type: ApplicationFiled: December 28, 2020Publication date: June 30, 2022Applicants: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ting-Hao Wang, Ting-Chin Cho, Igor Elkanovich, Amnon Parnass, Chia-Hsiang Chang, Tsai-Ming Yang, Yen-Chung T. Chen, Ting-Hsu Chien, Yuan-Hung Lin, Chao-Ching Huang, Li-Ya Tseng, Pei Yu, Jia-Liang Chen, Yen-Wei Chen, Chung-Kai Wang, Chun-Hsu Chen, Yu-Ju Chang, Li-Hua Lin, Zanyu Yang
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Patent number: 11366119Abstract: This invention is a functionalized diamond crystal with high dispersibility in high ionic strength solution and/or with specific targeting ability, which comprise a diamond crystal and a fatty acid layer. The fatty acid layer works a surfactant and provides a specific targeting feature for the diamond crystal. The feature of the surfactant makes the diamond crystal being easily dispersed in biological surrounding (e.g., phosphate saline buffer) and the feature of specific targeting ability provides the diamond crystal with specific recognizing specific targets. This invention allows researchers to use diamond crystal as a marker for specific labelling.Type: GrantFiled: May 25, 2018Date of Patent: June 21, 2022Assignee: ACADEMIA SINICAInventors: Huan-Cheng Chang, Feng-Jen Hsieh, Yen-Wei Chen