Abstract: A wireless charging module includes a module case, a fan, a coil assembly and a circuit board. The module case defines a first cavity and a second cavity and has a first side and a second side opposite to the first side. The second side defines an air outlet. The fan is disposed at the first side of the module case and configured to form an airflow S. The coil assembly is disposed in the first cavity, so that a first air channel is formed for the airflow S to pass through a first surface of the coil assembly. The circuit board is disposed in the second cavity and configured to form a second air channel allowing the airflow S to pass through a first surface of the circuit board and a third air channel allowing the airflow S to pass through a second surface of the circuit board. The airflow S passes through the first air channel, the second air channel and the third air channel and flows out of the wireless charging module from the air outlet.

Abstract: A deposition system provides a feature that may reduce costs of the sputtering process by increasing a target change interval. The deposition system provides an array of magnet members which generate a magnetic field and redirect the magnetic field based on target thickness measurement data. To adjust or redirect the magnetic field, at least one of the magnet members in the array tilts to focus on an area of the target where more target material remains than other areas. As a result, more ion, e.g., argon ion bombardment occurs on the area, creating more uniform erosion on the target surface.

Abstract: A method for manufacturing a nitrile butadiene rubber includes: subjecting a material composition containing water, butadiene, acrylonitrile, an emulsifying agent, an initiator, and a molecular weight regulator to an emulsion polymerization reaction, so as to form an emulsion; and adding a reactive antioxidant and a non-reactive antioxidant to the emulsion to form a mixture, followed by subjecting the mixture to a coagulation process, so as to form the nitrile butadiene rubber.

Abstract: A light guide assembly includes a housing element, at least one light guide element, and at least one light-shielding element. The housing element includes an outer surface and an inner surface. The light guide element is configured for a light to pass therethrough. The light guide element includes a light entrance surface, at least one light exit surface, and at least one wall surface. The wall surface surrounds and is connected to an edge of the light exit surface and extends toward the light entrance surface. The light exit surface is in contact with the inner surface. The at least one light-shielding element surrounds the at least one wall surface and is in contact with the inner surface.

Abstract: A minimum IC operating voltage searching method includes acquiring a corner type of an IC, acquiring ring oscillator data of the IC, generating a first prediction voltage according to the corner type and the ring oscillator data by using a training model, generating a second prediction voltage according to the ring oscillator data by using a non-linear regression approach under an N-ordered polynomial, and generating a predicted minimum IC operating voltage according to the first prediction voltage and the second prediction voltage. N is a positive integer.

Abstract: A device includes first and second gate electrodes, a word line and a first metal island. The first gate electrode corresponds to transistors of a memory cell. The second gate electrode is separated from the first gate electrode and corresponds to the transistors. The word line is coupled to the memory cell and located between the first and the second gate electrodes. The first metal island is configured to couple a first power supply to the memory cell. A first boundary of the first metal island is located between first and second boundaries of the first gate electrode and is located between first and second boundaries of the word line, and each of the first boundary of the first gate electrode and the first boundary of the word line is located between first and second boundaries of the first metal island.

Abstract: A gait evaluating system including a processor is provided. The processor identifies whether a gait type of the user belongs to a normal gait, a non-neuropathic gait or a neuropathic gait based on step feature values of a user and walking limb feature values of the user. In response to that the gait type of the user belongs to the non-neuropathic gait, the processor controls the display panel to display a first auxiliary information, a second auxiliary information, and a third auxiliary information. The first auxiliary information indicates a potential sarcopenia of the user. The second auxiliary information indicates a dietary guideline for muscle building and muscle strengthening. The third auxiliary information shows a motion instruction video for regaining or maintaining muscle strength of the user.

Abstract: Various embodiments of the present application are directed toward an adjustable wafer chuck. The adjustable wafer chuck is configured to hold a wafer. The adjustable wafer chuck comprises a base portion and a pad portion. The base portion comprises a plurality of adjustable base structures. The pad portion is disposed on a first side of the base portion. The pad portion comprises a plurality of contact pads disposed on the plurality of adjustable base structures. Each of the adjustable base structures are configured to move along a plane in a first direction and configured to move along the plane in a second direction that is opposite the first direction.

Abstract: A battery pack includes a housing, a plurality of battery cells and a liquid filling device. The battery cells are disposed in the housing, and each of the battery cells includes two electrodes. The housing has a side opening. A lower edge of the side opening is positioned below the electrodes in a vertical direction. The liquid filling device is connected to the housing and is configured to fill a cooling liquid into the housing. The side opening of the housing is configured to allow excessive cooling liquid to be discharged out of the housing.

Abstract: A battery cell interconnection component includes a multi-layer structure and two holders. The multi-layer structure includes a plurality of metal strips in a stack arrangement. A gap is formed between any two immediately adjacent metal strips. The two holders fixedly clamp two ends of the multi-layer structure, and each of the two holders is configured to be electrically connected to an electrode of a battery cell.

Abstract: An energy storage cabinet includes a frame supporting multiple battery packs and a cooling device. The frame includes a support with a pipe and a partition dividing an internal fluid passage of the pipe into a first flow channel and a second flow channel. Each battery pack has a first vent and a second vent. The second vent of a first battery pack is in communication with the second flow channel. The first vent of a second battery pack is in communication with the first flow channel. The cooling device produces a cool air entering the first vent of the first battery pack and the first flow channel. As the cool air passes through the first battery pack, the cool air is heated and becomes a warm air, which is then discharged into the second flow channel through the second vent.

Abstract: In some embodiments, the present disclosure relates to an image sensor including a substrate having a first side and a second side opposite the first side; a photodetector region within the substrate; a gate structure on the first side of the substrate over the photodetector region; a deep trench isolation (DTI) structure surrounding the photodetector region and extending from the first side of the substrate to the second side; a doped floating node region within the substrate at the first side and disposed between the gate structure and the DTI structure; and a floating node on the first side of the substrate, contacting a top surface of the DTI structure and overlying the doped floating node region.

Abstract: A method of manufacturing a semiconductor device includes forming a fin structure over a substrate, forming a sacrificial gate structure over the fin structure, and etching a source/drain (S/D) region of the fin structure to form an S/D recess. The fin structure includes first semiconductor layers and second semiconductor layers alternately stacked. The method further includes depositing an insulating dielectric layer in the S/D recess, depositing an etch protection layer over a bottom portion of the insulating dielectric layer, and partially removing the insulating dielectric layer. The method further includes growing an epitaxial S/D feature in the S/D recess. The bottom portion of the insulating dielectric layer interposes the epitaxial S/D feature and the substrate.

Abstract: A deposition apparatus includes a process chamber, a wafer support in the process chamber, a backplane structure having a first surface in the process chamber facing the wafer support, a target having a second surface facing the first surface and a third surface facing the wafer support, and an adhesion structure in physical contact with the backplane structure and the target. The adhesion structure has an adhesion material layer, and a spacer embedded in the adhesion material layer.

Abstract: A device for removing particles in a gas stream includes a first cylindrical portion configured to receive the gas stream containing a target gas and the particles, a rotatable device disposed within the first cylindrical portion and configured to generate a centrifugal force when in a rotational action to divert the particles away from the rotatable device, a second cylindrical portion coupled to the first cylindrical portion and configured to receive the target gas, and a third cylindrical portion coupled to the first cylindrical portion and surrounding the second cylindrical portion, the third cylindrical portion being configured to receive the diverted particles.

Abstract: A method (of manufacturing a memory device) includes forming active regions extending in a first direction; over the active regions, doing as follows including, forming gate structures extending in a second direction perpendicular to the first direction, and forming contact-to-source/drain structures (MD structures) which extend in the second direction and are interspersed among corresponding ones of the gate structures; forming via-to-gate/MD (VGD) structures over corresponding ones of the gate structures and the MD structures; in a first metallization layer over the VGD structures, forming first front-side segments extending in the first direction and including one or more front-side routing (FRTE) segments; under the active regions, forming buried segment-to-source/drain structures (BVD structures); and in a first buried metallization layer under the BVD structures, forming first back-side segments extending in the first direction and including one or more first back-side power grid (BPG) segments.

Abstract: A drug carrier with a property of crossing the blood-brain barrier comprises an extracellular vesicle with a human leukocyte antigen-G antibody on its surface. This carrier can serve as a pharmaceutical composition for promoting apoptosis of brain tumor cells, inhibiting growth of brain tumor cells, or reducing expression of O6-methylguanine-DNA methyltransferase (MGMT) in brain tumor cells. These effects contribute to the treatment of glioblastoma multiforme (GBM).

Abstract: A control system for a wafer transport vehicle is provided. The control system includes a control apparatus, a database, an onboard interface of the wafer transport vehicle and an operation control center. The control apparatus is arranged in a container of the wafer transport vehicle and configured to detect a environmental parameters in a container of the wafer transport vehicle and regulate the internal environment of a container of the wafer transport vehicle. The database is in communication with the control apparatus and configured store the environmental parameters detected by the control apparatus. The onboard interface is in communication with the control apparatus and configured to remotely control the control apparatus. The operation control center is in communication with the control apparatus and the onboard interface of the wafer transport vehicle and configured to receive the environmental parameters detected by the control apparatus.

Abstract: A memory device includes a first word line and a second word line. A first portion of the first word line is formed in a first metal layer, a second portion of the first word line is formed in a second metal layer above the first metal layer, and a third portion of the first word line is formed in a third metal layer below the second metal layer. A first portion of the second word line is formed in the first metal layer. A second portion of the second word line is formed in the second metal layer. The first portion, the second portion, and the third portion of the first word line have sizes that are different from each other, and the first portion and the second portion of the second word line have sizes that are different from each other.

Abstract: A memory cell includes a write port and a read port. The write port includes two cross-coupled inverters that form a storage unit. The cross-coupled inverters are connected between a first power source signal line and a second power source signal line. The write port also includes a first local interconnect line in an interconnect layer that is connected to the second power source signal line. The read port includes a transistor that is connected to the storage unit in the write port and to the second power source signal line, and a second local interconnect line in the interconnect layer that is connected to the second power source signal line. The second local interconnect line in the read port is separate from the first local interconnect line in the write port.