Patents by Inventor Yeon Taek JEONG

Yeon Taek JEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230240097
    Abstract: A display device according to an embodiment includes a display portion, a color converting portion, and a sealant for bonding the display portion and the color converting portion. The color converting portion includes a substrate, a bank disposed on the substrate and including an opening, a color converting layer disposed in the opening of the bank, and a pattern disposed between the bank and the sealant. A thickness of the pattern is reduced toward an outside of the color converting portion.
    Type: Application
    Filed: January 19, 2023
    Publication date: July 27, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: Hyoung Wook SONG, DONGGYU KANG, Sang Ho KIM, Se Dong KIM, SO-RA PARK, Yeon Taek JEONG
  • Publication number: 20230116218
    Abstract: A display panel includes a first substrate including a first base substrate, a second substrate and a filling pattern. The first base substrate includes a display area including a plurality of pixel areas for image display and a non-display area around the display area, and an align key pattern including an opaque material in a part of the non-display area. The second substrate includes a second base substrate overlapping the first base substrate and including a transparent material, a light blocking structure in the non-display area, and a hole overlapping the align key pattern and penetrating the light blocking structure. The filling pattern is configured to fill the hole.
    Type: Application
    Filed: September 9, 2022
    Publication date: April 13, 2023
    Inventors: Dong Gyu KANG, Se Dong KIM, Sang Ho KIM, Yeon Taek JEONG
  • Patent number: 9455276
    Abstract: A thin film transistor array panel includes: a substrate; a gate line and a common voltage line on the substrate and electrically separated from each other; a gate insulating layer on the gate line and the common voltage line; a first passivation layer on the gate insulating layer; a common electrode on the first passivation layer; a second passivation layer on the common electrode; and a pixel electrode and a connecting member on the second passivation layer and electrically separated from each other. A first contact hole and a second contact hole are defined in the first and second passivation layers. The pixel electrode and the drain electrode are connected to each other through the second contact hole. The connecting member and the common electrode are connected to each other through the first contact hole.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: September 27, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hee Jun Byeon, Seung Sok Son, Bo Sung Kim, Yeon Taek Jeong
  • Patent number: 9406785
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Grant
    Filed: October 22, 2014
    Date of Patent: August 2, 2016
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Doo Hyoung Lee, Bo Sung Kim, Chan Woo Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Patent number: 9136342
    Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: September 15, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yeon Taek Jeong, Bo Sung Kim, Doo-Hyoung Lee, June Whan Choi, Tae-Young Choi, Kano Masataka
  • Patent number: 9115287
    Abstract: According to a method of manufacturing a thin film transistor substrate, a composition including a metal oxalate and a solvent for manufacturing an oxide semiconductor is coated to form a thin film, the thin film is annealed, and the thin film is patterned to form a semiconductor pattern.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: August 25, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yeon-Taek Jeong, Bo-Sung Kim, Doo-Hyoung Lee, Doo-Na Kim, Eun-Hye Park, Dong-Lim Kim, Hyun-Jae Kim, You-Seung Rim, Hyun-Soo Lim
  • Patent number: 9059112
    Abstract: A display device includes a first insulating substrate including a display area, a peripheral area and a test area, a gate conductor including a test element group gate electrode, a gate electrode and a gate line on the first insulating substrate, a gate insulating layer on the gate conductor, a semiconductor layer including a test element group semiconductor layer and a pixel semiconductor layer on the gate insulating layer, a data conductor including a test element group source electrode, a test element group drain electrode, a data line including a source electrode, and a drain electrode on the semiconductor layer, a first passivation layer on the data conductor, a test element group common electrode and a pixel common electrode on the first passivation layer, a second passivation layer on the test element group common electrode and the pixel common electrode, and a pixel electrode on the second passivation layer.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: June 16, 2015
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Yeon Taek Jeong, Hee Jun Byeon
  • Publication number: 20150162251
    Abstract: A display device includes a first insulating substrate including a display area, a peripheral area and a test area, a gate conductor including a test element group gate electrode, a gate electrode and a gate line on the first insulating substrate, a gate insulating layer on the gate conductor, a semiconductor layer including a test element group semiconductor layer and a pixel semiconductor layer on the gate insulating layer, a data conductor including a test element group source electrode, a test element group drain electrode, a data line including a source electrode, and a drain electrode on the semiconductor layer, a first passivation layer on the data conductor, a test element group common electrode and a pixel common electrode on the first passivation layer, a second passivation layer on the test element group common electrode and the pixel common electrode, and a pixel electrode on the second passivation layer.
    Type: Application
    Filed: April 15, 2014
    Publication date: June 11, 2015
    Applicant: Samsung Display Co., Ltd.
    Inventors: Yeon Taek JEONG, Hee Jun BYEON
  • Publication number: 20150162349
    Abstract: A thin film transistor array panel includes: a substrate; a gate line and a common voltage line on the substrate and electrically separated from each other; a gate insulating layer on the gate line and the common voltage line; a first passivation layer on the gate insulating layer; a common electrode on the first passivation layer; a second passivation layer on the common electrode; and a pixel electrode and a connecting member on the second passivation layer and electrically separated from each other. A first contact hole and a second contact hole are defined in the first and second passivation layers. The pixel electrode and the drain electrode are connected to each other through the second contact hole. The connecting member and the common electrode are connected to each other through the first contact hole.
    Type: Application
    Filed: August 11, 2014
    Publication date: June 11, 2015
    Inventors: Hee Jun BYEON, Seung Sok SON, Bo Sung KIM, Yeon Taek JEONG
  • Publication number: 20150044817
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Application
    Filed: October 22, 2014
    Publication date: February 12, 2015
    Inventors: Doo Hyoung Lee, Bo Sung Kim, Chan Wood Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Publication number: 20150008437
    Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.
    Type: Application
    Filed: September 24, 2014
    Publication date: January 8, 2015
    Inventors: Yeon Taek JEONG, Bo Sung KIM, Doo-Hyoung LEE, June Whan CHOI, Tae-Young CHOI, Kano MASATAKA
  • Patent number: 8895977
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: November 25, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung Lee, Bo Sung Kim, Chan Woo Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Patent number: 8877551
    Abstract: In a method of manufacturing a thin film transistor, a gate electrode is formed on a first surface of a base substrate, a oxide semiconductor layer, insulation layer and photo resist layer are formed an the fast surface of the base substrate having the gate electrode. The insulation layer and the oxide semiconductor layer are patterned using a first photo resist pattern to form an etch-stopper and an active pattern. A source and a drain electrode are formed on the base substrate having the active pattern and the etch-stopper, the source electrode and the drain electrode are overlapped with both ends of the etch-stopper and spaced apart from each other. Therefore, a manufacturing cost may be decreased by omitting a mask when forming the active pattern and the etch-stopper.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: November 4, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Bo-Sung Kim, Jun-Ho Song, Doo-Na Kim, Kang-Moon Jo, Tae-Young Choi, Masataka Kano, Yeon-Taek Jeong
  • Patent number: 8871577
    Abstract: A thin film transistor is provided. A thin film transistor according to an exemplary embodiment of the present invention includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a semiconductor layer disposed on the substrate and including at least a portion overlapping the gate electrode; a gate insulating layer disposed between the gate line and the semiconductor layer; and a source electrode and a drain electrode disposed on the substrate and facing each other over a channel region of the semiconductor layer. The gate insulating layer includes a first region and a second region, the first region corresponds to the channel region of the semiconductor layer, the first region is made of a first material, the second region is made of a second material, and the first material and the second material have different atomic number ratios of carbon and silicon.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: October 28, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yeon Taek Jeong, Bo Sung Kim, Doo-Hyoung Lee, June Whan Choi, Tae-Young Choi, Kano Masataka
  • Patent number: 8760596
    Abstract: A thin film transistor array panel includes a source electrode and a drain electrode on an insulating substrate, an oxide semiconductor on the insulating substrate and overlapping the source electrode and the drain electrode, a passivation layer overlapping the oxide semiconductor and on the insulating substrate, a gate electrode on the passivation layer, and a pixel electrode connected to the drain electrode. The gate electrode and the pixel electrode include a same material. The oxide semiconductor is between the source electrode and the gate electrode, and between the drain electrode and the gate electrode in a cross-sectional view of the thin film transistor array panel.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: June 24, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Young Choi, Bo Sung Kim, Young Min Kim, Seon-Pil Jang, Kang Moon Jo, Yeon Taek Jeong, Ki Beom Lee
  • Patent number: 8753920
    Abstract: Provided is a precursor composition for an oxide semiconductor. The precursor composition for the oxide semiconductor includes a metal complex compound formed by a metal ion and an organic ligand, wherein the precursor composition is represented by the following Formula 1. MAn ??(Formula 1) Herein, M is a metal ion, A is an organic ligand which includes ?-substituted carboxylate, and n is a natural number.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: June 17, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Bo Sung Kim, Doo-Hyoung Lee, Yeon-Taek Jeong, Ki-Beom Lee, Young-Min Kim, Tae-Young Choi, Seon-Pil Jang, Kang-Moon Jo
  • Publication number: 20130320327
    Abstract: A thin film transistor includes a substrate, an oxide semiconductor layer that is disposed on the substrate, a gate electrode that overlaps with the oxide semiconductor layer, a gate insulating layer that is disposed between the oxide semiconductor layer and the gate electrode, and a source electrode and a drain electrode that at least partially overlap with the oxide semiconductor layer and are spaced from each other. The gate insulating layer includes an oxide including a first material. The oxide semiconductor layer includes an oxide which includes a same material as the first material and a second material, and the source electrode and the drain electrode include an oxide that includes a same material as the second material and a third material, and a grain boundary is not formed on an interface between at least one of the gate insulating layer and the oxide semiconductor layer or between the oxide semiconductor layer, and the source electrode and the drain electrode.
    Type: Application
    Filed: November 9, 2012
    Publication date: December 5, 2013
    Applicant: Samsung Display Co., Ltd.
    Inventors: Doo Hyoung LEE, Bo Sung Kim, Chan Woo Yang, Seung-Ho Jung, Yeon Taek Jeong, June Whan Choi, Tae-Young Choi
  • Publication number: 20130237011
    Abstract: A method of manufacturing a thin-film transistor substrate includes: applying a composition on a substrate to form a thin-film on the substrate, heating the thin-film, and patterning the thin-film to form an oxide semiconductor pattern. The composition includes a metal nitrate and water. The potential of hydrogen (pH) of the composition is about 1 to about 4.
    Type: Application
    Filed: November 16, 2012
    Publication date: September 12, 2013
    Applicants: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, SAMSUNG DISPLAY CO., LTD.
    Inventors: Yeon-Taek JEONG, Bo-Sung KIM, Doo-Hyoung LEE, Seung-Ho JUNG, Tae-Young CHOI, Doo-Na KIM, Byeong-Soo BAE, Chan-Woo YANG, Byung-Ju LEE, Kang-Moon JO, Young-Hwan HWANG, Jun-Hyuck JEON
  • Publication number: 20130234169
    Abstract: In a method of manufacturing a thin film transistor, a gate electrode is formed on a first surface of a base substrate, a oxide semiconductor layer, insulation layer and photo resist layer are formed an the fast surface of the base substrate having the gate electrode. The insulation layer and the oxide semiconductor layer are patterned using a first photo resist pattern to form an etch-stopper and an active pattern. A source and a drain electrode are formed on the base substrate having the active pattern and the etch-stopper, the source electrode and the drain electrode are overlapped with both ends of the etch-stopper and spaced apart from each other. Therefore, a manufacturing cost may be decreased by omitting a mask when forming the active pattern and the etch-stopper.
    Type: Application
    Filed: September 14, 2012
    Publication date: September 12, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Bo-Sung KIM, Jun-Ho SONG, Doo-Na KIM, Kang-Moon JO, Tae-Young CHOI, Masataka KANO, Yeon-Taek JEONG
  • Patent number: 8519393
    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; an etching stop layer disposed on the semiconductor; an insulating layer disposed on the gate insulating layer; and a source electrode and a drain electrode overlapping the semiconductor. The semiconductor and the gate insulating layer have a first portion on which the etching stop layer and the insulating layer are disposed, and a second portion on which etching stop layer and the insulating layer are not disposed. The source electrode and the drain electrode are disposed on the second portion of the semiconductor and the gate insulating layer.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: August 27, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Young Choi, Hi-Kuk Lee, Bo-Sung Kim, Young-Min Kim, Seung-Hwan Cho, Young-Soo Yoon, Yeon-Taek Jeong, Seon-Pil Jang